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    Systems and methods of advanced site-based nanotopography for wafer surface metrology
    31.
    发明授权
    Systems and methods of advanced site-based nanotopography for wafer surface metrology 有权
    用于晶片表面计量的先进的基于位点的纳米形貌的系统和方法

    公开(公告)号：US09177370B2

    公开(公告)日：2015-11-03

    申请号：US13779947

    申请日：2013-02-28

    Applicant: KLA-Tencor Corporation

    Inventor： Haiguang Chen ,  Sergey Kamensky ,  Jaydeep Sinha ,  Pradeep Vukkadala

    IPC: G06K9/00 ,  G06T7/00

    CPC classification number: G06T7/0004 ,  G06T5/20 ,  G06T2207/20021 ,  G06T2207/30148

    Abstract: Systems and methods for providing micro defect inspection capabilities for optical systems are disclosed. Each given wafer image is filtered, treated and normalized prior to performing surface feature detection and quantification. A partitioning scheme is utilized to partition the wafer image into a plurality of measurement sites and metric values are calculated for each of the plurality of measurement sites. Furthermore, transformation steps may also be utilized to extract additional process relevant metric values for analysis purposes.

    Abstract translation: 公开了用于为光学系统提供微缺陷检测能力的系统和方法。 在进行表面特征检测和定量之前，对每个给定的晶片图像进行过滤，处理和归一化。 利用分割方案将晶片图像分割成多个测量位置，并且为多个测量位置中的每一个计算度量值。 此外，为了分析目的，转换步骤也可以用于提取附加的过程相关度量值。

    Predictive Modeling Based Focus Error Prediction
    32.
    发明申请
    Predictive Modeling Based Focus Error Prediction 有权
    基于预测模型的焦点误差预测

    公开(公告)号：US20150302312A1

    公开(公告)日：2015-10-22

    申请号：US14457706

    申请日：2014-08-12

    Applicant: KLA-Tencor Corporation

    Inventor： Pradeep Vukkadala ,  Jaydeep Sinha ,  Wei Chang ,  Krishna Rao

    IPC: G06N7/00 ,  G06N99/00 ,  G01B21/00

    CPC classification number: B24B37/005 ,  B24B49/00 ,  G01B21/00 ,  G01B2210/48 ,  G03F7/705 ,  G03F9/7026 ,  G06N7/00 ,  G06N99/005

    Abstract: Predictive modeling based focus error prediction method and system are disclosed. The method includes obtaining wafer geometry measurements of a plurality of training wafers and grouping the plurality of training wafers to provide at least one training group based on relative homogeneity of wafer geometry measurements among the plurality of training wafers. For each particular training group of the at least one training group, a predictive model is develop utilizing non-linear predictive modeling. The predictive model establishes correlations between wafer geometry parameters and focus error measurements obtained for each wafer within that particular training group, and the predictive model can be utilized to provide focus error prediction for an incoming wafer belonging to that particular training group.

    Abstract translation: 公开了基于预测建模的聚焦误差预测方法和系统。 该方法包括获得多个训练晶片的晶片几何测量，并且基于多个训练晶片之间的晶片几何测量的相对均匀性，分组多个训练晶片以提供至少一个训练组。 对于至少一个训练组的每个特定训练组，利用非线性预测建模来开发预测模型。 该预测模型建立晶片几何参数和该特定训练组内的每个晶片获得的聚焦误差测量值之间的相关性，并且该预测模型可用于为属于该特定训练组的输入晶片提供聚焦误差预测。

    Patterned Wafer Geometry Measurements for Semiconductor Process Controls
    33.
    发明申请
    Patterned Wafer Geometry Measurements for Semiconductor Process Controls 审中-公开
    用于半导体工艺控制的图案化晶圆几何测量

    公开(公告)号：US20150298282A1

    公开(公告)日：2015-10-22

    申请号：US14313733

    申请日：2014-06-24

    Applicant: KLA-Tencor Corporation

    Inventor： Pradeep Vukkadala ,  Jaydeep Sinha

    IPC: B24B37/005 ,  G01B5/28 ,  G03F7/20 ,  B24B49/00

    CPC classification number: B24B37/005 ,  B24B49/00 ,  G01B21/00 ,  G01B2210/48 ,  G03F7/705 ,  G03F9/7026 ,  G06N7/00 ,  G06N20/00

    Abstract: Wafer geometry measurement tools and methods for providing improved wafer geometry measurements are disclosed. Wafer front side, backside and flatness measurements are taken into consideration for semiconductor process control. The measurement tools and methods in accordance with embodiments of the present disclosure are suitable for handling any types of wafers, including patterned wafers, without the shortcomings of conventional metrology systems.

    Abstract translation: 公开了用于提供改进的晶片几何测量的晶片几何测量工具和方法。 考虑到半导体工艺控制的晶片正面，背面和平坦度测量。 根据本公开的实施例的测量工具和方法适用于处理任何类型的晶片，包括图案化晶片，而没有传统测量系统的缺点。

    Enhanced Inspection and Metrology Techniques And Systems Using Bright-Field Differential Interference Contrast
    39.
    发明申请
    Enhanced Inspection and Metrology Techniques And Systems Using Bright-Field Differential Interference Contrast 有权
    增强的检测和计量技术和使用明场差分干涉对比的系统

    公开(公告)号：US20140268172A1

    公开(公告)日：2014-09-18

    申请号：US13797901

    申请日：2013-03-12

    Applicant: KLA-Tencor Corporation

    Inventor： Ali Salehpour ,  Jaydeep Sinha ,  Kurt Lindsay Haller ,  Pradeep Vukkadala ,  George Kren ,  Jiayao Zhang ,  Mehdi Vaez-Iravani

    IPC: G01B11/24

    CPC classification number: G01B11/303 ,  G01B11/306 ,  G01B2210/56

    Abstract: A method of providing high accuracy inspection or metrology in a bright-field differential interference contrast (BF-DIC) system is described. This method can include creating first and second beams from a first light beam. The first and second beams have round cross-sections, and form first partially overlapping scanning spots radially displaced on a substrate. Third and fourth beams are created from the first light beam or a second light beam. The third and fourth beams have elliptical cross-sections, and form second partially overlapping scanning spots tangentially displaced on the substrate. At least one portion of the substrate can be scanned using the first and second partially overlapping scanning spots as the substrate is rotated. Radial and tangential slopes can be determined using measurements obtained from the scanning using the first and second partially overlapping scanning spots. These slopes can be used to determine wafer shape or any localized topography feature.

    Abstract translation: 描述了在亮场差分干涉对比（BF-DIC）系统中提供高精度检测或计量的方法。 该方法可以包括从第一光束产生第一和第二光束。 第一和第二光束具有圆形横截面，并形成在衬底上径向位移的第一部分重叠的扫描点。 从第一光束或第二光束产生第三和第四光束。 第三和第四光束具有椭圆形横截面，并形成在衬底上切向位移的第二部分重叠的扫描点。 当衬底旋转时，可以使用第一和第二部分重叠的扫描点来扫描衬底的至少一部分。 可以使用从使用第一和第二部分重叠的扫描点的扫描获得的测量来确定径向和切向斜率。 这些斜面可用于确定晶片形状或任何局部地形特征。

    Systems, Methods and Metrics for Wafer High Order Shape Characterization and Wafer Classification Using Wafer Dimensional Geometry Tool
    40.
    发明申请
    Systems, Methods and Metrics for Wafer High Order Shape Characterization and Wafer Classification Using Wafer Dimensional Geometry Tool 有权
    使用晶圆尺寸几何工具的晶圆高阶形状表征和晶圆分类的系统，方法和度量

    公开(公告)号：US20140114597A1

    公开(公告)日：2014-04-24

    申请号：US13656143

    申请日：2012-10-19

    Applicant: KLA-Tencor Corporation

    Inventor： Haiguang Chen ,  Jaydeep Sinha ,  Sergey Kamensky ,  Sathish Veeraraghavan ,  Pradeep Vukkadala

    IPC: G01B11/24 ,  G06F17/00

    CPC classification number: G01B11/24 ,  G01B2210/56 ,  G01N21/9501 ,  G06F17/00 ,  H01L22/12

    Abstract: Systems and methods for improving results of wafer higher order shape (HOS) characterization and wafer classification are disclosed. The systems and methods in accordance with the present disclosure are based on localized shapes. A wafer map is partitioned into a plurality of measurement sites to improve the completeness of wafer shape representation. Various site based HOS metric values may be calculated for wafer characterization and/or classification purposes, and may also be utilized as control input for a downstream application. In addition, polar grid partitioning schemes are provided. Such polar grid partitioning schemes may be utilized to partition a wafer surface into measurement sites having uniform site areas while providing good wafer edge region coverage.

    Abstract translation: 公开了用于改善晶片高阶形状（HOS）表征和晶片分类的结果的系统和方法。 根据本公开的系统和方法基于局部形状。 将晶片图划分成多个测量点，以提高晶片形状表示的完整性。 可以针对晶片表征和/或分类目的计算各种基于站点的HOS度量值，并且还可以用作下游应用的控制输入。 此外，还提供了极坐标分割方案。 可以利用这种极性栅格划分方案将晶片表面划分成具有均匀位置区域的测量位置，同时提供良好的晶片边缘区域覆盖。

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