公开(公告)号：US20110039387A1

公开(公告)日：2011-02-17

申请号：US12910591

申请日：2010-10-22

申请人： Chi-San Wei ,  Kuo-Ming Wu ,  Yi-Chun Lin

发明人： Chi-San Wei ,  Kuo-Ming Wu ,  Yi-Chun Lin

IPC分类号： H01L21/336

CPC分类号： H01L29/1083 ,  H01L27/088 ,  H01L29/0653 ,  H01L29/0692 ,  H01L29/66659 ,  H01L29/7835

摘要： A semiconductor structure includes a semiconductor substrate; an n-type tub extending from a top surface of the semiconductor substrate into the semiconductor substrate, wherein the n-type tub comprises a bottom buried in the semiconductor substrate; a p-type buried layer (PBL) on a bottom of the tub, wherein the p-type buried layer is buried in the semiconductor substrate; and a high-voltage n-type metal-oxide-semiconductor (HVNMOS) device over the PBL and within a region encircled by sides of the n-type tub.

摘要翻译： 半导体结构包括半导体衬底; 从半导体衬底的顶表面延伸到半导体衬底中的n型桶，其中n型桶包括埋在半导体衬底中的底部; 在桶的底部设置p型掩埋层（PBL），其中p型掩埋层埋在半导体衬底中; 和高压n型金属氧化物半导体（HVNMOS）器件，并且在由n型槽的侧面包围的区域内。

公开(公告)号：US07864905B2

公开(公告)日：2011-01-04

申请号：US11161585

申请日：2005-08-09

申请人： Kuo-Ming Wu ,  Der-Zheng Liu

发明人： Kuo-Ming Wu ,  Der-Zheng Liu

IPC分类号： H04B1/10

CPC分类号： H04L25/03057 ,  H04B1/71637 ,  H04B1/719 ,  H04L2025/03414

摘要： An apparatus and a method for equalizing a received signal to generate an equalized signal are disclosed. The apparatus includes a channel estimator for generating a channel estimation value according to a preamble symbol in the received signal and for generating a channel response value according to the channel estimation value, an interference power estimation circuit for generating an interference power estimate according to a hard decision value, the channel response value, and the received signal, and an equalization circuit for equalizing the received signal according to the channel response value and the adjusted interference power estimate to generate the equalized signal. The hard decision value corresponds to the equalized signal.

摘要翻译： 公开了一种用于均衡接收信号以产生均衡信号的装置和方法。 该装置包括：信道估计器，用于根据接收信号中的前导码符号生成信道估计值，并根据信道估计值产生信道响应值;干扰功率估计电路，用于根据硬信号产生干扰功率估计 判定值，信道响应值和接收信号，以及用于根据信道响应值和调整后的干扰功率估计均衡接收信号以产生均衡信号的均衡电路。 硬判定值对应于均衡信号。

公开(公告)号：US07781834B2

公开(公告)日：2010-08-24

申请号：US11773364

申请日：2007-07-03

申请人： Chi-San Wei ,  Kuo-Ming Wu ,  Jian-Hsing Lee

发明人： Chi-San Wei ,  Kuo-Ming Wu ,  Jian-Hsing Lee

IPC分类号： H01L29/78 ,  H01L29/10

CPC分类号： H01L29/7816 ,  H01L29/0696 ,  H01L29/0878

摘要： A semiconductor device includes a gate electrode over a semiconductor substrate, wherein the gate electrode has a gate width direction; a source/drain region in the semiconductor substrate and adjacent the gate electrode, wherein the source/drain region has a first width in a direction parallel to the gate width direction; and a bulk pick-up region in the semiconductor substrate and abutting the source/drain region. The bulk pick-up region and the source/drain region have opposite conductivity types. The bulk pick-up region has a second width in the width direction, and wherein the second width is substantially less than the first width.

摘要翻译： 半导体器件包括在半导体衬底上的栅电极，其中栅电极具有栅极宽度方向; 在所述半导体衬底中并且与所述栅电极相邻的源极/漏极区域，其中所述源极/漏极区域在平行于所述栅极宽度方向的方向上具有第一宽度; 以及半导体衬底中的块体拾取区域并且邻接源极/漏极区域。 本体拾取区域和源极/漏极区域具有相反的导电类型。 本体拾取区域在宽度方向上具有第二宽度，并且其中第二宽度基本上小于第一宽度。

公开(公告)号：US07496159B2

公开(公告)日：2009-02-24

申请号：US10724915

申请日：2003-12-01

申请人： Kuo-Ming Wu ,  Shih-Chung Yin

发明人： Kuo-Ming Wu ,  Shih-Chung Yin

IPC分类号： H03D1/00

CPC分类号： H03M13/6362 ,  H03M13/4192 ,  H03M13/6502

摘要： An apparatus for survivor path decoding in a Viterbi decoder with a constraint length of K. The apparatus of the invention includes a best survivor unit, a a register-exchange network, and a trace-back unit. The best survivor unit receives path metrics of 2K−2 local winner states from which a best state is selected every L iterations. Meanwhile, the register-exchange network generates decision vectors of survivor paths leading to 2K−1 states at instant i according to decision bits of all states from instant i−L to instant i. Every L iterations the register-exchange network outputs L-bit decision vectors for all states at instant i. Then the trace-back unit stores the decision vectors and finds a global survivor path sequence by following the decision vectors back from the best state at instant i−L. In this manner, L decoded bits can be output from the trace-back unit every L iterations.

摘要翻译： 一种具有约束长度为K的维特比解码器中的幸存路径解码装置。本发明的装置包括最佳幸存器单元，寄存器交换网络和追溯单元。 最好的幸存者单位接收2K-2局部优胜者状态的路径度量，每L次迭代选择最佳状态。 同时，寄存器交换网络根据从即时i-L到瞬时i的所有状态的判定位，产生在时刻i导致2K-1状态的幸存路径的判定向量。 每个L迭代，寄存器交换网络在时刻i输出所有状态的L位决策向量。 然后，追溯单元存储决策向量，并且通过从时刻i-L处的最佳状态返回的判定向量来查找全局幸存路径序列。 以这种方式，每L次迭代可以从追溯单元输出L个解码的比特。

公开(公告)号：US20070170469A1

公开(公告)日：2007-07-26

申请号：US11337147

申请日：2006-01-20

申请人： Kuo-Ming Wu ,  Jian-Hsing Lee ,  Yi-Chun Lin ,  Chi-Chih Chen

发明人： Kuo-Ming Wu ,  Jian-Hsing Lee ,  Yi-Chun Lin ,  Chi-Chih Chen

IPC分类号： H01L29/76

CPC分类号： H01L29/7816 ,  H01L29/0696 ,  H01L29/0873 ,  H01L29/0878 ,  H01L29/0882 ,  H01L29/4238

摘要： A semiconductor device includes a first doped region disposed on a first well in a semiconductor substrate; a second doped region disposed on a second well adjacent to the first well in the semiconductor substrate, the second doped region having a dopant density higher than that of the second well; and a gate structure overlying parts of the first and second wells for controlling a current flowing between the first and second doped regions. A first spacing distance from an interface between the second doped region and the second well to its closest edge of the gate structure is greater than 200 percent of a second spacing distance from a center point of second doped region to the edge of the gate structure, thereby increasing impedance against an electrostatic discharge (ESD) current flowing between the first and second doped regions during an ESD event.

摘要翻译： 半导体器件包括设置在半导体衬底中的第一阱上的第一掺杂区; 第二掺杂区域，其设置在与所述半导体衬底中的所述第一阱相邻的第二阱上，所述第二掺杂区域的掺杂剂密度高于所述第二阱的掺杂剂密度; 以及覆盖第一和第二阱的部分的栅极结构，用于控制在第一和第二掺杂区域之间流动的电流。 从第二掺杂区域和第二阱之间的界面到其栅极结构的最近边缘的第一间隔距离大于从第二掺杂区域的中心点到栅极结构边缘的第二间隔距离的200％ 从而增加针对在ESD事件期间在第一和第二掺杂区域之间流动的静电放电（ESD）电流的阻抗。

公开(公告)号：US07151296B2

公开(公告)日：2006-12-19

申请号：US10980080

申请日：2004-11-03

申请人： Kuo-Ming Wu ,  Chen-Bau Wu ,  Jiann-Tyng Tzeng

发明人： Kuo-Ming Wu ,  Chen-Bau Wu ,  Jiann-Tyng Tzeng

IPC分类号： H01L29/76 ,  H01L29/94

CPC分类号： H01L29/7835 ,  H01L29/0653 ,  H01L29/0692 ,  H01L29/42372 ,  H01L29/66659 ,  H01L29/7833 ,  H01L29/7836 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device comprises a substrate. A source active region and a drain active region are disposed in the substrate and spaced from one another in a first dimension. The source active region has a first and a second outline defining a width of the source active region in a second dimension substantially perpendicular to the first dimension. A gate has a third outline and a fourth outline defining a width of the gate not more than the width of the source active region. The gate is disposed between a source in the source active region and a drain in the drain active region and between the first and the second outline. The source has a width not more than the width of the gate. The source is disposed proximate the gate and between the third and the fourth outline.

公开(公告)号：US09761494B2

公开(公告)日：2017-09-12

申请号：US13465885

申请日：2012-05-07

申请人： Po-Yu Chen ,  Wan-Hua Huang ,  Jing-Ying Chen ,  Kuo-Ming Wu

发明人： Po-Yu Chen ,  Wan-Hua Huang ,  Jing-Ying Chen ,  Kuo-Ming Wu

IPC分类号： H01L21/8234 ,  H01L29/78 ,  H01L29/06 ,  H01L21/768

CPC分类号： H01L21/823425 ,  H01L21/76895 ,  H01L21/823475 ,  H01L29/0603 ,  H01L29/7833

摘要： A semiconductor structure includes a gate structure disposed on a substrate. At least one lightly doped region adjoins the gate structure in the substrate. The at least one lightly doped region has a first conductivity type. A source feature and a drain feature are on opposite sides of the gate structure in the substrate. The source feature and the drain feature have the first conductivity type. The source feature is in the at least one lightly doped region. A bulk pick-up region adjoins the source feature in the at least one lightly doped region. The bulk pick-up region has a second conductivity type.

公开(公告)号：US09178136B2

公开(公告)日：2015-11-03

申请号：US13587642

申请日：2012-08-16

申请人： Kuo-Ming Wu ,  Kai-Wen Cheng ,  Cheng-Yuan Tsai ,  Chia-Shiung Tsai

发明人： Kuo-Ming Wu ,  Kai-Wen Cheng ,  Cheng-Yuan Tsai ,  Chia-Shiung Tsai

IPC分类号： H01L29/82 ,  H01L43/12 ,  H01L43/08

CPC分类号： H01L43/08 ,  G11C11/161 ,  H01L43/02 ,  H01L43/10 ,  H01L43/12

摘要： The present disclosure provides a semiconductor memory device. The device includes a pinning layer having an anti-ferromagnetic material and disposed over a first electrode; a pinned layer disposed over the pinning layer; a tunneling layer disposed over the pinned layer, a free layer disposed over the tunneling layer and a capping layer disposed over the free layer. The capping layer includes metal-oxide and metal-nitride materials.

摘要翻译： 本公开提供一种半导体存储器件。 该装置包括具有反铁磁材料并设置在第一电极上的钉扎层; 设置在钉扎层上方的钉扎层; 设置在被钉扎层上的隧道层，设置在隧道层上方的自由层和设置在自由层上的封盖层。 覆盖层包括金属氧化物和金属氮化物材料。

公开(公告)号：US08672714B2

公开(公告)日：2014-03-18

申请号：US13338457

申请日：2011-12-28

申请人： Kuo-Ming Wu ,  Yun-Chen Yen

发明人： Kuo-Ming Wu ,  Yun-Chen Yen

IPC分类号： H01R25/00

CPC分类号： H01R31/06 ,  H01R24/60

摘要： An HDMI audio-video signal switching device comprises two housing bodies and a conductively connecting circuit board. Each of the housing bodies has an assembling end and a plugged end. The conductively connecting circuit board is a circuit board formed, at each end thereof corresponding to a positioning slot of each housing body, with a plugging projection sheet. Each plugging projection sheet has conductively connecting terminals. A portion of the conductively connecting circuit board between the two plugging projection sheets is set in the positioning slot, such that each plugging projection sheet and conductively connecting terminals thereon are allowed to pass through the positioning slot and then extend into a plugged hole, as well as the assembling ends of the two housing bodies are allowed to be butted and assembled together. Thereby, a more simplified structure is introduced for the HDMI audio-video signal switching device.

摘要翻译： HDMI音视频信号切换装置包括两个壳体和导电连接电路板。 每个壳体具有组装端和堵塞端。 导电连接电路板是在其每个端部处形成有与每个壳体的定位槽相对应的电路板，其具有插入突出片。 每个插入突起片具有导电连接端子。 将两个插入突起片之间的导电连接电路板的一部分设置在定位槽中，使得每个插入突起片和导电连接端子都允许穿过定位槽，然后延伸到插入孔中 因为两个壳体的组装端被允许对接并组装在一起。 因此，为HDMI音频 - 视频信号切换装置引入了更简化的结构。

公开(公告)号：US20130075837A1

公开(公告)日：2013-03-28

申请号：US13240714

申请日：2011-09-22

申请人： Chih-Ming Chen ,  Cheng-Yuan Tsai ,  Chung-Yi Yu ,  Kai-Wen Cheng ,  Kuo-Ming Wu

发明人： Chih-Ming Chen ,  Cheng-Yuan Tsai ,  Chung-Yi Yu ,  Kai-Wen Cheng ,  Kuo-Ming Wu

IPC分类号： H01L29/82 ,  H01L21/8246

CPC分类号： H01L27/228 ,  H01L43/08 ,  H01L43/12

摘要： The present disclosure provides a semiconductor memory device. The device includes a pinning layer having an anti-ferromagnetic material and disposed over a first electrode; a pinned layer disposed over the pinning layer; a composite layer disposed over the pinned layer, the composite layer having a magnetic material randomly distributed in a non-magnetic material; a barrier layer disposed on the composite layer; a free layer disposed over the barrier layer; and a second electrode disposed over the free layer.

摘要翻译： 本公开提供一种半导体存储器件。 该装置包括具有反铁磁材料并设置在第一电极上的钉扎层; 设置在钉扎层上方的钉扎层; 复合层，其设置在所述被钉扎层上方，所述复合层具有随机分布在非磁性材料中的磁性材料; 设置在所述复合层上的阻挡层; 设置在阻挡层上的自由层; 以及设置在所述自由层上方的第二电极。