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    Hermetic electric compressor and refrigeration unit including non-resonating support structure for the compressor
    31.
    发明授权
    Hermetic electric compressor and refrigeration unit including non-resonating support structure for the compressor 有权
    气密电动压缩机和制冷机组包括压缩机非谐振支撑结构

    公开(公告)号：US07249937B2

    公开(公告)日：2007-07-31

    申请号：US10498476

    申请日：2003-10-30

    申请人： Akira Inoue ,  Seigo Yanase ,  Ikutomo Umeoka ,  Atsushi Naruse

    发明人： Akira Inoue ,  Seigo Yanase ,  Ikutomo Umeoka ,  Atsushi Naruse

    IPC分类号： F04B17/00

    CPC分类号： F04B39/127 ,  F04B39/0044 ,  F04B39/121

    摘要： A hermetic electric compressor including sealed container and coil spring provided for elastically supporting electric compression element housed in sealed container. A consideration has been made to avoid the coincidence in the resonance frequency between coil spring mounted with electric compression element and mechanical vibration caused by electric compression element, or a cavity formed in space. By so doing, creation of a resonation with coil spring is suppressed, and noises and vibrations with the hermetic electric compressors are reduced.

    摘要翻译： 一种密封电动压缩机，包括密封容器和螺旋弹簧，用于弹性地支撑容纳在密封容器中的电动压缩元件。 已经考虑到避免安装有电压缩元件的螺旋弹簧与由电压缩元件引起的机械振动之间的谐振频率或在空间中形成的空腔中的谐振频率的一致性。 通过这样做，抑制了与螺旋弹簧的共振的产生，并且与密封电动压缩机的噪声和振动减小。

    Liquid cell
    32.
    发明申请
    Liquid cell 有权
    液体电池

    公开(公告)号：US20070145290A1

    公开(公告)日：2007-06-28

    申请号：US11586401

    申请日：2006-10-25

    申请人： Masatsugu Shigeno ,  Akira Inoue

    发明人： Masatsugu Shigeno ,  Akira Inoue

    IPC分类号： G21K5/10

    CPC分类号： G01Q30/14

    摘要： A liquid cell 1 for fixing a sample S in a condition in which the sample S is dipped in a solution W, including a lower mount 2 including a bottom plate 10 having a mounting surface 10a on which the sample is mounted, and a wall section 11 disposed on the bottom plate so as to surround the periphery of the mounted sample and capable of trapping the solution inside the surrounded area, an upper mount 3 including an upper plate 20 abutting on an upper surface of the wall section, and a flange section 21 formed so as to be bent from an outer edge of the upper plate at an angle of substantially 90 degrees, and abutting on an outer peripheral surface of the wall section, the upper mount being capable of fitting to the lower mount from above, and a holding member 4 that abuts on an outer edge of the sample to press the sample against the mounting surface from above when the upper mount fits, wherein, an outer peripheral surface of the wall section and an inner circumferential surface of the flange section are provided with fitting means 5 that fits the upper mount to the lower mount while screwing the upper mount, is provided.

    摘要翻译： 在将样品S浸渍在溶液W中的条件下固定样品S的液晶盒1，包括具有安装表面10a的底板10的下部安装件2和安装有样品的壁 第一部分11设置在底板上以围绕安装的样品的周边并且能够将溶液捕获在包围的区域内;上部支架3，其包括邻接在壁部的上表面上的上板20;以及凸缘 形成为以大致90度的角度从上板的外缘弯曲并且与壁部的外周面抵接的上部安装件能够从上方嵌入下部安装部的部分21， 以及保持构件4，该保持构件4抵接在样品的外边缘上，当上部安装件配合时将样品从上方按压在安装面上，其中，壁部的外周面和 凸缘部分设置有装配装置5，其在拧上上部支架的同时将上部支架安装到下部支架上。

    Semiconductor device having SiGe channel region
    33.
    发明授权
    Semiconductor device having SiGe channel region 有权
    具有SiGe沟道区的半导体器件

    公开(公告)号：US07205586B2

    公开(公告)日：2007-04-17

    申请号：US10851073

    申请日：2004-05-24

    申请人： Takeshi Takagi ,  Akira Inoue

    发明人： Takeshi Takagi ,  Akira Inoue

    IPC分类号： H01L31/072

    CPC分类号： H01L29/1054 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/161 ,  H01L29/165 ,  H01L29/7782 ,  H01L29/783 ,  H01L29/78615 ,  H01L29/78648 ,  H01L29/78687

    摘要： A HDTMOS includes a Si substrate, a buried oxide film and a semiconductor layer. The semiconductor layer includes an upper Si film, an epitaxially grown Si buffer layer, an epitaxially grown SiGe film, and an epitaxially grown Si film. Furthermore, the HDTMOS includes an n-type high concentration Si body region, an n− Si region, a SiGe channel region containing n-type low concentration impurities, an n-type low concentration Si cap layer, and a contact which is a conductor member for electrically connecting the gate electrode and the Si body region. The present invention extends the operation range while keeping the threshold voltage small by using, for the channel layer, a material having a smaller potential at the band edge where carriers travel than that of a material constituting the body region.

    摘要翻译： HDTMOS包括Si衬底，掩埋氧化物膜和半导体层。 半导体层包括上硅膜，外延生长的Si缓冲层，外延生长的SiGe膜和外延生长的Si膜。 此外，HDTMOS包括n型高浓度Si体区域，n + Si区域，含有n型低浓度杂质的SiGe沟道区域，n型低浓度Si覆盖层， 以及作为用于电连接栅电极和Si体区的导体构件的接触。 本发明通过在沟道层使用载流子行进的带边缘处的电位较小的材料，而不是构成体区的材料的情况下，使阈值电压保持较小。

    Power amplifier
    34.
    发明授权
    Power amplifier 有权
    功率放大器

    公开(公告)号：US07193472B2

    公开(公告)日：2007-03-20

    申请号：US11066765

    申请日：2005-02-28

    申请人： Seiki Gotou ,  Akira Inoue

    发明人： Seiki Gotou ,  Akira Inoue

    IPC分类号： H03F3/68

    CPC分类号： H03F3/60 ,  H03F1/0288 ,  H03F3/604 ,  H05K1/05 ,  H05K1/141

    摘要： In a power amplifier a Doherty amplifier is provided with an output higher harmonic reflection circuit that is connected to the output terminal of a first FET chip and sets an even-numbered higher harmonic load of an output signal at the output terminal to be a short-circuit, or at a low impedance approximating a short-circuit, and sets an odd-numbered higher harmonic load of an output signal at the output terminal to be an open-circuit, or a high impedance approximating an open-circuit.

    摘要翻译： 在功率放大器中，Doherty放大器设置有输出高次谐波反射电路，其连接到第一FET芯片的输出端，并将输出端的输出信号的偶数高次谐波负载设置为短路， 或接近短路的低阻抗，并且将输出端子处的输出信号的奇数高次谐波负载设置为开路或接近开路的高阻抗。

    Semiconductor material having bipolar transistor structure and semiconductor device using same
    35.
    发明申请
    Semiconductor material having bipolar transistor structure and semiconductor device using same 审中-公开
    具有双极晶体管结构的半导体材料和使用其的半导体器件

    公开(公告)号：US20060180833A1

    公开(公告)日：2006-08-17

    申请号：US10539006

    申请日：2003-12-16

    申请人： Akira Inoue ,  Masahiko Hata ,  Yasuyuki Kurita

    发明人： Akira Inoue ,  Masahiko Hata ,  Yasuyuki Kurita

    IPC分类号： H01L31/109

    CPC分类号： H01L29/7371 ,  H01L29/0821

    摘要： In an epitaxial substrate (20) comprising a collector layer (22), a base layer (23) and an emitter layer (24) formed on a semi-insulating GaAs substrate (21), a hole barrier layer (22C) is provided in the collector layer (22) to prevent influx of holes from the base layer (23), whereby the flow of collector current is suppressed when the collector current density rises and electron velocity is saturated, suppressing thermal runaway of the collector current without a ballast resistance or the like. Also, thermal runaway of the collector current is suppressed by providing an additional layer (2C) for generating, in the conduction band, an electron barrier by means of electrons accumulated in the collector layer (2) when the collector current density rises.

    摘要翻译： 在包括集电极层（22），形成在半绝缘GaAs衬底（21）上的基极层（23）和发射极层（24））的外延衬底（20）中，提供了空穴阻挡层（22C） 在集电体层（22）中，为了防止从基底层（23）流入空穴，由此当集电极电流密度上升，电子速度饱和时，集电极电流的流动受到抑制，抑制了没有镇流器的集电极电流的热失控 电阻等。 此外，通过设置用于在集电极电流密度上升时通过积聚在集电极层（2）中的电子在导带中产生电子势垒的附加层（2C）来抑制集电极电流的热失控。

    Method for driving electrooptical device, driving circuit, and electrooptical device, and electronic apparatus
    38.
    发明授权
    Method for driving electrooptical device, driving circuit, and electrooptical device, and electronic apparatus 失效
    驱动电光装置，驱动电路，电光装置及电子装置的方法

    公开(公告)号：US06873319B2

    公开(公告)日：2005-03-29

    申请号：US09937966

    申请日：2001-01-26

    申请人： Akira Inoue ,  Akihiko Ito ,  Ryo Ishii ,  Suguru Yamazaki

    发明人： Akira Inoue ,  Akihiko Ito ,  Ryo Ishii ,  Suguru Yamazaki

    IPC分类号： G09G3/20 ,  G09G3/36 ,  G09G5/00

    CPC分类号： G09G3/3648 ,  G09G3/2025 ,  G09G3/3696 ,  G09G2300/0814 ,  G09G2300/0823

    摘要： The invention provides an electro-optical device capable of a high-quality and high-definition tone display, a driving method thereof, a driving circuit thereof, and electronic equipment using the same. With the invention, one field is divided into a plurality of sub-fields, such that each pixel is turned on or off in each of the sub-fields so that the proportion of the period during which each pixel is turned on to the period during which the associated pixel is turned off within the one field corresponds to the proportion according to the tone data. Further, when each pixel is turned on, either a first voltage which is higher than a constant reference voltage applied to a counter electrode or a second voltage which is lower than the reference voltage is applied to a pixel electrode of the associated pixel, and when the pixel is turned off, a voltage equal to the reference voltage is applied to the pixel electrode of the pixel.

    摘要翻译： 本发明提供一种能够进行高品质和高清晰度色调显示的电光装置，其驱动方法，驱动电路和使用该电光装置的电子设备。 利用本发明，一个场被分成多个子场，使得每个子场中的每个像素被打开或关闭，使得每个像素被打开的周期的比例到 关联像素在一个场内关闭的对应于根据色调数据的比例。 此外，当每个像素导通时，高于施加到对电极的恒定参考电压的第一电压或低于参考电压的第二电压被施加到相关像素的像素电极，并且当 关闭像素，将等于参考电压的电压施加到像素的像素电极。

    Heterojunction field effect transistor
    39.
    发明授权
    Heterojunction field effect transistor 有权
    异质结场效应晶体管

    公开(公告)号：US06781163B2

    公开(公告)日：2004-08-24

    申请号：US10311293

    申请日：2002-12-17

    申请人： Takeshi Takagi ,  Akira Inoue

    发明人： Takeshi Takagi ,  Akira Inoue

    IPC分类号： H01L310328

    CPC分类号： H01L29/802 ,  H01L21/823807 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/78687

    摘要： A region of an Si layer (15) located between source and drain regions (19 and 20) is an Si body region (21) which contains an n-type impurity of high concentration. An Si layer (16) and an SiGe layer (17) are, in an as grown state, undoped layers into which no n-type impurity is doped. Regions of the Si layer 16 and the SiGe layer (17) located between the source and drain regions (19 and 20) are an Si buffer region (22) and an SiGe channel region (23), respectively, which contain the n-type impurity of low concentration. A region of an Si film (18) located directly under a gate insulating film (12) is an Si cap region (24) into which a p-type impurity (5×1017 atoms·cm−3) is doped. Accordingly, a semiconductor device in which an increase in threshold voltage is suppressed can be achieved.

    摘要翻译： 位于源极和漏极区域（19和20）之间的Si层（15）的区域是包含高浓度的n型杂质的Si体区域（21）。 处于生长状态的Si层（16）和SiGe层（17）是未掺杂n型杂质的未掺杂层。 位于源极和漏极区域（19和20）之间的Si层16和SiGe层（17）的区域分别是包含n型的Si缓冲区（22）和SiGe沟道区（23） 低浓度的杂质。 位于栅极绝缘膜（12）正下方的Si膜（18）的区域是掺杂有p型杂质（5×10 17原子·cm -3）的Si帽区域（24）。 因此，可以实现抑制阈值电压增加的半导体装置。

    Optical fiber and fiber grating device
    40.
    发明授权
    Optical fiber and fiber grating device 有权
    光纤和光纤光栅设备

    公开(公告)号：US06728458B2

    公开(公告)日：2004-04-27

    申请号：US10082083

    申请日：2002-02-26

    申请人： Toshiki Taru ,  Shinji Ishikawa ,  Akira Inoue

    发明人： Toshiki Taru ,  Shinji Ishikawa ,  Akira Inoue

    IPC分类号： G02B622

    CPC分类号： G02B6/03694 ,  C03B37/01413 ,  C03B37/01466 ,  C03B2201/12 ,  C03B2201/31 ,  C03B2203/18 ,  C03B2203/23 ,  G02B6/021 ,  G02B6/02119 ,  G02B6/03627

    摘要： An optical fiber comprises a core region, an inner cladding region, and an outer cladding region. Each of the core region and inner cladding region is doped with GeO2, whereas the inner cladding region is also doped with F element. The core region has a refractive index higher than each of the refractive index of the inner cladding region and the refractive index of the outer cladding region. Each of the core region and inner cladding region doped with GeO2 has a UV photosensitivity. The deviation in concentration distribution of GeO2 added to the inner cladding region is so small that the deviation in UV photosensitivity in the inner cladding region is ±10% or less.

    摘要翻译： 光纤包括芯区域，内包层区域和外包层区域。 芯区域和内包层区域均掺杂有GeO 2，而内包层区域也掺杂有F元素。 芯区域的折射率高于内包层区域的折射率和外包层区域的折射率。 掺杂有GeO 2的芯区域和内包层区域都具有UV光敏性。 添加到内包层区域的GeO 2的浓度分布偏差如此小，使得内包层区域的紫外线光敏性的偏差为±10％以下。