Display apparatus and driving method thereof

    公开(公告)号:US10163416B2

    公开(公告)日:2018-12-25

    申请号:US14801855

    申请日:2015-07-17

    Abstract: A display apparatus and a driving method of the same are provided. The display apparatus includes a display panel, a gate driver circuit, and a source driver circuit. During a functional sub-period of a frame period, the gate driver circuit simultaneously drives a plurality of gate lines, and the source driver circuit drives a plurality of source lines, so as to perform a function on a plurality of pixels connected to the gate lines. In a scan sub-period of the frame period, the gate driver circuit drives the gate lines according to a scan sequence, and the source driver circuit correspondingly drives the source lines according to the scan sequence of the gate driver circuit in the first scan sub-period, so as to display an image.

    Electrostatic discharge protection circuit

    公开(公告)号:US10147717B2

    公开(公告)日:2018-12-04

    申请号:US15247943

    申请日:2016-08-26

    Abstract: In the disclosure, an electrostatic discharge (ESD) protection circuit is coupled between a first power rail and a second power rail to discharge any ESD stress. The ESD protection circuit includes a detection circuit, a triggering circuit, and a dual silicon controlled rectifier (DSCR) device. When an ESD stresses is being applied to the first or second power rail, the detection circuit may first detect the ESD stresses and output a detection signal to the triggering circuit. The triggering circuit generates a triggering signal based on the detection signal and the polarity of the ESD stress. Then, the DSCR device is symmetrically triggered based on the triggering signal received at a common node between at least two transistors of the same type. The exemplary ESD protection circuit may be implemented in nanoscale manufactured integrated circuit and achieve good ESD robustness while maintaining low standby leakage current and relatively small silicon footprint.

    ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT
    34.
    发明申请
    ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT 审中-公开
    静电放电保护电路

    公开(公告)号:US20170069618A1

    公开(公告)日:2017-03-09

    申请号:US15247943

    申请日:2016-08-26

    CPC classification number: H01L27/0262 H01L27/0292 H01L27/0635 H02H9/046

    Abstract: In the disclosure, an electrostatic discharge (ESD) protection circuit is coupled between a first power rail and a second power rail to discharge any ESD stress. The ESD protection circuit includes a detection circuit, a triggering circuit, and a dual silicon controlled rectifier (DSCR) device. When an ESD stresses is being applied to the first or second power rail, the detection circuit may first detect the ESD stresses and output a detection signal to the triggering circuit. The triggering circuit generates a triggering signal based on the detection signal and the polarity of the ESD stress. Then, the DSCR device is symmetrically triggered based on the triggering signal received at a common node between at least two transistors of the same type. The exemplary ESD protection circuit may be implemented in nanoscale manufactured integrated circuit and achieve good ESD robustness while maintaining low standby leakage current and relatively small silicon footprint.

    Abstract translation: 在本公开中,静电放电(ESD)保护电路耦合在第一电源轨和第二电源轨之间以排放任何ESD应力。 ESD保护电路包括检测电路,触发电路和双可控硅整流器(DSCR)装置。 当ESD应力施加到第一或第二电力轨时,检测电路可以首先检测ESD应力并将检测信号输出到触发电路。 触发电路基于检测信号和ESD应力的极性产生触发信号。 然后,基于在同一类型的至少两个晶体管之间的公共节点处接收的触发信号来对称地触发DSCR设备。 示例性ESD保护电路可以在纳米级制造的集成电路中实现,并且在保持低待机漏电流和相对较小的硅封装的同时实现良好的ESD鲁棒性。

    SOURCE DRIVER AND CONTROL METHOD THEREOF AND DISPLAY DEVICE
    35.
    发明申请
    SOURCE DRIVER AND CONTROL METHOD THEREOF AND DISPLAY DEVICE 审中-公开
    源驱动器及其控制方法及显示装置

    公开(公告)号:US20150310816A1

    公开(公告)日:2015-10-29

    申请号:US14676801

    申请日:2015-04-01

    CPC classification number: G09G3/3614 G09G2310/0248 G09G2330/023

    Abstract: A source driver, a control method thereof and a display device are provided. The source driver includes a plurality of first channels, a plurality of second channels, a first conductor, a second conductor, a plurality of first switches and a plurality of second switches. During a driving period, the outputs of the first channels belong to a first polarity, and the outputs of the second channels belong to a second polarity different from the first polarity. The first terminals of the first switches are coupled to the first conductor. The second terminals of the first switches are coupled to the output terminals of the first channels, respectively. The first terminals of the second switches are coupled to the second conductor. The second terminals of the second switches are coupled to the output terminals of the second channels, respectively.

    Abstract translation: 提供源驱动器,其控制方法和显示装置。 源极驱动器包括多个第一通道,多个第二通道,第一导体,第二导​​体,多个第一开关和多个第二开关。 在驱动期间,第一通道的输出属于第一极性,第二通道的输出属于与第一极性不同的第二极性。 第一开关的第一端子耦合到第一导体。 第一开关的第二端子分别耦合到第一通道的输出端子。 第二开关的第一端子耦合到第二导体。 第二开关的第二端子分别耦合到第二通道的输出端子。

    Output stage circuit
    36.
    发明授权
    Output stage circuit 有权
    输出级电路

    公开(公告)号:US08917121B2

    公开(公告)日:2014-12-23

    申请号:US13717648

    申请日:2012-12-17

    CPC classification number: G05F3/16 G05F3/205

    Abstract: An output stage circuit includes: a first transistor, including a first terminal coupled to a first node, a second terminal coupled to an output terminal, a third terminal coupled to an input terminal for receiving an input voltage, and a fourth terminal coupled to a first power terminal for receiving a first voltage; a second transistor, including a first terminal coupled to a second node, a second terminal coupled to the output terminal, a third terminal coupled to the input terminal for receiving the input voltage, and a fourth terminal coupled to ground; and a current source, coupled to the output terminal for providing a constant current.

    Abstract translation: 输出级电路包括:第一晶体管,包括耦合到第一节点的第一端子,耦合到输出端子的第二端子,耦合到用于接收输入电压的输入端子的第三端子,以及耦合到第一端子的第四端子 用于接收第一电压的第一电源端子; 第二晶体管,包括耦合到第二节点的第一端子,耦合到输出端子的第二端子,耦合到输入端子用于接收输入电压的第三端子和耦合到地的第四端子; 以及耦合到输出端子以提供恒定电流的电流源。

    AMPLIFIER CIRCUIT WITH OVERSHOOT SUPPRESSION
    37.
    发明申请
    AMPLIFIER CIRCUIT WITH OVERSHOOT SUPPRESSION 审中-公开
    放大器电路与OVERSHOOT抑制

    公开(公告)号:US20140368271A1

    公开(公告)日:2014-12-18

    申请号:US14474315

    申请日:2014-09-02

    Abstract: An amplifier circuit with overshoot suppress scheme including an input amplifier, an output amplifier, and a diode is provided. A first and a second input ends of the output amplifier are coupled to an output of the input amplifier. The diode is coupled between an output end and the first input end of the output amplifier. When the voltage difference between the output and the input ends of the output amplifier is greater then the barrier voltage of the diode, the diode is turned on, so that the output end of the output amplifier is coupled to the input end of the output amplifier. In the transient state, it rapidly smoothes the overshoot signal. In the steady state, the diode is cut off to maintain the normal operation of the operational amplifier.

    Abstract translation: 提供了具有输入放大器,输出放大器和二极管的具有过冲抑制方案的放大器电路。 输出放大器的第一和第二输入端耦合到输入放大器的输出端。 二极管耦合在输出端和输出放大器的第一输入端之间。 当输出放大器的输出端和输入端之间的电压差大于二极管的势垒电压时,二极管导通,使得输出放大器的输出端耦合到输出放大器的输入端 。 在瞬态状态下,它会快速平滑过冲信号。 在稳定状态下,二极管被切断以保持运算放大器的正常工作。

    OPERATIONAL AMPLIFIER CIRCUIT AND METHOD FOR ENHANCING DRIVING CAPACITY THEREOF
    38.
    发明申请
    OPERATIONAL AMPLIFIER CIRCUIT AND METHOD FOR ENHANCING DRIVING CAPACITY THEREOF 有权
    操作放大器电路和用于增强其驱动能力的方法

    公开(公告)号:US20140218111A1

    公开(公告)日:2014-08-07

    申请号:US14016136

    申请日:2013-09-02

    Abstract: An operational amplifier circuit configured to drive a load is provided. The operational amplifier circuit includes an output stage module. The output stage module includes a detection circuit and an output stage circuit. The detection circuit is configured to detect a current output voltage and a previous output voltage based on a comparison result of a current input voltage and the current output voltage. The detection circuit enhances a charge capacity or a discharge capacity of the output stage circuit for the load based on a detection result. Furthermore, a method for enhancing the driving capacity of the operational amplifier circuit is also provided.

    Abstract translation: 提供了构造成驱动负载的运算放大器电路。 运算放大器电路包括输出级模块。 输出级模块包括检测电路和输出级电路。 检测电路被配置为基于当前输入电压和电流输出电压的比较结果来检测电流输出电压和先前的输出电压。 检测电路基于检测结果增强负载的输出级电路的充电容量或放电容量。 此外,还提供了一种用于增强运算放大器电路的驱动能力的方法。

    DRIVING METHOD FOR REDUCING EMI AND DEVICE USING THE SAME
    39.
    发明申请
    DRIVING METHOD FOR REDUCING EMI AND DEVICE USING THE SAME 审中-公开
    用于降低EMI的驱动方法及其使用的装置

    公开(公告)号:US20140210698A1

    公开(公告)日:2014-07-31

    申请号:US13974069

    申请日:2013-08-23

    CPC classification number: G09G3/3614 G09G2330/023 G09G2330/06

    Abstract: A driving method for reducing EMI in a driving device includes detecting a voltage difference between a first display voltage and a second display voltage which correspond to the same pixel, for generating a detecting signal; and adjusting an operating method of a charge sharing switch utilized for performing charge sharing in the driving device according to the detecting signal.

    Abstract translation: 用于降低驱动装置中的EMI的驱动方法包括检测对应于相同像素的第一显示电压和第二显示电压之间的电压差,以产生检测信号; 以及调整用于根据检测信号在驱动装置中执行电荷共享的电荷共享开关的操作方法。

    GAMMA-VOLTAGE GENERATOR
    40.
    发明申请
    GAMMA-VOLTAGE GENERATOR 审中-公开
    伽马电压发电机

    公开(公告)号:US20140043313A1

    公开(公告)日:2014-02-13

    申请号:US14058304

    申请日:2013-10-21

    Abstract: A gamma-voltage generator is provided to generating a plurality of first gamma voltages and second gamma voltages. At least one of the first gamma voltages generated by DACs of the gamma-voltage generator within a first frame period and at least one of the second gamma voltages generated by the DACs within a second frame period are outputted from a same one of the gamma buffers of the gamma-voltage generator, whereby the transmitted gamma voltages have substantially equal offset. Therefore, the display quality approaches an ideal condition.

    Abstract translation: 提供伽马电压发生器以产生多个第一伽马电压和第二伽马电压。 在第一帧周期内由伽马电压发生器的DAC产生的第一伽马电压中的至少一个和由第二帧周期内的DAC产生的第二伽马电压中的至少一个从相同的一个伽马缓冲器输出 的γ电压发生器,由此所传输的伽马电压具有基本相等的偏移。 因此,显示质量接近理想状态。

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