公开(公告)号：US20150149864A1

公开(公告)日：2015-05-28

申请号：US14088867

申请日：2013-11-25

Applicant: QUALCOMM Incorporated

Inventor： Taehyun Kim ,  Jung Pill Kim ,  Sungryul Kim

IPC: G06F11/10

CPC classification number: G06F11/102 ,  G06F11/1064 ,  G06F12/00

Abstract: A particular device includes a resistance-based memory device, a tag random-access memory (RAM), and a bit recovery (BR) memory. The resistance-based memory device is configured to store a data value and error-correcting code (ECC) data associated with the data value. The tag RAM is configured to store information that maps memory addresses of a main memory to wordlines of a cache memory, where the cache memory includes the resistance-based memory device. The BR memory is configured to store additional error correction data associated with the data value, where the BR memory corresponds to a volatile memory device.

Abstract translation: 特定设备包括基于电阻的存储器件，标签随机存取存储器（RAM）和位恢复（BR）存储器。 基于电阻的存储器件被配置为存储与数据值相关联的数据值和纠错码（ECC）数据。 标签RAM被配置为存储将主存储器的存储器地址映射到高速缓冲存储器的字线的信息，其中高速缓冲存储器包括基于电阻的存储器件。 BR存储器被配置为存储与数据值相关联的附加纠错数据，其中BR存储器对应于易失性存储器设备。

公开(公告)号：US20150134897A1

公开(公告)日：2015-05-14

申请号：US14244173

申请日：2014-04-03

Applicant: QUALCOMM Incorporated

Inventor： Deepti Vijayalakshmi Sriramagiri ,  Jung Pill Kim ,  Jungwon Suh ,  Xiangyu Dong

IPC: G11C11/406

CPC classification number: G11C11/40618 ,  G11C11/406 ,  G11C11/40603 ,  G11C11/40615 ,  G11C11/40626 ,  G11C2211/406

Abstract: A method includes sending a first signal from a memory device to a memory controller. The first signal indicates to the memory controller that particular memory cells of the memory device are to be refreshed by the memory device.

Abstract translation: 一种方法包括将第一信号从存储器件发送到存储器控制器。 第一信号向存储器控制器指示存储器件将刷新存储器件的特定存储器单元。

公开(公告)号：US20150036409A1

公开(公告)日：2015-02-05

申请号：US13953771

申请日：2013-07-30

Applicant: QUALCOMM Incorporated

Inventor： Seong-Ook Jung ,  Taehui Na ,  Jisu Kim ,  Jung Pill Kim ,  Seung H. Kang

IPC: G11C11/16 ,  H01L43/02

CPC classification number: G11C11/161 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675 ,  H01L43/02

Abstract: An apparatus includes a group of data cells and a reference cell coupled to the group of data cells. The reference cell includes four magnetic tunnel junction (MTJ) cells.

Abstract translation: 一种装置包括一组数据单元和耦合到该组数据单元的参考单元。 参考单元包括四个磁隧道结（MTJ）单元。

公开(公告)号：US20140222880A1

公开(公告)日：2014-08-07

申请号：US13759130

申请日：2013-02-05

Applicant: QUALCOMM INCORPORATED

Inventor： Wenqing Wu ,  Peiyuan Wang ,  Raghu Sagar Madala ,  Senthil Kumar Govindaswamy ,  Kendrick H. Yuen ,  Robert P. Gilmore ,  Jung Pill Kim ,  Seung H. Kang

IPC: G06F7/58

CPC classification number: G06F7/58 ,  G06F7/588

Abstract: A method and apparatus for generating random binary sequences from a physical entropy source having a state A and a state B by detecting whether the physical entropy source is in the state A or in the state B, attempting to shift the state of the physical entropy source to the opposite state in a probabilistic manner with less than 100% certainty, and producing one of four outputs based on the detected state and the state of the physical entropy source before the attempted shift. The outputs are placed in first and second queues and extracted in pairs from each queue. Random binary bits are output based on the sequences extracted from each queue.

Abstract translation: 一种用于通过检测物理熵源是处于状态A还是处于状态B从具有状态A和状态B的物理熵源生成随机二进制序列的方法和装置，试图移动物理熵源的状态 以小于100％确定性的概率方式处于相反状态，并且在尝试移位之前基于检测到的状态和物理熵源的状态产生四个输出中的一个。 将输出放置在第一和第二队列中，并从每个队列成对提取。 基于从每个队列提取的序列输出随机二进制位。

公开(公告)号：US20140215294A1

公开(公告)日：2014-07-31

申请号：US13752419

申请日：2013-01-29

Applicant: QUALCOMM INCORPORATED

Inventor： Jung Pill Kim ,  Taehyun Kim ,  Sungryul Kim

IPC: G06F11/08

CPC classification number: G06F11/1048 ,  G11C11/16 ,  G11C17/02 ,  G11C17/146 ,  G11C17/18 ,  G11C29/027 ,  G11C2029/4402

Abstract: A circuit includes a first one-time programmable (OTP) element and a second OTP element. The circuit also includes error detection circuitry coupled to receive a first representation of data from the first OTP element. The circuit further includes output circuitry responsive to an output of the error detection circuitry to output an OTP read result based on the first representation of the data or based on a second representation of the data from the second OTP element.

Abstract translation: 电路包括第一个一次性可编程（OTP）元件和第二个OTP元件。 电路还包括耦合以从第一OTP元件接收数据的第一表示的错误检测电路。 电路还包括响应于错误检测电路的输出的输出电路，以基于数据的第一表示或基于来自第二OTP元件的数据的第二表示来输出OTP读取结果。

公开(公告)号：US20140140162A1

公开(公告)日：2014-05-22

申请号：US13680361

申请日：2012-11-19

Applicant: QUALCOMM INCORPORATED

Inventor： Jung Pill Kim ,  Taehyun Kim ,  Sungryul Kim

IPC: G11C8/16

CPC classification number: G11C7/20 ,  G11C16/20 ,  G11C29/44 ,  G11C29/789 ,  G11C2029/4402

Abstract: A memory device is provided including a cell array and a volatile storage device. The cell array may include a plurality of word lines, a plurality of bit lines, wherein a selection of a word line and bit line defines a memory cell address, and a non-volatile reserved word line for storing configuration information for the cell array. The volatile storage device is coupled to the cell array. The configuration information from the non-volatile reserved word line is copied to the volatile storage device upon power-up or initialization of the memory device.

Abstract translation: 提供了包括单元阵列和易失性存储装置的存储装置。 单元阵列可以包括多个字线，多个位线，其中字线和位线的选择定义存储器单元地址，以及用于存储单元阵列的配置信息的非易失性保留字线。 易失性存储设备耦合到单元阵列。 来自非易失性保留字线的配置信息在上电或初始化存储器件时被复制到易失性存储设备。

公开(公告)号：US08717811B2

公开(公告)日：2014-05-06

申请号：US13785338

申请日：2013-03-05

Applicant: QUALCOMM Incorporated ,  Industry-Academic Cooperation Foundation, Yonsei University

Inventor： Seong-Ook Jung ,  Kyungho Ryu ,  Jisu Kim ,  Jung Pill Kim ,  Seung H. Kang

IPC: G11C11/00

CPC classification number: G11C11/1675 ,  G11C11/1659 ,  G11C11/1673 ,  G11C13/0002 ,  G11C14/009

Abstract: A non-volatile latch circuit includes a pair of cross-coupled inverters, a pair of resistance-based memory elements, and write circuitry configured to write data to the pair of resistance-based memory elements. The pair of resistance-based memory elements is isolated from the pair of cross-coupled inverters during a latching operation. A sensing circuit includes a first current path that includes a resistance-based memory element and an output of the sensing circuit. The sensing circuit includes a second current path to reduce current flow through the resistance-based memory element at a first operating point of the sensing circuit.

Abstract translation: 非易失性锁存电路包括一对交叉耦合的反相器，一对基于电阻的存储器元件和被配置为将数据写入到该对基于电阻的存储器元件的写入电路。 在锁定操作期间，一对基于电阻的存储器元件与一对交叉耦合的反相器隔离。 感测电路包括第一电流路径，其包括基于电阻的存储元件和感测电路的输出。 感测电路包括第二电流路径，以减小在感测电路的第一工作点处通过基于电阻的存储元件的电流。

公开(公告)号：US20140119097A1

公开(公告)日：2014-05-01

申请号：US14147817

申请日：2014-01-06

Applicant: QUALCOMM Incorporated

Inventor： Wuyang Hao ,  Jungwon Suh ,  Kangho Lee ,  Taehyun Kim ,  Jung Pill Kim ,  Seung Hyuk Kang

IPC: G11C13/00

CPC classification number: G11C13/0069 ,  G11C11/16 ,  G11C11/1653 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675 ,  G11C13/0002 ,  G11C13/003 ,  G11C2213/72 ,  G11C2213/74

Abstract: A resistance-based memory includes a two-diode access device. In a particular embodiment, a method includes biasing a bit line with a first voltage. The method further includes biasing the sense line with a second voltage. Biasing the bit line and biasing the sense line generates a current through a resistance-based memory element and through one of a first diode and a second diode. A cathode of the first diode is coupled to the bit line and an anode of the second diode is coupled to the sense line.

Abstract translation: 基于电阻的存储器包括二极管接入设备。 在特定实施例中，一种方法包括利用第一电​​压来偏置位线。 该方法还包括利用第二电压来偏置感测线。 偏置位线并偏置感测线通过电阻型存储元件并通过第一二极管和第二二极管之一产生电流。 第一二极管的阴极耦合到位线，并且第二二极管的阳极耦合到感测线。

公开(公告)号：US20130163319A1

公开(公告)日：2013-06-27

申请号：US13772411

申请日：2013-02-21

Applicant: QUALCOMM Incorporated

Inventor： Hari M. Rao ,  Jung Pill Kim

IPC: G11C11/16 ,  G06F17/50

CPC classification number: G11C11/16 ,  G06F17/50 ,  G11C8/16 ,  G11C11/1653 ,  G11C11/1655 ,  G11C11/1657 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675 ,  G11C13/003 ,  G11C2213/74 ,  G11C2213/79

Abstract: A particular method of accessing a multi-port non-volatile memory device includes executing a first memory operation with respect to a first memory cell while executing a second memory operation with respect to a second memory cell. The first memory operation is via a first port and the second memory operation is via a second port. The first memory cell includes a first non-volatile memory that includes a first resistive memory structure. The second memory cell includes a second non-volatile memory that includes a second resistive memory structure. The first memory cell and the second memory cell are each accessible via the first port and the second port.

Abstract translation: 访问多端口非易失性存储器件的特定方法包括在执行相对于第二存储器单元的第二存储器操作时，相对于第一存储器单元执行第一存储器操作。 第一存储器操作是经由第一端口，并且第二存储器操作是经由第二端口。 第一存储单元包括第一非易失性存储器，其包括第一电阻存储器结构。 第二存储单元包括第二非易失性存储器，其包括第二电阻存储器结构。 第一存储单元和第二存储单元可以经由第一端口和第二端口访问。

公开(公告)号：US10060880B2

公开(公告)日：2018-08-28

申请号：US15266342

申请日：2016-09-15

Applicant: QUALCOMM Incorporated

Inventor： Wei-Chuan Chen ,  Jung Pill Kim ,  Seung Hyuk Kang

IPC: G01N27/74 ,  G01R33/09 ,  B82Y25/00

CPC classification number: G01N27/745 ,  B82Y25/00 ,  G01R33/09 ,  G01R33/093 ,  G01R33/098

Abstract: Magnetoresistive (MR) sensors employing dual MR devices for differential MR sensing are provided. These MR sensors may be used as biosensors to detect the presence of biological materials as an example. An MR sensor includes dual MR sensor devices that may be tunnel magnetoresistive (TMR) devices or giant magnetoresistive (GMR) devices as examples. The MR devices are arranged such that a channel is formed between the MR devices for receiving magnetic nanoparticles. A magnetic stray field generated by the magnetic nanoparticles causes free layers in the MR devices to rotate in opposite directions, thus causing differential resistances between the MR devices for greater sensing sensitivity. Further, as another aspect, by providing the channel between the MR devices, the magnetic stray field generated by the magnetic nanoparticles can more easily rotate the magnetic moment orientation of the free layers in the MR devices, thus further increasing sensitivity.