公开(公告)号：US10600894B2

公开(公告)日：2020-03-24

申请号：US16027002

申请日：2018-07-03

Applicant: QUALCOMM Incorporated

Inventor： Sinan Goktepeli ,  Plamen Vassilev Kolev ,  Peter Graeme Clarke

IPC: H01L29/737 ,  H01L29/417 ,  H01L29/423 ,  H01L29/06 ,  H01L29/10 ,  H01L29/08 ,  H01L29/45 ,  H01L29/66 ,  H01L21/762 ,  H01L21/3105 ,  H01L21/306 ,  H01L21/02

Abstract: A Bipolar Junction Transistor (BJT) comprises an emitter, a collector, and a base between the emitter and the collector. The BJT also comprises an emitter contact on a first side of the BJT, a base contact on the first side of the BJT, and a collector contact on a second side of the BJT. The BJT further comprises a Deep Trench Isolation (DTI) region extending from the first side of the BJT to the second side of the BJT.

公开(公告)号：US10431558B2

公开(公告)日：2019-10-01

申请号：US15988916

申请日：2018-05-24

Applicant: QUALCOMM Incorporated

Inventor： Sinan Goktepeli

IPC: H01L21/36 ,  H01L21/00 ,  H01L23/66 ,  H01L41/09 ,  H01L27/146 ,  H01L23/522 ,  H01L29/66 ,  H01L29/786 ,  H01L27/12 ,  H01L23/48

Abstract: An integrated radio frequency (RF) circuit structure may include an active device on a first surface of an isolation layer. The integrated RF circuit structure may also include a back-bias metallization on a second surface opposite the first surface of the isolation layer. A body of the active device is biased by the back-bias metallization. The integrated RF circuit structure may further include a handle substrate on a front-side dielectric layer on the active device.

公开(公告)号：US10420171B2

公开(公告)日：2019-09-17

申请号：US15249143

申请日：2016-08-26

Applicant: QUALCOMM Incorporated

Inventor： Sinan Goktepeli

IPC: H01L23/48 ,  H04W88/02 ,  H01L27/12 ,  H01L23/66 ,  H01L21/84 ,  H01L21/762 ,  H01L21/18 ,  H01L21/768 ,  H01L23/485 ,  H01L27/092 ,  H01L21/8238 ,  H01L27/06

Abstract: An integrated circuit device includes only semiconductor devices with a same first polarity on one side of an insulator layer and only semiconductor devices with a different second polarity on an opposite side of the insulator layer to reduce size and complexity of the integrated circuit device as well as reducing the process steps associated with fabricating the integrated circuit device. Shared contacts between backside source/drain regions or spacers of the semiconductor devices with the first polarity and front-side source/drain regions or spacers of the semiconductor devices with the first polarity are used to connect the semiconductor devices on opposite sides of the insulator layer.

公开(公告)号：US10326028B1

公开(公告)日：2019-06-18

申请号：US15865117

申请日：2018-01-08

Applicant: QUALCOMM Incorporated

Inventor： Plamen Vassilev Kolev ,  Sinan Goktepeli ,  Peter Graeme Clarke

IPC: H01L21/02 ,  H01L23/60 ,  H01L23/64 ,  H01L27/02 ,  H01L29/06 ,  H01L29/66 ,  H01L29/86 ,  H01L23/522 ,  H01L23/528 ,  H01L23/552 ,  H01L29/8605 ,  H01L29/40

CPC classification number: H01L29/86 ,  H01L21/02532 ,  H01L23/5225 ,  H01L23/528 ,  H01L23/552 ,  H01L23/60 ,  H01L23/647 ,  H01L27/0285 ,  H01L27/0292 ,  H01L27/0296 ,  H01L29/0649 ,  H01L29/0684 ,  H01L29/405 ,  H01L29/66083 ,  H01L29/8605

Abstract: A resistor may include a semiconductor layer having a source region, a drain region, and a channel region. The channel region may be between the source region and the drain region. The channel region may have a same polarity as the source region and the drain region. The resistor may further include a first inter-metal dielectric (IMD) layer on the channel region. The resistor may further include a front-side gate shield on the first IMD layer. The front-side gate shield may overlap the channel region.

公开(公告)号：US09755029B1

公开(公告)日：2017-09-05

申请号：US15189916

申请日：2016-06-22

Applicant: QUALCOMM Incorporated

Inventor： Sinan Goktepeli

IPC: H01L29/40 ,  H01L21/44 ,  H01L29/417 ,  H01L23/66

CPC classification number: H01L23/5225 ,  H01L23/481 ,  H01L23/66 ,  H01L27/3272 ,  H01L29/4175 ,  H01L31/02164 ,  H01L2223/6677 ,  H01L2224/03002 ,  H01L2224/0401 ,  H01L2224/11002 ,  H01L2224/13022 ,  H01L2924/1421

Abstract: An integrated radio frequency (RF) circuit structure may include an active device on a first surface of an isolation layer. The integrated RF circuit structure may also include backside metallization on a second surface opposite the first surface of the isolation layer. A body of the active device is biased by the backside metallization. The integrated RF circuit structure may further include front-side metallization coupled to the backside metallization with a via. The front-side metallization is arranged distal from the backside metallization. The front-side metallization, the via, and the backside metallization may at least partially enclose the active device.

公开(公告)号：US20160372364A1

公开(公告)日：2016-12-22

申请号：US14740505

申请日：2015-06-16

Applicant: QUALCOMM Incorporated

Inventor： Sinan Goktepeli

IPC: H01L21/762 ,  H01L23/522 ,  H01L29/06

CPC classification number: H01L21/76256 ,  H01L21/304 ,  H01L21/30604 ,  H01L21/561 ,  H01L21/78 ,  H01L23/5226 ,  H01L29/0649

Abstract: Bonded semiconductor device structures and device structure fabrication processes to obviate the need for SOI wafers in many device fabrication applications are disclosed. In some examples, multiple etch stop layers are formed in situ during fabrication of an active device structure on a bulk semiconductor wafer. The etch stop layers are incorporated into in a layer transfer process to enable very thin high quality active device layers of substantially uniform across-wafer thickness to be separated from bulk semiconductor wafers and bonded to handle wafers. As a result, these examples can produce high-performance and low-power semiconductor devices while avoiding the high cost of SOI wafers.

Abstract translation: 公开了结合的半导体器件结构和器件结构制造工艺以避免在许多器件制造应用中对SOI晶片的需要。 在一些示例中，在体半导体晶片上的有源器件结构的制造期间，原位形成多个蚀刻停止层。 蚀刻停止层被并入到层转移过程中，以使非常薄的高质量有源器件层具有基本上均匀的跨晶片厚度，以与体半导体晶片分离并结合到处理晶片。 结果，这些示例可以产生高性能和低功率半导体器件，同时避免SOI晶片的高成本。