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31.发明申请公开(公告)号：US20130015900A1
公开(公告)日：2013-01-17
申请号：US13625697
申请日：2012-09-24
Applicant: STMICROELECTRONICS (ROUSSET) SAS
Inventor： Mathieu Lisart , Fabrice Marinet
CPC classification number: G06F1/26 , G06F21/72 , G06K19/07309 , H01L21/76224 , H01L23/576 , H01L2924/0002 , H03K3/84 , H03K19/003 , H04L9/004 , H04L2209/12 , Y10T29/49155 , H01L2924/00
Abstract: The disclosure relates to a countermeasure method in an electronic microcircuit, comprising successive process phases executed by a circuit of the microcircuit, and adjusting a power supply voltage between power supply and ground terminals of the circuit, as a function of a random value generated for the process phase, at each process phase executed by the circuit.
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公开(公告)号：US11853765B2
公开(公告)日：2023-12-26
申请号：US17721193
申请日：2022-04-14
Inventor： Michael Peeters , Fabrice Marinet
IPC: G06F9/30
CPC classification number: G06F9/30185 , G06F9/30134 , G06F9/30145 , G06F9/30105
Abstract: The disclosure includes a method of authenticating a processor that includes an arithmetic and logic unit. At least one decoded operand of at least a portion of a to-be-executed opcode is received on a first terminal of the arithmetic and logic unit. A signed instruction is received on a second terminal of the arithmetic and logic unit. The signed instruction combines a decoded instruction of the to-be-executed opcode and a previous calculation result of the arithmetic and logic unit.
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公开(公告)号：US11663365B2
公开(公告)日：2023-05-30
申请号：US16928901
申请日：2020-07-14
Inventor： Marc Benveniste , Fabien Journet , Fabrice Marinet
CPC classification number: G06F21/75 , G06F1/08 , G06F3/1238 , G06F21/44 , G06F21/72 , H04L9/3236 , H04L9/3247
Abstract: Authenticating a device using processing circuitry that generates fingerprints based on states of a plurality of nodes that are coupled to a plurality of circuits. A first fingerprint is generated at a first time based on first states of the plurality of nodes. A second fingerprint is generated at a second time based on second states of the plurality of nodes, the first fingerprint influencing the second states. Electronic data is obtained from the device to be authenticated. The electronic data is compared with a fingerprint generated and a determination whether to authorize operation of the device is made based on a result of the comparison.
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公开(公告)号：US11387194B2
公开(公告)日：2022-07-12
申请号：US15930217
申请日：2020-05-12
Applicant: STMicroelectronics (Rousset) SAS
Inventor： Alexandre Sarafianos , Fabrice Marinet , Julien Delalleau
Abstract: A semiconductor substrate has a front face and a back face. A first contact and a second contact, spaced apart from each other, are located on the front face. An electrically conductive wafer is located on the back face. A detection circuit is configured to detect a thinning of the substrate from the back face. The detection circuit including a measurement circuit that takes a measurement of a resistive value of the substrate between said at least one first contact, said at least one second contact and said electrically conductive wafer. Thinning is detected in response to the measured resistive value.
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公开(公告)号：US11329011B2
公开(公告)日：2022-05-10
申请号：US17113645
申请日：2020-12-07
Applicant: STMicroelectronics (Rousset) SAS
Inventor： Pascal Fornara , Fabrice Marinet
IPC: H01L23/00 , H01L23/522 , H01L23/528 , H01L23/58 , H01L29/8605
Abstract: An integrated circuit is protected against at attack. An electrically conductive body at floating potential is situated in the integrated circuit. The electrically conductive body has an initial amount of electric charge prior to the attack and functions to collect electric charge as a result of the attack. A detection circuit operates to detect an amount of electric charge collected on the electrically conductive body and determine whether the collected amount is different from the initial amount. If the detected amount of charge is different from the initial amount, a control circuit trigger the taking of a protective action.
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Patent Agency Ranking
公开(公告)号：US10943876B2
公开(公告)日：2021-03-09
申请号：US16520458
申请日：2019-07-24
Applicant: STMicroelectronics (Rousset) SAS
Inventor： Fabrice Marinet , Pascal Fornara
IPC: H01L23/00 , H01L23/48 , H01L27/11521 , G11C16/10 , G11C16/14
Abstract: An attack on an integrated circuit using a beam of electrically charged particles is detected by collecting charges due to the attack using at least one electrically conductive body that is electrically coupled to the floating gate of a state transistor. Prior to the attack, the state transistor is configured to confer an initial threshold voltage. The collected charges passed to the floating gate cause a modification of the threshold voltage of the state transistor. Detection of the attack is made by determining that the threshold voltage of the state transistor is different from the initial threshold voltage.
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公开(公告)号：US10886240B2
公开(公告)日：2021-01-05
申请号：US16518755
申请日：2019-07-22
Applicant: STMicroelectronics (Rousset) SAS
Inventor： Pascal Fornara , Fabrice Marinet
IPC: H01L23/00 , H01L23/522 , H01L23/528 , H01L23/58 , H01L29/8605
Abstract: An integrated circuit is protected against at attack. An electrically conductive body at floating potential is situated in the integrated circuit. The electrically conductive body has an initial amount of electric charge prior to the attack and functions to collect electric charge as a result of the attack. A detection circuit operates to detect an amount of electric charge collected on the electrically conductive body and determine whether the collected amount is different from the initial amount. If the detected amount of charge is different from the initial amount, a control circuit trigger the taking of a protective action.
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公开(公告)号：US10649916B2
公开(公告)日：2020-05-12
申请号：US15486947
申请日：2017-04-13
Inventor： Michael Peeters , Fabrice Marinet , Jean-Louis Modave
Abstract: A non-volatile memory is organized in pages and has a word writing granularity of one or more bytes and a block erasing granularity of one or more pages. Logical addresses are scrambling into physical addresses used to perform operations in the non-volatile memory. The scrambling includes scrambling logical data addresses based on a page structure of the non-volatile memory and scrambling logical code addresses based on a word structure of the non-volatile memory.
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公开(公告)号：US20170250795A1
公开(公告)日：2017-08-31
申请号：US15221749
申请日：2016-07-28
Applicant: STMicroelectronics (Rousset) SAS
Inventor： Thomas Ordas , Alexandre Sarafianos , Stephane Chesnais , Fabrice Marinet
CPC classification number: H04L9/002 , G06F1/04 , G06F21/72 , G06K19/07336 , G09C1/00 , H01L23/528 , H03K3/84 , H03K5/01 , H03K2005/00019 , H04K3/825 , H04K2203/32 , H04L9/003 , H04L2209/08 , H04L2209/805
Abstract: A device is provided for jamming electromagnetic radiation liable to be emitted by at least one portion of an interconnect region located above at least one zone of an integrated electronic circuit produced in and on a semiconductor substrate. The device includes an antenna located above the at least one zone of the circuit and generating circuit coupled to the antenna and configured to generate an electrical signal having at least one pseudo-random property to pass through the antenna.
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40.发明申请DETECTION OF THE AUTHENTICITY OF AN ELECTRONIC CIRCUIT OR OF A PRODUCT CONTAINING SUCH A CIRCUIT 有权检测电子电路或包含这种电路的产品的正确性公开(公告)号：US20170004333A1
公开(公告)日：2017-01-05
申请号：US14970161
申请日：2015-12-15
Inventor： Jean-Louis Modave , Fabrice Marinet , Denis Farison
Abstract: A method of authenticating a slave device. The method includes initializing, by a host device, a charge retention circuit of the slave device, and receiving, by the host device, an indication of a discharge time of the charge retention circuit. The host device authenticates the slave device based on the received indication of the discharge time of the charge retention device.
Abstract translation: 验证从设备的方法。 该方法包括通过主机设备初始化从设备的电荷保持电路，并且由主机设备接收电荷保持电路的放电时间的指示。 主机设备基于接收到的电荷保持装置的放电时间的指示来认证从设备。
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