公开(公告)号：US12176413B2

公开(公告)日：2024-12-24

申请号：US18179598

申请日：2023-03-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sanghyun Jo ,  Sangwook Kim ,  Yunseong Lee ,  Jinseong Heo

IPC: H01L29/51 ,  H01L27/06 ,  H01L49/02

Abstract: A ferroelectric structure includes a first polarization enhancement film on a ferroelectric film, wherein the ferroelectric film has a first net polarization in a first direction oriented from the ferroelectric film toward the first polarization enhancement film. The first polarization enhancement film has a second net polarization in a second direction crossing the first direction.

公开(公告)号：US12094971B2

公开(公告)日：2024-09-17

申请号：US18310022

申请日：2023-05-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yunseong Lee ,  Jinseong Heo ,  Sangwook Kim ,  Sanghyun Jo

IPC: H01L29/78 ,  H01L21/02 ,  H01L21/28 ,  H01L29/08 ,  H01L29/423 ,  H01L29/51 ,  H01L29/66 ,  H10B51/30

CPC classification number: H01L29/78391 ,  H01L21/02175 ,  H01L21/022 ,  H01L21/0228 ,  H01L29/0847 ,  H01L29/40111 ,  H01L29/42364 ,  H01L29/513 ,  H01L29/516 ,  H01L29/517 ,  H01L29/6684 ,  H01L21/02181 ,  H01L21/02189 ,  H10B51/30

Abstract: An electronic device includes a ferroelectric layer arranged on a channel region and a gate electrode arranged on the ferroelectric layer. The ferroelectric layer includes a plurality of first oxide monolayers and a second oxide monolayers that is arranged between the substrate and the gate electrode and include a material different from a material of the first oxide monolayers. The first oxide monolayers include oxide monolayers that are alternately formed and include materials different from one another.

公开(公告)号：US11862705B2

公开(公告)日：2024-01-02

申请号：US17208018

申请日：2021-03-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinseong Heo ,  Yunseong Lee ,  Taehwan Moon ,  Sanghyun Jo

IPC: H01L29/51 ,  H01L21/28

CPC classification number: H01L29/516 ,  H01L21/28158 ,  H01L29/40111

Abstract: An electronic device includes a seed layer including a two-dimensional (2D) material, and a ferroelectric layer on the seed layer. The ferroelectric layer is configured to be aligned in a direction in which a (111) crystal direction is perpendicular to a top surface of a substrate on which the seed layer is located and/or a top surface of the seed layer.

公开(公告)号：US11848366B2

公开(公告)日：2023-12-19

申请号：US17468098

申请日：2021-09-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Taehwan Moon ,  Eunha Lee ,  Junghwa Kim ,  Hyangsook Lee ,  Sanghyun Jo ,  Jinseong Heo

IPC: H01L21/02 ,  H01L29/423 ,  H01L21/28 ,  H01L49/02 ,  H01L29/51 ,  H10B12/00

CPC classification number: H01L29/42364 ,  H01L21/02304 ,  H01L21/02356 ,  H01L21/28158 ,  H01L28/40 ,  H01L29/40111 ,  H01L29/516 ,  H01L29/518 ,  H10B12/37

Abstract: Provided are an electronic device including a dielectric layer having an adjusted crystal orientation and a method of manufacturing the electronic device. The electronic device includes a seed layer provided on a substrate and a dielectric layer provided on the seed layer. The seed layer includes crystal grains having aligned crystal orientations. The dielectric layer includes crystal grains having crystal orientations aligned in the same direction as the crystal orientations of the seed layer.

公开(公告)号：US11824118B2

公开(公告)日：2023-11-21

申请号：US18060140

申请日：2022-11-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinseong Heo ,  Sangwook Kim ,  Yunseong Lee ,  Sanghyun Jo ,  Hyangsook Lee

IPC: H01L29/78 ,  H01L29/40 ,  H01L29/51

CPC classification number: H01L29/78391 ,  H01L29/401 ,  H01L29/516

Abstract: Provided are an electronic device and a method of manufacturing the same. The electronic device includes a ferroelectric crystallization layer between a substrate and a gate electrode and a crystallization prevention layer between the substrate and the ferroelectric crystallization layer. The ferroelectric crystallization layer is at least partially crystallized and includes a dielectric material having ferroelectricity or anti-ferroelectricity. Also, the crystallization prevention layer prevents crystallization in the ferroelectric crystallization layer from being spread toward the substrate.

公开(公告)号：US11527635B2

公开(公告)日：2022-12-13

申请号：US16890231

申请日：2020-06-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yunseong Lee ,  Sangwook Kim ,  Sanghyun Jo ,  Jinseong Heo ,  Hyangsook Lee

IPC: H01L29/51 ,  H01L29/78 ,  H01L21/02

Abstract: A ferroelectric thin-film structure includes at least one first atomic layer and at least one second atomic layer. The first atomic layer includes a first dielectric material that is based on an oxide, and the second atomic layer includes both the first dielectric material and a dopant that has a bandgap greater than a bandgap of the dielectric material.

公开(公告)号：US11417790B2

公开(公告)日：2022-08-16

申请号：US15942659

申请日：2018-04-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sanghyun Jo ,  Jaeho Lee ,  Haeryong Kim ,  Hyeonjin Shin

IPC: H01L21/76 ,  H01L23/48 ,  H01L31/107 ,  H01L31/02 ,  H01L31/0224 ,  H01L31/0352 ,  H01S5/0687 ,  G01S7/481 ,  H01L31/028 ,  H01L31/032 ,  H01L27/146 ,  H01L31/101 ,  H01L27/30 ,  G01S17/931 ,  H01L31/0304 ,  H01L31/0296 ,  H01L31/0312 ,  H01L31/0256 ,  G05D1/02

Abstract: A photodetector having a small form factor and having high detection efficiency with respect to both visible light and infrared rays may include a first electrode, a collector layer on the first electrode, a tunnel barrier layer on the collector layer, a graphene layer on the tunnel barrier layer, an emitter layer on the graphene layer, and a second electrode on the emitter layer. The photodetector may be included in an image sensor. An image sensor may include a substrate, an insulating layer on the substrate, and a plurality of photodetectors on the insulating layer. The photodetectors may be aligned with each other in a direction extending parallel or perpendicular to a top surface of the insulating layer. The photodetector may be included in a LiDAR system.

公开(公告)号：US11305365B2

公开(公告)日：2022-04-19

申请号：US16881377

申请日：2020-05-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinseong Heo ,  Yunseong Lee ,  Sanghyun Jo

IPC: B23K3/08 ,  B23K3/06 ,  H01L23/00 ,  H01L27/11585 ,  H01L29/66

Abstract: Provided are a logic switching device and a method of manufacturing the same. The logic switching device may include a domain switching layer adjacent to a gate electrode. The domain switching layer may include a ferroelectric material region and an anti-ferroelectric material region. The domain switching layer may be a non-memory element. The logic switching device may include a channel, a source and a drain both connected to the channel, the gate electrode arranged to face the channel, and the domain switching layer provided between the channel and the gate electrode.

公开(公告)号：US11004888B2

公开(公告)日：2021-05-11

申请号：US16692603

申请日：2019-11-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Haeryong Kim ,  Jaeho Lee ,  Sanghyun Jo ,  Hyeonjin Shin

IPC: H01L27/00 ,  H01L31/0216 ,  H01L27/146 ,  H01L31/032 ,  H01L31/0352 ,  H01L31/109 ,  G01J5/20

Abstract: A photoelectric conversion element and an optical sensor including the same are disclosed. The photoelectric conversion element may include a plurality of lattice stacks repeatedly stacked on top of each other on a substrate and configured to have an effective band gap. The plurality of lattice stacks may each include a first active layer and a second active layer on the first active layer. The first active layer may include a first two-dimensional material having a first band gap. The second active layer may include a second two-dimensional material having a second band gap not overlapping the first band gap. An effective band gap may be adjusted based on the first two-dimensional materials and thicknesses of the first active layer and the second active layer and a number of times of plurality of lattice stacks.

公开(公告)号：US10702940B2

公开(公告)日：2020-07-07

申请号：US16391477

申请日：2019-04-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinseong Heo ,  Yunseong Lee ,  Sanghyun Jo

IPC: B23K3/08 ,  B23K3/06 ,  H01L23/00

Abstract: Provided are a logic switching device and a method of manufacturing the same. The logic switching device may include a domain switching layer adjacent to a gate electrode. The domain switching layer may include a ferroelectric material region and an anti-ferroelectric material region. The domain switching layer may be a non-memory element. The logic switching device may include a channel, a source and a drain both connected to the channel, the gate electrode arranged to face the channel, and the domain switching layer provided between the channel and the gate electrode.