-
公开(公告)号:US06828671B2
公开(公告)日:2004-12-07
申请号:US10323447
申请日:2002-12-19
Applicant: Weddie Aquien , John Briar , Setho Sing Fee
Inventor: Weddie Aquien , John Briar , Setho Sing Fee
IPC: H01L2310
CPC classification number: H01L23/50 , H01L23/3675 , H01L24/48 , H01L2224/05599 , H01L2224/32225 , H01L2224/45099 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/8547 , H01L2924/00014 , H01L2924/01039 , H01L2924/12041 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/1517 , H01L2924/15311 , H01L2924/1532 , H01L2924/181 , H01L2924/3025 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2924/00012
Abstract: A new method is provided for the establishment of a low resistivity connection between a wire bonded IC chip that is mounted on a heatsink and the heatsink of the package. A copper trace connection is allocated for this purpose on the surface of the substrate layer to which the IC chip is connected. An opening is provided in the substrate layer of the package, this opening aligns with the copper trace that has been allocated for establishing a ground connection and penetrates the substrate layer down to the surface of the underlying heatsink. The opening is filled with a conductive epoxy or an equivalent low-resistivity material thereby establishing a direct electrical connection or short between the allocated copper trace and the underlying heatsink. By connecting the ground point of the IC chip to the allocated copper trace, a direct electrical low resistivity connection is made between the ground point of the IC chip and the heatsink into which the IC chip is mounted.
Abstract translation: 提供了一种新的方法,用于在安装在散热器上的引线接合IC芯片和封装的散热器之间的低电阻率连接。 用于此目的的铜迹线连接在与IC芯片连接的基板的表面上。 衬底中有一个开口,其与铜迹线对齐,用于建立接地连接并且穿透底层散热器的衬底。 开口填充有导电环氧树脂,在分配的铜迹线和底层散热器之间建立直接电连接。 通过将IC芯片的接地点连接到分配的铜迹线,在IC芯片的接地点和安装有IC芯片的散热器之间进行直接电阻低电阻连接。
-
公开(公告)号:US06746894B2
公开(公告)日:2004-06-08
申请号:US09839180
申请日:2001-04-19
Applicant: Setho Sing Fee , Lim Thiam Chye , Steven W. Heppler , Leng Nam Yin , Keith Tan , Patrick Guay , Edmund Lua Koon Tian , Yap Kah Eng , Eric Tan Swee Seng
Inventor: Setho Sing Fee , Lim Thiam Chye , Steven W. Heppler , Leng Nam Yin , Keith Tan , Patrick Guay , Edmund Lua Koon Tian , Yap Kah Eng , Eric Tan Swee Seng
IPC: H01L2144
CPC classification number: H01L21/568 , H01L21/4846 , H01L21/6835 , H01L23/24 , H01L23/3128 , H01L23/3675 , H01L23/49816 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/50 , H01L24/97 , H01L25/0655 , H01L25/105 , H01L2224/05554 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/4911 , H01L2224/85001 , H01L2224/97 , H01L2225/1035 , H01L2225/1058 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/181 , H01L2924/18165 , H01L2924/19107 , H01L2224/85 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
Abstract: A semiconductor device package interposer including a receptacle extending substantially therethrough. Methods for assembling the interposer with one or more semiconductor devices are also disclosed. A film may be secured to a bottom surface of the interposer so as to at least partially cover a bottom end of the receptacle. One or more semiconductor devices are positioned within the receptacle, on the film. Each semiconductor device within the receptacle may then be electrically connected to the interposer. An encapsulant material, which is introduced into the receptacle, extends at least between portions of the outer periphery of each semiconductor device within the receptacle and a peripheral edge of the receptacle. Upon curing, setting, or hardening, the encapsulant material retains each semiconductor device within the receptacle and maintains a lateral position of each semiconductor device with respect to the interposer. Semiconductor device packages and multi-chip modules are also disclosed.
-