公开(公告)号：US20110176038A1

公开(公告)日：2011-07-21

申请号：US12985371

申请日：2011-01-06

申请人： Yoshiyuki KUROKAWA ,  Takayuki IKEDA

发明人： Yoshiyuki KUROKAWA ,  Takayuki IKEDA

IPC分类号： H04N5/335 ,  H01L31/12

CPC分类号： G02F1/1354 ,  G02F1/133345 ,  G02F1/1362 ,  G02F1/1368 ,  G02F2202/10 ,  G09G3/3648 ,  G09G2360/144 ,  G09G2360/145 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/1443 ,  H01L27/14609 ,  H01L29/24 ,  H01L29/7869 ,  H01L31/145 ,  H04N5/3696

摘要： A semiconductor device includes a photodiode, a first transistor, and a second transistor. The photodiode has a function of supplying a charge corresponding to incident light to a gate of the first transistor, the first transistor has a function of accumulating the charge supplied to the gate, and the second transistor has a function of retaining the charge accumulated in the gate of the first transistor. The second transistor includes an oxide semiconductor.

摘要翻译： 半导体器件包括光电二极管，第一晶体管和第二晶体管。 光电二极管具有向入射光提供对应于入射光的电荷的功能，第一晶体管具有累积提供给栅极的电荷的功能，第二晶体管具有保持积累在栅极中的电荷的功能 第一晶体管的栅极。 第二晶体管包括氧化物半导体。

公开(公告)号：US20110043488A1

公开(公告)日：2011-02-24

申请号：US12848251

申请日：2010-08-02

申请人： Yoshiyuki KUROKAWA ,  Takayuki IKEDA

发明人： Yoshiyuki KUROKAWA ,  Takayuki IKEDA

IPC分类号： G06F3/042

CPC分类号： G06F3/042

摘要： A touch panel includes a plurality of pixels each of which is provided with a photo sensor including a photodiode, a first transistor, and a second transistor. Each pixel performs first operation in which a potential of a photodiode reset signal line which is electrically connected to the photodiode is set so that a forward bias is applied to the photodiode, second operation in which a potential of a gate of the first transistor is changed by a photocurrent of the photodiode, and third operation in which a potential of a gate of the second transistor is changed and the photo sensor output signal line and a photo sensor reference signal line are brought into conduction through the first transistor and the second transistor so that the potential of the photo sensor output signal line is changed in accordance with the photocurrent.

摘要翻译： 触摸面板包括多个像素，每个像素设置有包括光电二极管，第一晶体管和第二晶体管的光传感器。 每个像素执行第一操作，其中电连接到光电二极管的光电二极管重置信号线的电位被设置为使得正向偏压被施加到光电二极管，第二操作中第一晶体管的栅极的电位改变 通过光电二极管的光电流，以及第三操作，其中第二晶体管的栅极的电位改变，光传感器输出信号线和光传感器参考信号线通过第一晶体管和第二晶体管导通 光电传感器输出信号线的电位根据光电流而改变。

公开(公告)号：US20080002454A1

公开(公告)日：2008-01-03

申请号：US11762146

申请日：2007-06-13

申请人： Takayuki INOUE ,  Yoshiyuki KUROKAWA ,  Takayuki IKEDA

发明人： Takayuki INOUE ,  Yoshiyuki KUROKAWA ,  Takayuki IKEDA

IPC分类号： G11C11/40

CPC分类号： G11C7/12 ,  H01L21/84 ,  H01L27/112 ,  H01L27/12

摘要： In relation to reading of data in a memory, it is an object to provide a semiconductor device mounted with a low power consumption memory. A semiconductor device including a word line, a bit line, and a memory cell electrically connected to the word line and the bit line, further includes a precharge circuit for making the bit line have an electric potential for reading data stored in the memory cell. The precharge circuit is provided for each bit line and connected to the bit line. Further, the precharge circuit is capable of making each bit line have an electric potential for reading the data stored in the memory cell for each bit line.

摘要翻译： 关于在存储器中读取数据，目的是提供一种安装有低功耗存储器的半导体器件。 包括字线，位线和电连接到字线和位线的存储单元的半导体器件还包括用于使位线具有用于读取存储在存储单元中的数据的电位的预充电电路。 为每个位线提供预充电电路并连接到位线。 此外，预充电电路能够使每个位线具有用于读取存储在每个位线的存储单元中的数据的电位。

公开(公告)号：US20120120742A1

公开(公告)日：2012-05-17

申请号：US13359534

申请日：2012-01-27

申请人： Takayuki INOUE ,  Yoshiyuki KUROKAWA

发明人： Takayuki INOUE ,  Yoshiyuki KUROKAWA

IPC分类号： G11C7/10 ,  G11C7/00

CPC分类号： G11C5/141 ,  G11C5/142 ,  G11C29/70

摘要： An object is to provide a semiconductor device having a memory which can efficiently improve a yield by employing a structure which facilitates the use of a spare memory cell. The semiconductor device includes a memory cell array having a memory cell and a spare memory cell, a decoder connected to the memory cell and the spare memory cell, a data holding circuit connected to the decoder, and a battery which supplies electric power to the data holding circuit. The spare memory cell operates in accordance with an output from the data holding circuit.

摘要翻译： 目的是提供一种具有存储器的半导体器件，其可以通过采用有利于使用备用存储单元的结构来有效地提高产量。 半导体器件包括具有存储单元和备用存储单元的存储单元阵列，连接到存储单元和备用存储单元的解码器，连接到解码器的数据保持电路以及向数据提供电力的电池 保持电路。 备用存储单元根据数据保持电路的输出进行工作。

公开(公告)号：US20100328269A1

公开(公告)日：2010-12-30

申请号：US12816034

申请日：2010-06-15

申请人： Yoshiyuki KUROKAWA

发明人： Yoshiyuki KUROKAWA

IPC分类号： G06F3/042 ,  G09G5/00

CPC分类号： G06F3/042 ,  G06F3/0412 ,  G06F3/0416

摘要： It is an object to provide a touch panel which includes an A/D converter circuit and has a function of image shooting with high resolution and high-level gray scale and at high operation speed. A touch panel includes a plurality of pixels each provided with a display element and a photo sensor, an A/D converter to which a first potential is applied from a photo sensor, and a reading circuit. The A/D converter includes an oscillation circuit which changes the oscillating frequency of a first signal to be generated in accordance with the first potential and stops oscillating when a second potential is applied thereto from the reading circuit, and a counter circuit which generates a second signal having a discrete value determined in accordance with the oscillating frequency.

摘要翻译： 本发明的目的是提供一种包括A / D转换器电路的触摸面板，并具有高分辨率和高级灰阶以及高操作速度的图像拍摄功能。 触摸面板包括多个像素，每个像素均设置有显示元件和光传感器，从光传感器施加第一电位的A / D转换器和读取电路。 A / D转换器包括：振荡电路，其根据第一电位改变要产生的第一信号的振荡频率，并且当从读取电路向其施加第二电位时停止振荡，以及产生第二电平的计数器电路 信号具有根据振荡频率确定的离散值。

公开(公告)号：US20090090909A1

公开(公告)日：2009-04-09

申请号：US12243085

申请日：2008-10-01

申请人： Shunpei YAMAZAKI ,  Yoshiyuki KUROKAWA ,  Daisuke KAWAE ,  Satoshi KOBAYASHI

发明人： Shunpei YAMAZAKI ,  Yoshiyuki KUROKAWA ,  Daisuke KAWAE ,  Satoshi KOBAYASHI

IPC分类号： H01L29/04 ,  H01L21/336

CPC分类号： H01L29/4908 ,  H01L29/04 ,  H01L29/41733 ,  H01L29/66765 ,  H01L29/78696

摘要： To improve field effect mobility of an inverted-staggered TFT using amorphous silicon. In an inverted-staggered TFT, a thin amorphous semiconductor layer which is made to have n-type conductivity is formed between a gate insulating film and an amorphous semiconductor layer. By depositing an amorphous semiconductor layer after a substrate over which up to a gate insulating film is formed is exposed to an atmosphere which contains a phosphine gas in a small amount, an amorphous semiconductor layer which contains phosphorus is formed during the early stage of deposition of the amorphous semiconductor layer. The thus obtained amorphous semiconductor layer has the concentration peak of phosphorus around the surface of the gate insulating film.

摘要翻译： 为了提高使用非晶硅的反交错TFT的场效应迁移率。 在反交错TFT中，在栅极绝缘膜和非晶半导体层之间形成具有n型导电性的薄的非晶半导体层。 通过在其上形成至多栅极绝缘膜的基板之后沉积非晶半导体层，暴露于含有少量磷化氢气体的气氛中，在沉积的早期阶段形成含有磷的非晶半导体层 非晶半导体层。 由此获得的非晶半导体层具有围绕栅极绝缘膜的表面的磷的浓度峰值。

公开(公告)号：US20070121372A1

公开(公告)日：2007-05-31

申请号：US11561632

申请日：2006-11-20

申请人： Syusuke IWATA ,  Yoshiyuki KUROKAWA

发明人： Syusuke IWATA ,  Yoshiyuki KUROKAWA

IPC分类号： G11C11/00

CPC分类号： G11C11/412 ,  G11C11/413 ,  H01L21/84 ,  H01L27/1108 ,  H01L27/12

摘要： A semiconductor memory device is provided, which comprises an analog switch, a first inverter, a second inverter, and a clocked inverter. A first terminal of the analog switch is electrically connected to a first data line. A second terminal of the analog switch is electrically connected to an input terminal of the first inverter, an output terminal of the second inverter, and an input terminal of the clocked inverter. An output terminal of the first inverter is electrically connected to an input terminal of the second inverter. An output terminal of the clocked inverter is electrically connected to a second data line. Each of the analog switch and the clocked inverter is electrically connected to at least one word line. The word line electrically connected to the analog switch is different from the word line electrically connected to the clocked inverter.

摘要翻译： 提供一种半导体存储器件，其包括模拟开关，第一反相器，第二反相器和时钟反相器。 模拟开关的第一端子电连接到第一数据线。 模拟开关的第二端子电连接到第一反相器的输入端子，第二反相器的输出端子和时钟反相器的输入端子。 第一反相器的输出端电连接到第二反相器的输入端子。 时钟反相器的输出端电连接到第二数据线。 每个模拟开关和时钟反相器电连接到至少一个字线。 电连接到模拟开关的字线不同于与时钟反相器电连接的字线。

公开(公告)号：US20120314512A1

公开(公告)日：2012-12-13

申请号：US13484013

申请日：2012-05-30

申请人： Yoshiyuki KUROKAWA

发明人： Yoshiyuki KUROKAWA

IPC分类号： G11C7/06

CPC分类号： H01L27/1225 ,  G06F12/0864 ,  G06F12/0895 ,  G06F2212/1028 ,  G11C7/1006 ,  Y02D10/13

摘要： A cache memory which can operate with less power consumption and has an improved cache hit rate and a method for driving the cache memory are provided. Two data storage portions (a first storage portion and a second storage portion) and one data transfer portion are provided in one memory cell in a memory set included in a cache memory, and arranged so that data can be transferred between the two storage portions via the data transfer portion. One of the two data storage portions can store data input from the outside and output data to a comparison circuit paired with the memory set.

摘要翻译： 提供了可以以较少的功耗操作且具有改进的高速缓存命中率的高速缓冲存储器以及用于驱动高速缓冲存储器的方法。 两个数据存储部分（第一存储部分和第二存储部分）和一个数据传送部分被提供在包括在高速缓冲存储器中的存储器组中的一个存储器单元中，并且被布置成可以在两个存储部分之间经由 数据传输部分。 两个数据存储部分中的一个可以存储从外部输入的数据，并将数据输出到与存储器组成对的比较电路。

公开(公告)号：US20120306837A1

公开(公告)日：2012-12-06

申请号：US13548481

申请日：2012-07-13

申请人： Yoshiyuki KUROKAWA

发明人： Yoshiyuki KUROKAWA

IPC分类号： G09G5/00 ,  H01L33/08

CPC分类号： G02F1/13454 ,  H01L27/124

摘要： It is an object of the invention to provide a thin, lightweight, high performance, and low in cost semiconductor device and a display device by reducing an arrangement area required for a power supply wiring and a ground wiring of a functional circuit and decreasing a drop in power supply voltage and a rise in ground voltage.In the functional circuit of the semiconductor device and the display device, a power supply wiring and a ground wiring are formed in a comb-like arrangement, and the tips thereof are electrically connected with a first wiring, a second wiring, and a contact between the first wiring and the second wiring, thereby forming in a grid-like arrangement. The drop in power supply voltage and the rise in ground voltage can be decreased and the arrangement area can be decreased in the grid-like arrangement.

摘要翻译： 本发明的一个目的是通过减少功率电路的电源布线和接地布线所需的布置面积并减小一个下降来提供薄的，轻便的，高性能的，低成本的半导体器件和显示器件 在电源电压和接地电压上升。 在半导体器件和显示装置的功能电路中，电源线和接地布线形成为梳状布置，并且其末端与第一布线，第二布线以及第 第一布线和第二布线，从而形成格栅状布置。 可以减小电源电压的下降和接地电压的上升，并且可以以格子状布置来减小布置面积。

公开(公告)号：US20120028590A1

公开(公告)日：2012-02-02

申请号：US13267007

申请日：2011-10-06

申请人： Yoshiyuki KUROKAWA

发明人： Yoshiyuki KUROKAWA

IPC分类号： H04B1/38

CPC分类号： H04B5/0037 ,  G06F15/7832 ,  Y02D10/12 ,  Y02D10/13

摘要： In a multi-core semiconductor device, a data bus between CPUs or the like consumes a larger amount of power. By provision of a plurality of CPUs which transmit data by a backscattering method of a wireless signal, a router circuit which mediates data transmission and reception between the CPUs or the like, and a thread control circuit which has a thread scheduling function, a semiconductor device which consumes less power and has high arithmetic performance can be provided at low cost.

摘要翻译： 在多核半导体器件中，CPU等之间的数据总线消耗更大的功率。 通过提供通过无线信号的后向散射方法发送数据的多个CPU，介导CPU等之间的数据发送和接收的路由器电路以及具有线程调度功能的线程控制电路，半导体器件 可以以低成本提供消耗较少功率并且具有高算术性能的功能。