Female terminal
    31.
    发明授权
    Female terminal 失效
    女性终端

    公开(公告)号:US07465199B2

    公开(公告)日:2008-12-16

    申请号:US11945293

    申请日:2007-11-27

    IPC分类号: H01R13/187

    摘要: A female terminal includes a tubular portion which has a square tubular shape and receives a male terminal therein and a resilient member which is provided in the tubular portion so as to urge the male terminal toward an inner surface of the tubular portion. The resilient member includes a curved portion formed by a strip-like electrically-conductive metal sheet and a pair of mounting portions integrally formed respectively at widthwise-opposite side edges of the curved portion and extending away from each other. The tubular portion has a pair of side walls opposed to each other and has a pair of through windows provided on the side walls respectively, the pair of mounting portions being inserted in the pair of through windows respectively. At least part of each of the mounting portions located respectively in the through windows is greater in thickness than the other portion of each of the mounting portions.

    摘要翻译: 阴端子包括管状部分,其具有方形管状并在其中容纳阳端子,并且弹性构件设置在管状部分中,以将阳端子朝向管状部分的内表面推动。 弹性构件包括由条状导电金属片形成的弯曲部分和分别在弯曲部分的宽度方向相对的侧边缘处一体地形成并彼此延伸的一对安装部分。 管状部分具有彼此相对的一对侧壁,并且具有分别设置在侧壁上的一对通孔,该对安装部分分别插入该对通孔中。 分别位于通孔中的每个安装部分的至少一部分的厚度大于每个安装部分的其他部分。

    Image display device and testing method of the same
    32.
    发明申请
    Image display device and testing method of the same 有权
    图像显示装置及其测试方法相同

    公开(公告)号:US20080028268A1

    公开(公告)日:2008-01-31

    申请号:US11732178

    申请日:2007-04-03

    申请人: Takeshi Osada

    发明人: Takeshi Osada

    IPC分类号: G01R31/3183 H03K19/20

    CPC分类号: G09G3/006

    摘要: It is the primary object of the present invention to provide a simple and accurate testing circuit and a testing method while occupying as small space as possible in an image display device. The testing circuit including a NAND circuit connected in series is mounted on the image display device. A broken wiring on a data signal line and a defect in a data latch circuit can be detected by observing an output waveform from the testing circuit. Accordingly, a broken wiring or the like on the data signal line and a scanning line and a defect in the latch circuit can be tested simply and accurately without an expensive testing apparatus and a great deal of time while occupying as small space as possible.

    摘要翻译: 本发明的主要目的是提供一种在图像显示装置中占尽尽可能小的空间的简单且精确的测试电路和测试方法。 包括串联连接的NAND电路的测试电路安装在图像显示装置上。 可以通过观察来自测试电路的输出波形来检测数据信号线上的断线和数据锁存电路的缺陷。 因此,在没有昂贵的测试装置的情况下,可以简单准确地测试数据信号线上的断线等,扫描线和闩锁电路的缺陷,同时占用尽可能小的空间。

    Image display device and method of testing the same
    33.
    发明授权
    Image display device and method of testing the same 有权
    图像显示装置及其测试方法

    公开(公告)号:US07265572B2

    公开(公告)日:2007-09-04

    申请号:US11420577

    申请日:2006-05-26

    申请人: Takeshi Osada

    发明人: Takeshi Osada

    IPC分类号: G01R31/00

    摘要: It is the object of the present invention to provide a simple and accurate testing circuit and a testing method while occupying as small space as possible in an image display device. By partly changing dummy pixels arranged in the periphery of a display region into a testing circuit, tests for detecting broken wires in data signal lines and scanning lines and whether pixels are controlled adequately can be conducted easily and accurately, occupying as small space as possible without a need of an additional complicated circuit. Accordingly, a display panel can be produced at a low cost.

    摘要翻译: 本发明的目的是提供一种在图像显示装置中尽可能小的空间的简单且精确的测试电路和测试方法。 通过将布置在显示区域的周边的虚拟像素部分地改变为测试电路,可以容易且准确地进行用于检测数据信号线和扫描线中的断线以及是否适当地控制像素的测试,占据尽可能小的空间,而没有 需要一个额外的复杂电路。 因此,可以以低成本制造显示面板。

    Clock generation circuit and semiconductor device provided therewith
    35.
    发明授权
    Clock generation circuit and semiconductor device provided therewith 有权
    时钟生成电路及与此相关的半导体装置

    公开(公告)号:US09100028B2

    公开(公告)日:2015-08-04

    申请号:US13023489

    申请日:2011-02-08

    申请人: Takeshi Osada

    发明人: Takeshi Osada

    IPC分类号: H04B1/06 H03L7/18

    CPC分类号: H03L7/0995 H03L7/18

    摘要: It is an object of the present invention to solve a problem that malfunction of communication is generated by varying a frequency of a clock due to noise from outside in a case where there is no supplied signal in a circuit which performs negative feedback control so that the supplied signal and the feedback signal can maintain a fixed phase relationship between the signals. The present invention provides a configuration including a PLL circuit and an oscillator circuit, where a switch for switching an output between a signal from the PLL circuit and a signal from the oscillator circuit to the signal output portion is provided to switch from a connection to the PLL circuit to a connection to the oscillator circuit in a case where there is no received signal.

    摘要翻译: 本发明的目的是解决通过在执行负反馈控制的电路中没有提供信号的情况下,通过改变来自外部的噪声的时钟频率来产生通信的故障的问题, 提供信号,反馈信号可以保持信号之间的固定相位关系。 本发明提供一种配置,其包括PLL电路和振荡器电路,其中用于将来自PLL电路的信号与来自振荡器电路的信号到信号输出部分的信号之间的输出切换的开关被提供以从连接切换到 在没有接收到信号的情况下,PLL电路连接到振荡器电路。

    Power storage device and semiconductor device provided with the power storage device
    37.
    发明授权
    Power storage device and semiconductor device provided with the power storage device 有权
    配备蓄电装置的蓄电装置和半导体装置

    公开(公告)号:US08847556B2

    公开(公告)日:2014-09-30

    申请号:US13106261

    申请日:2011-05-12

    申请人: Takeshi Osada

    发明人: Takeshi Osada

    摘要: An object is to provide a power storage device provided with a battery that is a power storage means, for safe and accurate supply of electric power in a short period of time for drive power supply voltage without checking remaining capacity of the battery or changing batteries with deterioration over time of the battery for drive power supply voltage. The power storage device is provided with a battery that is a power storage means as a power supply for supplying electric power and a counter circuit for counting charging time of the power storage means. An electromagnetic wave with electric field intensity, magnetic field intensity, and power flux density per unit time which are transmitted from a power feeder are controlled, and the power storage means is efficiently charged using the electromagnetic wave in a short period of time.

    摘要翻译: 本发明的目的是提供一种蓄电装置,该蓄电装置具备作为蓄电装置的电池,为了在短时间内对驱动电源电压进行安全且准确的供电,而无需检查电池的剩余容量或者更换电池 用于驱动电源电压的电池随时间的劣化。 蓄电装置设置有作为用于提供电力的电源的蓄电装置的电池和用于对蓄电装置的充电时间进行计数的计数器电路。 控制从供电器传送的每单位时间的电场强度,磁场强度和功率通量密度的电磁波,并且在短时间内利用电磁波有效地对蓄电装置进行充电。

    PLL circuit and semiconductor device having the same
    39.
    发明授权
    PLL circuit and semiconductor device having the same 有权
    PLL电路和具有该PLL电路的半导体器件

    公开(公告)号:US08547179B2

    公开(公告)日:2013-10-01

    申请号:US13301070

    申请日:2011-11-21

    IPC分类号: H03K3/03

    摘要: A PLL circuit includes a phase detector, a loop filter (LF), a voltage-controlled oscillator (VCO), and a frequency divider. The phase detector compares a phase of a signal Fs which is input from outside with a phase of a signal Fo/N which is input from the frequency divider. The loop filter generates a signal Vin by removing alternating current components from a signal input from the phase detector. The voltage-controlled oscillator outputs a signal Fo based on the signal Vin input from the loop filter. The frequency divider converts the signal Fo output from the voltage-controlled oscillator into Fo/N (frequency division by N), and outputs it to the phase detector.

    摘要翻译: PLL电路包括相位检测器,环路滤波器(LF),压控振荡器(VCO)和分频器。 相位检测器将从外部输入的信号Fs的相位与从分频器输入的信号Fo / N的相位进行比较。 环路滤波器通过从相位检测器输入的信号中去除交流分量来产生信号Vin。 压控振荡器基于从环路滤波器输入的信号Vin输出信号Fo。 分频器将从压控振荡器输出的信号Fo转换为Fo / N(N分频),并将其输出到相位检测器。

    RELAY CONNECTOR, MODULE, MODULE DEVICE, AND LUMINAIRE
    40.
    发明申请
    RELAY CONNECTOR, MODULE, MODULE DEVICE, AND LUMINAIRE 失效
    继电器连接器,模块,模块设备和灯管

    公开(公告)号:US20130252472A1

    公开(公告)日:2013-09-26

    申请号:US13619021

    申请日:2012-09-14

    IPC分类号: H01R27/02

    摘要: According to one embodiment, a relay connector connects two input connectors respectively mounted on mounting surfaces of two substrates, ends of which are arranged to be opposed to each other. The relay connector includes a relay connector main body and relay terminals. The relay connector main body includes a substrate regulating section interposed between the ends of the two substrates and set in contact with the ends of the two substrates to form a space between the ends of the two substrates. The relay terminals project from both ends of the relay connector main body to be connected to the input connectors.

    摘要翻译: 根据一个实施例,中继连接器连接两个分别安装在两个基板的安装表面上的输入连接器,两个基板的端部彼此相对布置。 继电器连接器包括中继连接器主体和中继端子。 中继连接器主体包括插入在两个基板的端部之间并与两个基板的端部接触并设置在两个基板的端部之间的空间的基板调节部。 继电器端子从继电器连接器主体的两端突出以连接到输入连接器。