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    Three-dimensional memory device without gate line slits and method for forming the same
    34.
    发明授权
    Three-dimensional memory device without gate line slits and method for forming the same 有权

    公开(公告)号：US11765897B2

    公开(公告)日：2023-09-19

    申请号：US17100874

    申请日：2020-11-21

    申请人： YANGTZE MEMORY TECHNOLOGIES CO., LTD.

    发明人： Zongliang Huo ,  Haohao Yang ,  Wei Xu ,  Ping Yan ,  Pan Huang ,  Wenbin Zhou

    IPC分类号： H10B43/27 ,  H10B43/10 ,  H10B43/35

    CPC分类号： H10B43/27 ,  H10B43/10 ,  H10B43/35

    摘要： Embodiments of structure and methods for forming a three-dimensional (3D) memory device are provided. In an example, a method for forming a 3D memory device includes forming a bottom select structure extending along a vertical direction through a bottom conductor layer over a substrate and along a horizontal direction to divide the bottom conductor layer into a pair of bottom select conductor layers, forming a plurality of conductor layers and a plurality of insulating layers interleaved on the pair of bottom select conductor layers and the bottom select structure, and forming a plurality of channel structures extending along the vertical direction through the pair of bottom select conductor layers, the plurality of conductor layers, and the plurality of insulating layers and into the substrate. The method may further include forming a first top select structure extending along the vertical direction through a top conductor layer of the plurality of conductor layers and along the horizontal direction to divide the top conductor layer into a pair of top select conductor layers. The first top select structure and the bottom select structure may be aligned along the vertical direction and may divide a plurality of memory cells formed by the plurality of conductor layers and the plurality of channel structures into a pair of memory blocks.

    Three-dimensional memory devices and fabricating methods thereof
    36.
    发明授权
    Three-dimensional memory devices and fabricating methods thereof 有权

    公开(公告)号：US11476277B2

    公开(公告)日：2022-10-18

    申请号：US17112045

    申请日：2020-12-04

    申请人： Yangtze Memory Technologies Co., Ltd.

    发明人： Lei Ding ,  Jing Gao ,  Chuan Yang ,  Lan Fang Yu ,  Ping Yan ,  Sen Zhang ,  Bo Xu

    IPC分类号： H01L27/1157 ,  H01L27/11582 ,  H01L27/11524 ,  H01L27/11556

    摘要： A method for forming a gate structure of a 3D memory device is provided. The method comprises: forming, on a substrate, an alternating dielectric stack including a plurality of dielectric layer pairs, each of the plurality of dielectric layer pairs comprising a first dielectric layer and a second dielectric layer different from the first dielectric layer; forming a slit penetrating vertically through the alternating dielectric stack and extending in a horizontal direction; removing the plurality of second dielectric layers in the alternating dielectric stack through the slit to form a plurality of horizontal trenches; forming a gate structure in each of the plurality of horizontal trenches; forming a spacer layer on sidewalls of the slit to cover the gate structures, wherein the spacer layer has a laminated structure; and forming a conductive wall in the slit, wherein the conductive wall is insulated from the gate structures by the spacer layer.