公开(公告)号：US09070624B2

公开(公告)日：2015-06-30

申请号：US13328875

申请日：2011-12-16

Applicant: Jian-Hao Chen ,  Chia-Yu Lu ,  Tung-Heng Hsieh ,  Kuo-Feng Yu ,  Chin-Shan Hou ,  Hsien-Chin Lin ,  Shyue-Shyh Lin

Inventor： Jian-Hao Chen ,  Chia-Yu Lu ,  Tung-Heng Hsieh ,  Kuo-Feng Yu ,  Chin-Shan Hou ,  Hsien-Chin Lin ,  Shyue-Shyh Lin

IPC: H01L21/28 ,  H01L49/02 ,  H01L27/06 ,  H01L29/78 ,  H01L29/66 ,  H01L29/423

CPC classification number: H01L21/28123 ,  H01L27/0629 ,  H01L28/20 ,  H01L29/42376 ,  H01L29/66545 ,  H01L29/78

Abstract: A described method includes providing a semiconductor substrate. A first gate structure is formed on the semiconductor substrate and a sacrificial gate structure formed adjacent the first gate structure. The sacrificial gate structure may be used to form a metal gate structure using a replacement gate methodology. A dielectric layer is formed overlying the first gate structure and the sacrificial gate structure. The dielectric layer has a first thickness above a top surface of the first gate structure and a second thickness, less than the first thickness, above a top surface of the sacrificial gate structure. (See, e.g., FIGS. 5, 15, 26). Thus, a subsequent planarization process of the dielectric layer may not contact the first gate structure.

Abstract translation: 所述方法包括提供半导体衬底。 第一栅极结构形成在半导体衬底上，并且邻近第一栅极结构形成牺牲栅极结构。 牺牲栅极结构可以用于使用替代栅极方法形成金属栅极结构。 覆盖第一栅极结构和牺牲栅极结构的介电层形成。 电介质层在第一栅极结构的顶表面上方具有第一厚度，并且在牺牲栅极结构的顶表面上方具有小于第一厚度的第二厚度。 （参见例如图5,15,26）。 因此，电介质层的随后的平坦化处理可能不接触第一栅极结构。

公开(公告)号：US09068168B2

公开(公告)日：2015-06-30

申请号：US12680277

申请日：2008-09-26

Applicant: Adam W. Feinberg ,  Kevin Kit Parker ,  Po-Ling Kuo ,  Chin-Lin Guo

Inventor： Adam W. Feinberg ,  Kevin Kit Parker ,  Po-Ling Kuo ,  Chin-Lin Guo

IPC: C12N5/00 ,  C12N5/077 ,  A61K35/34 ,  C12N5/02 ,  C12N5/071 ,  C12N5/07

CPC classification number: C12N5/0658 ,  C12N5/0657 ,  C12N2533/52 ,  C12N2535/10 ,  C12N2539/10

Abstract: The present invention relates to the arrangement of one or more cells in a medium or on a substrate through the use of boundary conditions, which are changes in local environment compared to the medium or substrate alone or cause an alteration of cell response upon interaction of a cell with the boundary condition.

Abstract translation: 本发明涉及通过使用边界条件在介质中或在基质上排列一个或多个细胞，所述边界条件是与单独的培养基或底物相比较的局部环境变化或引起细胞反应相互作用时的改变 细胞与边界条件。

公开(公告)号：US08896135B2

公开(公告)日：2014-11-25

申请号：US12984542

申请日：2011-01-04

Applicant: Ching-Chiun Wang ,  Kang-Feng Lee ,  Feng-Yu Tsai ,  Ming Horn Zheng ,  Chih-Yung Huang ,  Shih-Chin Lin ,  Jen-Rong Huang

Inventor： Ching-Chiun Wang ,  Kang-Feng Lee ,  Feng-Yu Tsai ,  Ming Horn Zheng ,  Chih-Yung Huang ,  Shih-Chin Lin ,  Jen-Rong Huang

IPC: H01L23/28 ,  H01L21/56 ,  C08F8/42 ,  H01L31/048 ,  H01L33/56

CPC classification number: C08F8/42 ,  H01L31/0481 ,  H01L33/56 ,  Y02E10/50 ,  C08F216/06

Abstract: Disclosed is an encapsulation film. An inorganic oxide film is formed on an organic sealing layer by an atomic layer deposition (ALD) to form the encapsulation film, wherein the organic sealing layer is a polymer containing hydrophilic groups. The organic sealing layer and the inorganic oxide layer have covalent bondings therebetween. The encapsulation film can solve the moisture absorption problem of conventional organic sealing layers, thereby being suitable for use as a package of optoelectronic devices.

Abstract translation: 公开了一种封装膜。 通过原子层沉积（ALD）在有机密封层上形成无机氧化物膜以形成包封膜，其中有机密封层是含有亲水基团的聚合物。 有机密封层和无机氧化物层之间具有共价键。 该封装膜可以解决传统的有机密封层的吸湿问题，从而适用于光电器件的封装。

公开(公告)号：US08666618B2

公开(公告)日：2014-03-04

申请号：US12289694

申请日：2008-10-31

Applicant: Hong-Chin Lin ,  Rami Nabil Nasrallah

Inventor： Hong-Chin Lin ,  Rami Nabil Nasrallah

IPC: G06G7/00

CPC classification number: B60W10/02 ,  B60W10/30 ,  B60Y2200/415 ,  E02F9/2079 ,  F16D48/06 ,  F16D2500/1112 ,  F16D2500/31 ,  F16D2500/3108 ,  F16D2500/31413 ,  F16D2500/70288 ,  Y10T477/26 ,  Y10T477/27 ,  Y10T477/75

Abstract: A machine control system for use with a machine having a power source and a transmission is disclosed. The machine control system may have a clutch configured to connect an output of the power source with an input of the transmission. The machine control system may also have a sensors configured to generate signals indicative of machine operations, and a controller in communication with the clutch and the sensors. The controller may be configured to determine the current machine application based on the signals, and vary an actuating force of the clutch based on the type of machine application.

Abstract translation: 公开了一种与具有电源和变速器的机器一起使用的机器控制系统。 机器控制系统可以具有将电源的输出与变速器的输入连接的离合器。 机器控制系统还可以具有被配置为产生指示机器操作的信号的传感器，以及与离合器和传感器通信的控制器。 控制器可以被配置为基于信号来确定当前的机器应用，并且基于机器应用的类型改变离合器的致动力。

公开(公告)号：US08609495B2

公开(公告)日：2013-12-17

申请号：US12756662

申请日：2010-04-08

Applicant: Tian-Choy Gan ,  Hsien-Chin Lin ,  Chia-Pin Lin ,  Shyue-Shyh Lin ,  Li-Shiun Chen ,  Shin Hsien Liao

Inventor： Tian-Choy Gan ,  Hsien-Chin Lin ,  Chia-Pin Lin ,  Shyue-Shyh Lin ,  Li-Shiun Chen ,  Shin Hsien Liao

IPC: H01L27/092 ,  H01L21/8238

CPC classification number: H01L27/092 ,  H01L21/8238 ,  H01L29/66795 ,  H01L29/785

Abstract: Provided is a method of fabricating a semiconductor device that includes forming first and second fins over first and second regions of a substrate, forming first and second gate structures over the first and second fins, the first and second gate structures including first and second poly gates, forming an inter-level dielectric (ILD) over the substrate, performing a chemical mechanical polishing on the ILD to expose the first and second poly gates, forming a mask to protect the first poly gate of the first gate structure, removing the second poly gate thereby forming a first trench, removing the mask, partially removing the first poly gate thereby forming a second trench, forming a work function metal layer partially filling the first and second trenches, forming a fill metal layer filling a remainder of the first and second trenches, and removing the metal layers outside the first and second trenches.

Abstract translation: 提供一种制造半导体器件的方法，该半导体器件包括在衬底的第一和第二区域上形成第一和第二鳍片，在第一和第二鳍片上形成第一和第二栅极结构，第一和第二栅极结构包括第一和第二多晶硅栅极 ，在所述衬底上形成层间电介质（ILD），在所述ILD上进行化学机械抛光以暴露所述第一和第二多晶硅栅极，形成掩模以保护所述第一栅极结构的所述第一多晶硅栅极， 从而形成第一沟槽，去除掩模，部分地移除第一多晶硅栅极，从而形成第二沟槽，形成部分填充第一和第二沟槽的功函数金属层，形成填充第一和第二沟槽的剩余部分的填充金属层 沟槽，并且去除第一和第二沟槽外的金属层。

公开(公告)号：US08601407B2

公开(公告)日：2013-12-03

申请号：US13217345

申请日：2011-08-25

Applicant: Hung-Chun Wang ,  Pei-Shiang Chen ,  Tzu-Chin Lin ,  Cheng-Hung Chen ,  Shih-Chi Wang ,  Nian-Fuh Cheng ,  Jeng-Horng Chen ,  Wen-Chun Huang ,  Ru-Gun Liu

Inventor： Hung-Chun Wang ,  Pei-Shiang Chen ,  Tzu-Chin Lin ,  Cheng-Hung Chen ,  Shih-Chi Wang ,  Nian-Fuh Cheng ,  Jeng-Horng Chen ,  Wen-Chun Huang ,  Ru-Gun Liu

IPC: G06F17/50

CPC classification number: G03F7/2059

Abstract: Provided is a method of performing a maskless lithography process. The method includes providing a proximity correction pattern. The method includes generating a deformed pattern based on the proximity correction pattern. The method includes performing a first convolution process to the proximity correction pattern to generate a first proximity correction pattern contour. The method includes processing the first proximity correction pattern contour to generate a second proximity correction pattern contour. The method includes performing a second convolution process to the deformed pattern to generate a first deformed pattern contour. The method includes processing the first deformed pattern contour to generate a second deformed pattern contour. The method includes identifying mismatches between the second proximity correction pattern contour and the second deformed pattern contour. The method includes determining whether the deformed pattern is lithography-ready in response to the identifying.

Abstract translation: 提供了进行无掩模光刻处理的方法。 该方法包括提供接近校正模式。 该方法包括基于接近校正图案生成变形图案。 该方法包括对接近校正图案执行第一卷积处理以产生第一邻近校正图案轮廓。 该方法包括处理第一接近校正图案轮廓以产生第二邻近校正图案轮廓。 该方法包括对变形图案执行第二卷积处理以产生第一变形图案轮廓。 该方法包括处理第一变形图案轮廓以产生第二变形图案轮廓。 该方法包括识别第二接近校正图案轮廓和第二变形图案轮廓之间的不匹配。 该方法包括响应于识别确定变形图案是否是光刻刻画的。

公开(公告)号：US20130309619A1

公开(公告)日：2013-11-21

申请号：US13845367

申请日：2013-03-18

Applicant: Chin-Lin TSAI

Inventor： Chin-Lin TSAI

IPC: F23D14/28 ,  F23D14/02 ,  F23Q7/12 ,  F16K7/00

CPC classification number: F23D14/28 ,  F16K7/00 ,  F16K31/1262 ,  F23D14/02 ,  F23D14/38 ,  F23D14/68 ,  F23Q3/00 ,  F23Q7/12 ,  Y10T137/8122

Abstract: The present invention relates to a gas combustor, comprising: a gas intake valve, the bottom of a valve tube axially formed in a valve member is installed with a filter member, a first spring is installed above the filter member and inside the valve tube, the top of a valve pin is protruded out of a tube opening formed at and communicated with the top of the valve tube, a plug outwardly protruded at the bottom of the valve pin is abutted against the first spring, the plug is enabled to seal the tube opening through the first spring being stretched, and when the top of the valve pin is axially subject to a force, the valve pin and the plug are downwardly moved, the first spring is compressed thereby enabling the tube opening to be opened.

Abstract translation: 气体燃烧器技术领域本发明涉及一种气体燃烧器，包括：进气阀，轴向形成在阀构件中的阀管的底部安装有过滤构件，第一弹簧安装在过滤构件上方和阀管内部， 阀销的顶部从形成在阀管的顶部并连通的管开口突出，在阀销的底部向外突出的塞子抵靠第一弹簧，该塞子能够密封 通过第一弹簧的管开口被拉伸，并且当阀销的顶部轴向受力时，阀销和插塞向下移动，第一弹簧被压缩，从而使得管开口能够打开。

公开(公告)号：US08420421B2

公开(公告)日：2013-04-16

申请号：US13117428

申请日：2011-05-27

Applicant: Yi Chang ,  Chia-Hua Chang ,  Yueh-Chin Lin

Inventor： Yi Chang ,  Chia-Hua Chang ,  Yueh-Chin Lin

IPC: H01L21/00

CPC classification number: H01L29/7786 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/517 ,  H01L29/66462

Abstract: A method for fabricating a GaN-based thin film transistor includes: forming a semiconductor epitaxial layer on a substrate, the semiconductor epitaxial layer having a n-type GaN-based semiconductor material; forming an insulating layer on the semiconductor epitaxial layer; forming an ion implanting mask on the insulating layer, the ion implanting mask having an opening to partially expose the insulating layer; ion-implanting a p-type impurity through the opening and the insulating layer to form a p-doped region in the n-type GaN-based semiconductor material, followed by removing the insulating layer and the ion implanting mask; forming a dielectric layer on the semiconductor epitaxial layer; partially removing the dielectric layer; forming source and drain electrodes; and forming a gate electrode.

Abstract translation: 制造GaN基薄膜晶体管的方法包括：在衬底上形成半导体外延层，所述半导体外延层具有n型GaN基半导体材料; 在所述半导体外延层上形成绝缘层; 在所述绝缘层上形成离子注入掩模，所述离子注入掩模具有用于部分地暴露所述绝缘层的开口; 通过开口和绝缘层离子注入p型杂质，以在n型GaN基半导体材料中形成p掺杂区域，随后除去绝缘层和离子注入掩模; 在所述半导体外延层上形成介电层; 部分去除电介质层; 形成源极和漏极; 并形成栅电极。

公开(公告)号：US20130078838A1

公开(公告)日：2013-03-28

申请号：US13306859

申请日：2011-11-29

Applicant: WEN-CHIN LIN ,  WEN-CHIEH WANG ,  SHENG-TIEN CHANG ,  CHIN-MING CHEN ,  CHING-JOU CHEN

Inventor： WEN-CHIN LIN ,  WEN-CHIEH WANG ,  SHENG-TIEN CHANG ,  CHIN-MING CHEN ,  CHING-JOU CHEN

IPC: H01R13/627

CPC classification number: G06F1/187

Abstract: An apparatus for fixing a storage device includes a metal bracket, and a fixing frame slidably received in the bracket. The bracket includes two side plates, and one of the side plates forms a resilient tab. The fixing frame includes two opposite fixing arms each defining a latching hole, two resilient members, and two metal fasteners. Each resilient member includes a pad clinging to an inner surface of a corresponding one of the fixing arms, and a projection engaging in the latching hole of the corresponding fixing arm. Each fastener includes a head, and a pin. The heads are received in the corresponding latching holes and abut against outer sides of the corresponding projections. The pins extend through the corresponding through holes for engaging with the storage device. A protrusion extends outwards from one of the heads to contact the resilient tab and connect the storage device to ground.

Abstract translation: 用于固定存储装置的装置包括金属支架和可滑动地容纳在支架中的固定框架。 支架包括两个侧板，并且其中一个侧板形成弹性片。 固定框架包括两个相对的固定臂，每个固定臂限定一个锁定孔，两个弹性构件和两个金属紧固件。 每个弹性构件包括粘附到对应的一个固定臂的内表面的垫，以及接合在相应的固定臂的闩锁孔中的突起。 每个紧固件包括头部和销。 头部被容纳在相应的闩锁孔中，并抵靠在相应突出部的外侧。 销延伸通过相应的通孔以与存储装置接合。 一个突起从一个头部向外延伸以接触弹性突舌并将存储装置连接到地面。

公开(公告)号：US08390254B2

公开(公告)日：2013-03-05

申请号：US12750824

申请日：2010-03-31

Applicant: Yeh-Shen Lin ,  Yi-Feng Tung ,  Ku-Ching Lu ,  Yun-Chin Lin

Inventor： Yeh-Shen Lin ,  Yi-Feng Tung ,  Ku-Ching Lu ,  Yun-Chin Lin

IPC: H02J7/00 ,  H02J9/00

CPC classification number: H02J7/0018 ,  H02J7/0022 ,  Y10T307/50 ,  Y10T307/625

Abstract: A charging apparatus for laptop computer with multiple-batteries is used in a first battery unit and a second battery unit. The charging apparatus comprises a micro controller unit; a first charging switch unit electrically connected to the micro controller unit; a second charging switch unit electrically connected to the micro controller unit; and a charging unit electrically connected to the first charging switch unit and the second charging switch unit. The micro controller unit controls the charging unit charging the first battery unit and the second battery unit via controlling the first charging switch unit and the second charging switch unit. The charging apparatus charges multi-batteries simultaneously.

Abstract translation: 在第一电池单元和第二电池单元中使用具有多个电池的膝上型计算机的充电装置。 充电装置包括微控制器单元; 电连接到微控制器单元的第一充电开关单元; 电连接到微控制器单元的第二充电开关单元; 以及与第一充电开关单元和第二充电开关单元电连接的充电单元。 微型控制器单元通过控制第一充电开关单元和第二充电开关单元来控制充电单元对第一电池单元和第二电池单元充电。 充电装置同时对多个电池充电。