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公开(公告)号：US12155405B2
公开(公告)日：2024-11-26
申请号：US17546873
申请日：2021-12-09
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor： Thomas Kunlin
Abstract: The present description concerns a method or device wherein an untraceability feature of a first near-field communication device is deactivated by an action on a hardware switch.
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公开(公告)号：US12132495B2
公开(公告)日：2024-10-29
申请号：US18069459
申请日：2022-12-21
Inventor： Julien Goulier , Franck Montaudon
IPC: H03M1/12 , H04B5/72 , G06K19/077 , H04B5/00
CPC classification number: H03M1/124 , H04B5/72 , G06K19/07773 , H04B5/00
Abstract: The present disclosure concerns an electronic device connected to an antenna. The electronic device delivers a first amplitude-modulated analog signal of a signal captured by the antenna, the capture signal associated with an electromagnetic field exhibiting intervals at a minimum level. The electronic device includes a first circuit, a second circuit, and a third circuit. The first circuit delivers a second analog signal by rectification and filters the first analog signal. The second circuit delivers a first binary signal based on the demodulation of the second analog signal. The third circuit couples the antenna to a resistor during each pause. The resistance value of the resistor depends on the maximum amplitude of the electromagnetic field before the pause.
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公开(公告)号：US12119751B2
公开(公告)日：2024-10-15
申请号：US18342159
申请日：2023-06-27
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor： Jean Camiolo , Alexandre Pons
CPC classification number: H02M3/33553 , H02M1/08
Abstract: The present disclosure relates to a voltage source device comprising: a voltage converter for generating a supply voltage at an output node of the voltage converter based on a feedback signal provided on a feedback line; at least one switch coupled between the output node of the voltage converter and an output terminal of the voltage source device; and at least one further switch configured to selectively couple the feedback line to: the output node of the voltage converter during a first regulation mode; and to the output terminal of the voltage source device during a second regulation mode.
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公开(公告)号：US12066881B2
公开(公告)日：2024-08-20
申请号：US17806813
申请日：2022-06-14
Applicant: STMicroelectronics, Inc. , STMICROELECTRONICS (BEIJING) R&D CO. LTD , STMicroelectronics (Grenoble 2) SAS
Inventor： Arnaud Deleule , Kalyan-Kumar Vadlamudi-Reddy , Darin K Winterton , Jihong Chen , Olivier Lemarchand
IPC: G06F1/32 , G01S13/08 , G06F1/3231 , G06F1/3234
CPC classification number: G06F1/3231 , G01S13/08 , G06F1/3265
Abstract: A method for operating an electronic device includes while a display is in low power mode, detecting based on data collected by a time of flight (ToF) sensor, a movable object within a field of view of the electronic device; in response to the detecting initiating a period of detection having a plurality of frames, the period of detection being a time period over which a distance value indicative of a distance between the movable object and the display is detected; for each of the plurality of frames, changing the distance value to reflect whether the movable object is moving near or further from the electronic device; detecting that the distance value after the period of detection is less than a threshold distance value indicative of the movable object approaching the display; if the distance value is less than the threshold distance value, waking up the display.
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公开(公告)号：US12066678B2
公开(公告)日：2024-08-20
申请号：US18110568
申请日：2023-02-16
Applicant: STMicroelectronics (Grenoble 2) SAS , STMicroelectronics (Research & Development) Limited
Inventor： Nicolas Mastromauro , Roy Duffy , Karine Saxod
IPC: H01L31/0232 , G02B7/00 , G02B13/00 , H01L31/0203
CPC classification number: G02B7/006 , G02B13/00 , H01L31/0203 , H01L31/02325
Abstract: An electronic device includes a carrier substrate having a front face. An electronic chip is mounted on the front face of the carrier substrate and includes an optical component. An encapsulation cover is mounted on top of the front face of the carrier substrate and bounds a chamber within which the chip is situated. A front opening extends through the cover and is situated in front of the optical component. An optical element, designed to allow light to pass, is mounted within the chamber at a position which covers the front opening of the encapsulation cover. The optical element includes a central region designed to deviate the light and having an optical axis aligned with the front opening and the optical component. A positioning pattern is provided on the optical element to assist with mounting the optical element to the cover and mounting the cover to the carrier substrate.
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Patent Agency Ranking
公开(公告)号：US12051681B2
公开(公告)日：2024-07-30
申请号：US17374868
申请日：2021-07-13
Inventor： Deborah Cogoni , David Auchere , Laurent Schwartz , Claire Laporte
CPC classification number: H01L25/165 , H01G4/385
Abstract: A device for regulating a voltage of an electric current supplying an integrated circuit resting on a substrate. The integrated circuit comprises a ground terminal and a power supply terminal able to receive the electric current. The regulation device comprises a first cover covering the integrated circuit, a second cover covering the integrated circuit. The first cover is electrically connected to the power supply terminal of the integrated circuit. The second cover is electrically connected to the ground terminal of the integrated circuit. The first cover and the second cover are connected together by a capacitive connection.
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公开(公告)号：US20240214000A1
公开(公告)日：2024-06-27
申请号：US18390907
申请日：2023-12-20
Inventor： Christophe Mandier , Matteo Maria Vignetti
Abstract: The present disclosure relates to a DAC that includes: a first pixel including a first transfer gate coupling a memory node of the first pixel and a capacitive sensing node (SN); a second pixel comprising a first transfer gate coupling a memory node of the second pixel and the capacitive SN; a reset transistor coupling the sensing node to a first voltage supply rail; and a control circuit configured to store electrical charge by activating the reset transistor to apply a reference voltage to the memory node of each of the first and second pixels; and generate a voltage of the DAC at the sensing node by deactivating the reset transistor and controlling the first transfer gates of the first and second pixels to transfer the charge stored.
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公开(公告)号：US20240213972A1
公开(公告)日：2024-06-27
申请号：US18541324
申请日：2023-12-15
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor： Laurent SIMONY
IPC: H03K5/24 , H04N25/772 , H04N25/778
CPC classification number: H03K5/2481 , H04N25/772 , H04N25/778 , H03M1/56
Abstract: A differential comparator circuit includes a voltage amplifier of negative gain receiving an analog input signal and generating an inverted analog input signal. The analog input signal and the inverted analog input signal form differential analog input signals. A comparator input circuit includes a first capacitive divider to generate a first signal as an average of the analog input signal and a first ramp signal, and a second capacitive divider to generate a second signal as an average of the inverted analog input signal and a second ramp signal, with the first and second ramp signals being differential ramp signals. The comparator is configured to compare the first and second signals to generate a signal transition having a timing based on the input signal.
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429.发明授权公开(公告)号：US12016670B2
公开(公告)日：2024-06-25
申请号：US16832515
申请日：2020-03-27
Inventor： Kalyan-Kumar Vadlamudi-Reddy , Darin K Winterton , Pierre-Loic Felter , Olivier Lemarchand
CPC classification number: A61B5/0803 , A61B5/082 , G06F17/142
Abstract: In accordance with embodiments, methods and systems for utilizing multiple threshold checkers are provided. A range sensor collects measurement data. The range sensor examines the measurement data based on multiple threshold checkers to determine satisfaction of a trigger condition. In response to the satisfaction of the trigger condition, the range sensor provides the measurement data to a host computing device of the range sensor.
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公开(公告)号：US20240201773A1
公开(公告)日：2024-06-20
申请号：US18081011
申请日：2022-12-14
Inventor： Sylvain CHAVAGNAT , Simon VALCIN
IPC: G06F1/3234
CPC classification number: G06F1/3243
Abstract: Disclosed herein is a debug system including a host computer, a microcontroller, and a debug probe for interface therebetween for performing debug trace operations. The debug probe samples the current drawn by the microcontroller. The debug probe and host computer cooperate so as to acquire and accurately align trace data and the samples of the current drawn by the microcontroller. Techniques for performing this alignment are described herein and enable for accurate inferences to be drawn about the current drawn by the microcontroller during different program operations.
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