公开(公告)号：US11842009B2

公开(公告)日：2023-12-12

申请号：US17677119

申请日：2022-02-22

Applicant: STMicroelectronics (BEIJING) R&D Co., LTD ,  STMicroelectronics (Shenzhen) R&D Co., Ltd.

Inventor： Bowei Chen ,  Yue Ding ,  Guodong Sun

IPC: G06F3/041 ,  G06F3/044 ,  H03M1/20 ,  H04L65/00 ,  H04N21/462

CPC classification number: G06F3/0418 ,  G06F3/0412 ,  G06F3/0446 ,  G06F3/0447 ,  H03M1/20 ,  H04L65/00 ,  H04N21/4621

Abstract: A method for operating an electronic device includes detecting, by a touchscreen controller, a touch point on a touchscreen; determining, by the touchscreen controller, coordinates of the touch point; scaling, by the touchscreen controller, up the coordinates of the touch point to obtain scaled up coordinates by overwriting a reserved portion of a touch event protocol with additional information corresponding to the coordinates of the touch point; reporting, by the touchscreen controller, the scaled up coordinates of the touch point to an application processor; and determining, by the application processor, the coordinates of the touch point with an increased resolution by converting the scaled up coordinates into a floating point value.

公开(公告)号：US11775117B1

公开(公告)日：2023-10-03

申请号：US17859784

申请日：2022-07-07

Applicant: STMICROELECTRONICS (BEIJING) R&D CO., LTD ,  STMICROELECTRONICS LTD.

Inventor： Pengcheng Wen ,  Yuan Yun Wang

IPC: G06F3/041 ,  G09G3/3233 ,  G06F3/044

CPC classification number: G06F3/04184 ,  G06F3/0443 ,  G06F3/04166 ,  G09G3/3233 ,  G09G2320/0247 ,  G09G2330/023 ,  G09G2354/00

Abstract: A method of operating a display includes performing a non-synchronized touch scan pattern on a display with a controller coupled to the display. The non-synchronized touch scan pattern schedules touch scans independent of a refresh rate of the display. Upon the controller detecting a first synchronization pulse from a display controller coupled to the controller and the display, a first pulse-checking timer is started. Upon detecting a second synchronization pulse from the display controller and before the first pulse-checking timer expires, a first display refresh rate for the display is obtained from an interval between the first synchronization pulse and the second synchronization pulse. A synchronized touch scan pattern is performed with the controller, and is scheduled to avoid touch scans coinciding with refreshes of the display performed at the first display refresh rate.

公开(公告)号：US10114644B2

公开(公告)日：2018-10-30

申请号：US15220338

申请日：2016-07-26

Applicant: STMicroelectronics (Beijing) R&D Co. Ltd

Inventor： PengFei Zhu ,  Xiao Kang Jiao

IPC: G06F9/30 ,  G06F9/38 ,  G06F9/32

Abstract: A decoding logic method is arranged to execute a zero-overhead loop in an embedded digital signal processor (DSP). In the method, instruction data is fetched from a memory, and a plurality of instruction tokens, which are derived from the instruction data, are stored in a token buffer. A first portion of one or more instruction tokens from the token buffer are passed to a first decode module, which may be an instruction decode module, and a second portion of the one or more instruction tokens from the token buffer are passed to a second decode module, which may be a loop decode module. The second decode module detects a special loop instruction token, and based on the detection of the special loop instruction token, a loop counter is conditionally tested. Using the first decode module, at least one instruction token of an iterative algorithm is assembled into a single instruction, which is executable in a single execution cycle. Based on the conditional test of the loop counter, the first decode module further assembles a loop branch instruction of the iterative algorithm into the single instruction executable in one execution cycle.

公开(公告)号：US09977445B2

公开(公告)日：2018-05-22

申请号：US15051406

申请日：2016-02-23

Applicant: STMicroelectronics (Beijing) R&D Co. Ltd

Inventor： Zhenghao Cui

IPC: G05F1/565 ,  G05F1/575 ,  H02M1/00

CPC classification number: G05F1/575 ,  H02M3/156 ,  H02M2001/0032 ,  H02M2001/0045

Abstract: An electronic device disclosed herein includes a linear output stage configured to generate an output voltage to an output node as a function of an input voltage, and a buck output stage configured to generate the output voltage to the output node as a function of the input voltage. Control circuitry is configured to enable the linear output stage and disable the buck output stage if a current demanded by a load to maintain the output voltage at a desired level is less than a limit current, and enable the buck output stage and disable the linear output stage a delay period of time after enabling the buck output stage, if the current demanded by the load to maintain the output voltage at the desired level is greater than the limit current.

公开(公告)号：US09170817B2

公开(公告)日：2015-10-27

申请号：US12535590

申请日：2009-08-04

Applicant: Kai-Feng Wang ,  Hong-Xia Sun ,  Yong-Qiang Wu

Inventor： Kai-Feng Wang ,  Hong-Xia Sun ,  Yong-Qiang Wu

IPC: G06F9/38

CPC classification number: G06F9/3806 ,  G06F9/3844

Abstract: Some microprocessors check branch prediction information in a branch history table and/or a branch target buffer. To check for branch prediction information, a microprocessor can identify which instructions are control flow instructions and which instructions are non control flow instructions. To reduce power consumption in the branch history table and/or branch target buffer, the branch history table and/or branch target buffer can check for branch prediction information corresponding to the control flow instructions and not the non control flow instructions.

Abstract translation: 一些微处理器检查分支历史表和/或分支目标缓冲器中的分支预测信息。 为了检查分支预测信息，微处理器可以识别哪些指令是控制流程指令，哪些指令是非控制流程指令。 为了减少分支历史表和/或分支目标缓冲器中的功耗，分支历史表和/或分支目标缓冲器可以检查与控制流程指令相对应的分支预测信息，而不是非控制流程指令。

公开(公告)号：US20120173846A1

公开(公告)日：2012-07-05

申请号：US13325614

申请日：2011-12-14

Applicant: Kai Feng Wang ,  Peng Fei Zhu ,  Hong Xia Sun ,  Yong Qiang Wu

Inventor： Kai Feng Wang ,  Peng Fei Zhu ,  Hong Xia Sun ,  Yong Qiang Wu

IPC: G06F15/76 ,  G06F9/22

CPC classification number: G06F1/32

Abstract: In a network-on-chip (NoC) system, multiple data messages may be transferred among modules of the system. Power consumption due to the transfer of the messages may affect a cost and overall performance of the system. A described technique provides a way to reduce a volume of data transferred in the NoC system by exploiting redundancy of data messages. Thus, if a data message to be sent from a source in the NoC includes so-called “zero” bytes that are bytes including only bits set to “0,” such zero bytes may not be transmitted in the NoC. Information on whether each byte of the data message is a zero byte may be recorded in a storage such as a data structure. This information, together with non-zero bytes of the data message, may form a compressed version of the data message. The information may then be used to uncompress the compressed data message at a destination.

Abstract translation: 在片上网络（NoC）系统中，可以在系统的模块之间传送多个数据消息。 由于消息传送引起的功耗可能会影响系统的成本和整体性能。 所描述的技术提供了一种通过利用数据消息的冗余来减少在NoC系统中传送的数据量的方法。 因此，如果要从NoC中的源发送的数据消息包括仅包括设置为“0”的字节的所谓的“零”字节，那么这种零字节可能不会在NoC中发送。 关于数据消息的每个字节是否为零字节的信息可以被记录在诸如数据结构的存储器中。 该信息与数据消息的非零字节可以形成数据消息的压缩版本。 然后可以使用该信息来在目的地解压缩压缩数据消息。

公开(公告)号：US20120170488A1

公开(公告)日：2012-07-05

申请号：US13335480

申请日：2011-12-22

Applicant: Kai Feng WANG ,  PengFei ZHU ,  HongXia SUN ,  YongQiang WU

Inventor： Kai Feng WANG ,  PengFei ZHU ,  HongXia SUN ,  YongQiang WU

IPC: H04L12/56 ,  H04L12/28

CPC classification number: H04L45/06 ,  H04L45/16

Abstract: In mesh networks having multiple nodes that communicate data to and from each other, a great number of data transmissions may be initiated and carried out to get data to a proper processing node for execution. To get data where it needs to go (e.g., the proper destination node), a routing algorithm is used to define a set of rules for efficiently passing data from node to node until the destination node is reached. For the purpose of assuring that all data is properly transferred from node to node in a reasonably efficient manner, a routing algorithm may define subsets of nodes into regions and then send data via the regions. Even greater overall efficiency may be realized by recognizing specific adjacency relationships among a group of destination nodes and taking advantage of such adjacencies by rerouting data through regions other than the region in which a destination node resides.

Abstract translation: 在具有向彼此传递数据的多个节点的网状网络中，可以启动并执行大量数据传输以将数据传送到适当的处理节点以供执行。 为了获得需要去的数据（例如，适当的目的地节点），使用路由算法来定义用于有效地将数据从节点传递到节点的规则集，直到到达目的地节点。 为了确保以合理有效的方式从节点到节点正确传输所有数据，路由算法可以将节点的子集定义为区域，然后经由区域发送数据。 通过识别一组目的地节点之间的特定邻接关系并且通过重新路由数据通过除了目的地节点驻留的区域之外的区域来利用这种相邻性，可以实现更高的整体效率。

公开(公告)号：US20100205409A1

公开(公告)日：2010-08-12

申请号：US12700638

申请日：2010-02-04

Applicant: Peng Fei Zhu ,  Hong-Xia Sun ,  Yong Qiang Wu

Inventor： Peng Fei Zhu ,  Hong-Xia Sun ,  Yong Qiang Wu

IPC: G06F9/30 ,  G06F1/04

CPC classification number: G06F9/3012 ,  G06F9/384

Abstract: Embodiments of a processor architecture utilizing multi-bank implementation of physical register mapping table are provided. A register renaming system to correlate architectural registers to physical registers includes a physical register mapping table and a renaming logic. The physical register mapping table has a plurality of entries each indicative of a state of a respective physical register. The mapping table has a plurality of non-overlapping sections each of which having respective entries of the mapping table. The renaming logic is coupled to search a number of the sections of the mapping table in parallel to identify entries that indicate the respective physical registers have a first state. The renaming logic selectively correlates each of a plurality of architectural registers to a respective physical register identified as being in the first state. Methods of utilizing the multi-bank implementation of physical register mapping table are also provided.

Abstract translation: 提供了利用多库实现物理寄存器映射表的处理器架构的实施例。 将结构寄存器与物理寄存器相关联的寄存器重命名系统包括物理寄存器映射表和重命名逻辑。 物理寄存器映射表具有多个表示每个物理寄存器的状态的条目。 映射表具有多个非重叠部分，每个部分具有映射表的相应条目。 重命名逻辑被耦合以并行地搜索映射表的多个部分以识别指示相应物理寄存器具有第一状态的条目。 重命名逻辑选择性地将多个体系结构寄存器中的每一个相关于被识别为处于第一状态的相应物理寄存器。 还提供了利用多库实现物理寄存器映射表的方法。

公开(公告)号：US10883828B2

公开(公告)日：2021-01-05

申请号：US15645371

申请日：2017-07-10

Applicant: STMicroelectronics (Beijing) R&D Co. Ltd.

Inventor： Peng Fei Zhu ,  Yong Qiang Wu ,  Kai Feng Wang ,  Hong Xia Sun

IPC: G01C19/02 ,  A61B1/00 ,  A61B1/04 ,  G01C19/00 ,  A61B1/06

Abstract: An embodiment comprises and apparatus having an image capture device with an image axis and a gyroscope operable to indicate the orientation of the image axis. An embodiment of a capsule endoscopy system comprises an imaging capsule and an external unit. The imaging capsule may comprise an image capture device having an image axis and a gyroscope operable to indicate the orientation of the image axis. The external unit may comprise a gyroscope operable to indicate an orientation of a subject and a harness wearable by a subject and operable to align the gyroscope with the subject. The imaging capsule may send and image to an external unit for processing and display, and the external unit may provide for calculation of the image-axis orientation relative to the body.

公开(公告)号：US10686392B2

公开(公告)日：2020-06-16

申请号：US16259533

申请日：2019-01-28

Applicant: STMICROELECTRONICS (BEIJING) R&D CO. LTD

Inventor： Rendong Wang

IPC: G01R31/02 ,  H02P21/18 ,  H02K11/33 ,  H02K11/21 ,  H02K11/27 ,  H02K1/27 ,  H02P21/22 ,  H02P21/32 ,  H02K11/26 ,  H02K21/14

Abstract: The present disclosure is directed to a permanent magnet motor control method and system. A new structure configuration of a permanent magnet motor has a rotor with two or more permanent magnets attached thereon, a stator wound in a “Y” topology with three coils (windings) arranged at 120 degree among one another, and a neutral point of the wound stator wired in a manner that the voltage at the neutral point may be detected in substantially real time. The detected neutral point voltages are analyzed together with the associated vectors of the excitation current provided to the windings of the stator to determine a speed of the rotor. The determined speed of the rotor is used for vector control.