公开(公告)号：US20090063867A1

公开(公告)日：2009-03-05

申请号：US11850079

申请日：2007-09-05

Applicant: Axel Aguado Granados ,  Benjamin A. Fox ,  Nathaniel J. Gibbs ,  Jamie R. Kuesel ,  Andrew B. Maki ,  Trevor J. Timpane

Inventor： Axel Aguado Granados ,  Benjamin A. Fox ,  Nathaniel J. Gibbs ,  Jamie R. Kuesel ,  Andrew B. Maki ,  Trevor J. Timpane

IPC: G06F21/22 ,  H04L9/28

CPC classification number: G06F21/125 ,  H04L9/0822 ,  H04L9/083

Abstract: A method, system and computer program product for partitioning the binary image of a software program, and partially removing code bits to create an encrypted software key, to increase software security. The software program's binary image is partitioned along a random segment length or a byte/nibble segment length, and the code bits removed, and stored, along with their positional data in a software key. The software key is encrypted and is separately distributed from the inoperable binary image to the end user. The encrypted key is stored on a secure remote server. When the end user properly authenticates with the developer's remote servers, the encrypted security key is downloaded from the secure remote server and is locally decrypted. The removed code bits are reinserted into the fractioned binary image utilizing the positional location information. The binary image is then operable to complete execution of the software program.

Abstract translation: 一种方法，系统和计算机程序产品，用于对软件程序的二进制图像进行分区，并部分地移除代码位以创建加密的软件密钥，以增加软件安全性。 软件程序的二进制图像沿随机分段长度或字节/半字节段长度进行分区，并将代码位与其位置数据一起删除并存储在软件密钥中。 软件密钥被加密，并且从不可操作的二进制图像分开分发给最终用户。 加密的密钥存储在安全的远程服务器上。 当最终用户对开发者的远程服务器进行正确认证时，加密的安全密钥从安全远程服务器下载，并被本地解密。 使用位置位置信息将去除的代码位重新插入分级二进制图像。 然后二进制图像可操作以完成软件程序的执行。

公开(公告)号：US20080205570A1

公开(公告)日：2008-08-28

申请号：US11678256

申请日：2007-02-23

Applicant: Steven J. Baumgartner ,  Timothy C. Buchholtz ,  Andrew D. Davies ,  Thomas W. Liang ,  Andrew B. Maki ,  Thomas Pham ,  Dana M. Woeste ,  Daniel G. Young

Inventor： Steven J. Baumgartner ,  Timothy C. Buchholtz ,  Andrew D. Davies ,  Thomas W. Liang ,  Andrew B. Maki ,  Thomas Pham ,  Dana M. Woeste ,  Daniel G. Young

IPC: H03D3/24

CPC classification number: H03L7/0812 ,  H04L7/0008

Abstract: A phase locked loop generates an output corresponding to a source synchronous input and an input link clock signal. A phase locking feedback system receives the input and an input link clock signal and detects phase deviations between the output and the input. The phase locking feedback system also adjusts an adjusted clock signal based on the phase deviations thereby causing the phase locking feedback system to generate the output so that the output has a steady phase relationship with the input. A first mechanism causes the phase locking feedback system not to track phase deviations between the output and the input upon occurrence of a first predefined event, thereby maintaining the adjusted clock signal at a current state.

Abstract translation: 锁相环产生对应于源同步输入和输入链路时钟信号的输出。 相位锁定反馈系统接收输入和输入链路时钟信号，并检测输出和输入之间的相位偏差。 相位锁定反馈系统还基于相位偏差来调整调整的时钟信号，从而使相位锁定反馈系统产生输出，使得输出与输入具有稳定的相位关系。 第一机制使得相位锁定反馈系统在出现第一预定义事件时不跟踪输出和输入之间的相位偏差，从而将经调整的时钟信号保持在当前状态。

公开(公告)号：US06998852B2

公开(公告)日：2006-02-14

申请号：US10879813

申请日：2004-06-29

Applicant: Gerald Keith Bartley ,  Darryl John Becker ,  Paul Eric Dahlen ,  Philip Raymond Germann ,  Andrew B. Maki ,  Mark Owen Maxson

Inventor： Gerald Keith Bartley ,  Darryl John Becker ,  Paul Eric Dahlen ,  Philip Raymond Germann ,  Andrew B. Maki ,  Mark Owen Maxson

IPC: G01R31/08

CPC classification number: G01R31/2853 ,  G01R27/28

Abstract: A method and apparatus are provided for implementing direct attenuation loss measurement in an electronic package. A sinusoidal voltage source signal of a selected frequency is coupled to an embedded transmission line test structure in the electronic package. Receive circuitry is coupled to the transmission line test structure for detecting amplitude of a received sinusoidal voltage source signal to identify attenuation loss through the transmission line test structure. An identified attenuation loss of the transmission line test structure is compared with a threshold value for verifying acceptable attenuation of the electronic package transmission line test structure.

Abstract translation: 提供一种用于在电子封装中实现直接衰减损耗测量的方法和装置。 所选频率的正弦电压源信号耦合到电子封装中的嵌入式传输线测试结构。 接收电路耦合到传输线测试结构，用于检测接收的正弦电压源信号的幅度，以通过传输线测试结构识别衰减损耗。 将传输线测试结构的确定的衰减损耗与用于验证电子封装传输线测试结构的可接受衰减的阈值进行比较。

公开(公告)号：US08332659B2

公开(公告)日：2012-12-11

申请号：US12181352

申请日：2008-07-29

Applicant: Gerald K Bartley ,  Darryl J Becker ,  Paul E Dahlen ,  Philip R Germann ,  Andrew B Maki ,  Mark O Maxson

Inventor： Gerald K Bartley ,  Darryl J Becker ,  Paul E Dahlen ,  Philip R Germann ,  Andrew B Maki ,  Mark O Maxson

IPC: G06F21/00

CPC classification number: G06F21/75 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2224/0401

Abstract: Method and apparatus and associated method of detecting microchip tampering may include a conductive element in electrical communication with multiple sensors for verifying that signal degradation occurs at an expected region of the conductive element. A detected variance from the expected region may automatically trigger an action for impeding an integrated circuit exploitation process.

Abstract translation: 用于检测微芯片篡改的方法和装置以及相关联的方法可以包括与多个传感器电连通的导电元件，用于验证在导电元件的预期区域处发生信号劣化。 检测到的与预期区域的差异可以自动地触发阻止集成电路开发过程的动作。

公开(公告)号：US08172140B2

公开(公告)日：2012-05-08

申请号：US12181401

申请日：2008-07-29

Applicant: Gerald K Bartley ,  Darryl J. Becker ,  Todd A. Christensen ,  Paul E. Dahlen ,  Philip R. Germann ,  Andrew B. Maki ,  Mark O. Maxson ,  John E. Sheets, II

Inventor： Gerald K Bartley ,  Darryl J. Becker ,  Todd A. Christensen ,  Paul E. Dahlen ,  Philip R. Germann ,  Andrew B. Maki ,  Mark O. Maxson ,  John E. Sheets, II

IPC: G06K7/08

CPC classification number: G06F21/87

Abstract: A method and apparatus include conductive material doped within a microchip that accumulates a detectable charge in the presence of ions. Such ions may result from a focused ion beam or other unwelcome technology exploitation effort. Circuitry sensing the charge buildup in the embedded, doped material may initiate a defensive action intended to defeat the tampering operation.

Abstract translation: 一种方法和装置包括掺杂在微芯片内的导电材料，其在离子存在下累积可检测的电荷。 这样的离子可能由聚焦离子束或其他不受欢迎的技术开发而产生。 感测嵌入的掺杂材料中的电荷积累的电路可以启动旨在击败篡改操作的防御动作。

公开(公告)号：US08003412B2

公开(公告)日：2011-08-23

申请号：US12888600

申请日：2010-09-23

Applicant: Axel A. Granados ,  Benjamin A. Fox ,  Nathaniel J. Gibbs ,  Andrew B. Maki ,  Trevor J. Timpane

Inventor： Axel A. Granados ,  Benjamin A. Fox ,  Nathaniel J. Gibbs ,  Andrew B. Maki ,  Trevor J. Timpane

IPC: H01L21/00

CPC classification number: G03F9/7049 ,  G03F9/7003 ,  G03F9/7076 ,  G03F9/708 ,  G03F9/7084 ,  G03F9/7088 ,  G03F9/7096 ,  Y10S438/975

Abstract: A method, structure, system of aligning a substrate to a photomask. The method comprising: directing light through a clear region of the photomask in a photolithography tool, through a lens of the tool and onto a set of at least three diffraction mirror arrays on the substrate, each diffraction mirror array of the set of at least three diffraction minor arrays comprising a single row of mirrors, all mirrors in any particular diffraction mirror array spaced apart a same distance, mirrors in different diffraction mirror arrays spaced apart different distances; measuring an intensity of light diffracted from the set of at least three diffraction mirror arrays onto an array of photo detectors; and adjusting a temperature of the photomask or photomask and lens based on the measured intensity of light.

Abstract translation: 将基板与光掩模对准的方法，结构，系统。 该方法包括：将光穿过光刻工具中的光掩模的透明区域，通过工具的透镜并且在基底上的一组至少三个衍射反射镜阵列上，该组的至少三个衍射镜阵列 衍射次要阵列包括单排反射镜，在任何特定衍射镜阵列中间隔相同距离的所有反射镜，在不同距离上间隔开的不同衍射镜阵列中的反射镜; 测量从所述至少三个衍射反射镜阵列组衍射的光的强度到光电检测器阵列上; 以及基于所测量的光强度来调节光掩模或光掩模和透镜的温度。

公开(公告)号：US07992001B2

公开(公告)日：2011-08-02

申请号：US11850079

申请日：2007-09-05

Applicant: Axel Aguado Granados ,  Benjamin A. Fox ,  Nathaniel J. Gibbs ,  Jamie R. Kuesel ,  Andrew B. Maki ,  Trevor J. Timpane

Inventor： Axel Aguado Granados ,  Benjamin A. Fox ,  Nathaniel J. Gibbs ,  Jamie R. Kuesel ,  Andrew B. Maki ,  Trevor J. Timpane

IPC: G06F21/00

CPC classification number: G06F21/125 ,  H04L9/0822 ,  H04L9/083

Abstract: A method, system and computer program product for partitioning the binary image of a software program, and partially removing code bits to create an encrypted software key, to increase software security. The software program's binary image is partitioned along a random segment length or a byte/nibble segment length, and the code bits removed, and stored, along with their positional data in a software key. The software key is encrypted and is separately distributed from the inoperable binary image to the end user. The encrypted key is stored on a secure remote server. When the end user properly authenticates with the developer's remote servers, the encrypted security key is downloaded from the secure remote server and is locally decrypted. The removed code bits are reinserted into the fractioned binary image utilizing the positional location information. The binary image is then operable to complete execution of the software program.

Abstract translation: 一种方法，系统和计算机程序产品，用于对软件程序的二进制图像进行分区，并部分地移除代码位以创建加密的软件密钥，以增加软件安全性。 软件程序的二进制图像沿随机分段长度或字节/半字节段长度进行分区，并将代码位与其位置数据一起删除并存储在软件密钥中。 软件密钥被加密，并且从不可操作的二进制图像分开分发给最终用户。 加密的密钥存储在安全的远程服务器上。 当最终用户对开发者的远程服务器进行正确认证时，加密的安全密钥从安全远程服务器下载，并被本地解密。 使用位置位置信息将去除的代码位重新插入分级二进制图像。 然后二进制图像可操作以完成软件程序的执行。

公开(公告)号：US07989968B2

公开(公告)日：2011-08-02

申请号：US12888697

申请日：2010-09-23

Applicant: Axel A. Granados ,  Benjamin A. Fox ,  Nathaniel J. Gibbs ,  Andrew B. Maki ,  Trevor J. Timpane

Inventor： Axel A. Granados ,  Benjamin A. Fox ,  Nathaniel J. Gibbs ,  Andrew B. Maki ,  Trevor J. Timpane

IPC: H01L23/544

CPC classification number: G03F9/7049 ,  G03F9/7003 ,  G03F9/7076 ,  G03F9/708 ,  G03F9/7084 ,  G03F9/7088 ,  G03F9/7096 ,  Y10S438/975

Abstract: A method, structure, system of aligning a substrate to a photomask. The method comprising: directing light through a clear region of the photomask in a photolithography tool, through a lens of the tool and onto a set of at least three diffraction mirror arrays on the substrate, each diffraction mirror array of the set of at least three diffraction mirror arrays comprising a single row of mirrors, all mirrors in any particular diffraction mirror array spaced apart a same distance, mirrors in different diffraction mirror arrays spaced apart different distances; measuring an intensity of light diffracted from the set of at least three diffraction mirror arrays onto an array of photo detectors; and adjusting a temperature of the photomask or photomask and lens based on the measured intensity of light.

Abstract translation: 将基板与光掩模对准的方法，结构，系统。 该方法包括：将光穿过光刻工具中的光掩模的透明区域，通过工具的透镜并且在基底上的一组至少三个衍射反射镜阵列上，该组的至少三个衍射镜阵列 包括单行反射镜的衍射镜阵列，在任何特定衍射镜阵列中间隔相同距离的所有反射镜，在不同距离上间隔开的不同衍射镜阵列中的反射镜; 测量从所述至少三个衍射反射镜阵列组衍射的光的强度到光电检测器阵列上; 以及基于所测量的光强度来调节光掩模或光掩模和透镜的温度。

公开(公告)号：US07884625B2

公开(公告)日：2011-02-08

申请号：US12181365

申请日：2008-07-29

Applicant: Gerald K Bartley ,  Darryl J Becker ,  Paul E Dahlen ,  Philip R Germann ,  Andrew B Maki ,  Mark O Maxson

Inventor： Gerald K Bartley ,  Darryl J Becker ,  Paul E Dahlen ,  Philip R Germann ,  Andrew B Maki ,  Mark O Maxson

IPC: G01R27/26

CPC classification number: H01L23/576 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/3011 ,  H01L2224/0401

Abstract: Apparatus, method and program product may detect an attempt to tamper with a microchip by detecting an unacceptable alteration in a measured capacitance associated with capacitance structures proximate the backside of a microchip. The capacitance structures typically include metallic shapes and may connect using through-silicon vias to active sensing circuitry within the microchip. In response to the sensed change, a shutdown, spoofing, self-destruct or other defensive action may be initiated to protect security sensitive circuitry of the microchip.

Abstract translation: 装置，方法和程序产品可以通过检测与微芯片的背面附近的电容结构相关联的测量电容中的不可接受的改变来检测试图篡改微芯片。 电容结构通常包括金属形状，并且可以使用硅硅通孔连接到微芯片内的主动感测电路。 响应于感测到的变化，可以启动关机，欺骗，自毁或其他防御动作以保护微芯片的安全敏感电路。

公开(公告)号：US20100026506A1

公开(公告)日：2010-02-04

申请号：US12181342

申请日：2008-07-29

Applicant: Gerald K. Bartley ,  Darryl J. Becker ,  Paul E. Dahlen ,  Philip R. Germann ,  Andrew B. Maki ,  Mark O. Maxson

Inventor： Gerald K. Bartley ,  Darryl J. Becker ,  Paul E. Dahlen ,  Philip R. Germann ,  Andrew B. Maki ,  Mark O. Maxson

IPC: G08B21/00

CPC classification number: G06F21/86 ,  H01L23/576 ,  H01L2224/16225 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/15192 ,  H01L2924/16251 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/0401

Abstract: An apparatus and method detect microchip tampering by including a capacitance circuit that comprises a protective cover. Dielectric material may be sandwiched between the cover and a backside metal layer, which may be proximate a protected surface of the microchip. Changes in the capacitance of the above circuit caused by alteration of the cover or other component of the capacitance circuit may be sensed and prompt defensive action.

Abstract translation: 一种装置和方法，通过包括包括保护盖的电容电路来检测微芯片篡改。 电介质材料可以夹在盖子和背面金属层之间，背面金属层可以靠近微芯片的受保护表面。 可以感测到由电容电路的盖或其他部件的改变引起的上述电路的电容的变化，并且具有迅速的防御作用。