中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

79 records (took 0.014 seconds)

    Lead plating method for GMR head manufacture
    41.
    发明授权
    Lead plating method for GMR head manufacture 失效
    GMR头制造的铅电镀方法

    公开(公告)号：US06973712B2

    公开(公告)日：2005-12-13

    申请号：US10093106

    申请日：2002-03-07

    Applicant: Chao-Peng Chen ,  Kevin Lin ,  Jei-Wei Chang ,  Kochan Ju ,  Hui-Chuan Wang

    Inventor： Chao-Peng Chen ,  Kevin Lin ,  Jei-Wei Chang ,  Kochan Ju ,  Hui-Chuan Wang

    IPC: G11B5/31 ,  G11B5/39 ,  G11B5/127 ,  H04R31/00

    CPC classification number: B82Y10/00 ,  G11B5/3116 ,  G11B5/3163 ,  G11B5/3903 ,  Y10T29/49021 ,  Y10T29/49032 ,  Y10T29/49041 ,  Y10T29/49044 ,  Y10T29/49046 ,  Y10T29/49048 ,  Y10T29/49052 ,  Y10T29/49128

    Abstract: A major problem in Lead Overlay design for GMR structures is that the magnetic read track width is wider than the physical read track width. This is due to high interfacial resistance between the leads and the GMR layer which is an unavoidable side effect of prior art methods. The present invention uses electroplating preceded by a wet etch to fabricate the leads. This approach requires only a thin protection layer over the GMR layer to ensure that interface resistance is minimal. Using wet surface cleaning avoids sputtering defects and plating is compatible with this so the cleaned surface is preserved Only a single lithography step is needed to define the track since there is no re-deposition involved.

    Abstract translation: GMR结构的Lead Overlay设计中的一个主要问题是磁性读取磁道宽度比物理读取磁道宽度宽。 这是由于引线和GMR层之间的高界面电阻，这是现有技术方法的不可避免的副作用。 本发明使用在湿蚀刻之前的电镀来制造引线。 该方法仅需要在GMR层上的薄保护层，以确保接口电阻最小。 使用湿表面清洁可以避免溅射缺陷，电镀与此相容，因此清洁表面被保留只需要一个光刻步骤来定义轨道，因为没有重新沉积。

    Method to form reduced dimension pattern with good edge roughness
    42.
    发明授权
    Method to form reduced dimension pattern with good edge roughness 失效
    形成具有良好边缘粗糙度的减小尺寸图案的方法

    公开(公告)号：US06905811B2

    公开(公告)日：2005-06-14

    申请号：US10420593

    申请日：2003-04-22

    Applicant: Chao Peng Chen ,  Chunping Luo ,  Stuart Kao ,  Jei-Wei Chang

    Inventor： Chao Peng Chen ,  Chunping Luo ,  Stuart Kao ,  Jei-Wei Chang

    IPC: G03C5/00 ,  G03F7/00 ,  G03F7/30 ,  G03F7/38 ,  G03F7/40

    CPC classification number: G03F7/40 ,  G03F7/30 ,  G03F7/38

    Abstract: As feature sizes approach 0.1 μm or smaller, reduction of line edge roughness (LER) becomes increasingly important. Significant reductions in edge roughness have been achieved by applying a second Ebeam exposure after the initial one that is used to define the pattern. After this second blanket exposure a longer heat treatment and a stronger development process than before are used. In addition to reducing edge roughness the disclosed treatment allows the CD to be reduced under tight control since the amount of CD reduction is proportional to the second Ebeam dosage.

    Abstract translation: 随着特征尺寸接近0.1μm或更小，线边缘粗糙度（LER）的减小变得越来越重要。 通过在用于限定图案的初始曝光之后施加第二次Ebeam曝光，已经实现了边缘粗糙度的显着降低。 在第二次曝光之后，使用比以前更长的热处理和更强的显影工艺。 除了减少边缘粗糙度之外，所公开的处理允许在紧密控制下CD降低，因为CD减少的量与第二Ebeam剂量成比例。

    Self-alignment scheme for enhancement of CPP-GMR
    43.
    发明申请
    Self-alignment scheme for enhancement of CPP-GMR 失效
    用于增强CPP-GMR的自对准方案

    公开(公告)号：US20050111143A1

    公开(公告)日：2005-05-26

    申请号：US10718372

    申请日：2003-11-20

    Applicant: Jei-Wei Chang ,  Chao-Peng Chen ,  Min Li ,  Kochan Ju

    Inventor： Jei-Wei Chang ,  Chao-Peng Chen ,  Min Li ,  Kochan Ju

    IPC: G11B5/127 ,  G11B5/33

    CPC classification number: G11B5/1278 ,  Y10T29/49052

    Abstract: A method for fabricating a current-perpendicular-to-plane (CPP) giant magnetoresistive (GMR) sensor of the synthetic spin valve type is provided, the method including an electron-beam lithographic process employing both primary and secondary electron absorption and first and second self-aligned lift-off processes for patterning the capped ferromagnetic free layer and the conducting, non-magnetic spacer layer. The sensor so fabricated has reduced resistance and increased sensitivity.

    Abstract translation: 提供了一种用于制造合成自旋阀类型的电流垂直平面（CPP）巨磁阻（GMR）传感器的方法，该方法包括采用初级和次级电子吸收的电子束光刻工艺，第一和第二 用于对封装的铁磁自由层和导电的非磁性间隔层进行图案化的自对准剥离工艺。 所制造的传感器具有降低的电阻和增加的灵敏度。

    Single layer resist liftoff process for nano track width
    44.
    发明申请
    Single layer resist liftoff process for nano track width 有权
    纳米轨道宽度的单层抗剥离工艺

    公开(公告)号：US20050106509A1

    公开(公告)日：2005-05-19

    申请号：US10714305

    申请日：2003-11-14

    Applicant: Jei-Wei Chang ,  Chao-Peng Chen ,  Chunping Luo ,  Shou-Chen Kao

    Inventor： Jei-Wei Chang ,  Chao-Peng Chen ,  Chunping Luo ,  Shou-Chen Kao

    IPC: G03F7/00 ,  G03F7/40 ,  G11B5/31 ,  G11B5/39

    CPC classification number: G11B5/3163 ,  G03F7/40 ,  G03F7/405 ,  G11B5/3903

    Abstract: As the critical dimensions of liftoff patterns grow smaller, it becomes increasingly more difficult to make liftoff resists that have the required resolution. This problem has been overcome by use of a combination of ion beam processing and ozone slimming to form lift-off patterns with undercuts from a single layer of photoresist. The ion beam process serves to harden the top portion of the resist while the ozone is used to oxidize and erode the lower portion resist sidewall to form the undercut.

    Abstract translation: 随着脱模模式的关键尺寸越来越小，制备具有所需分辨率的剥离抗蚀剂变得越来越困难。 通过使用离子束处理和臭氧纤维化的组合来克服这个问题，以形成具有来自单层光致抗蚀剂的底切的剥离图案。 离子束工艺用于使抗蚀剂的顶部硬化，同时使用臭氧来氧化和腐蚀下部抗蚀剂侧壁以形成底切。

    ACTIVE DAMPING FOR DIMMABLE DRIVER FOR LIGHTING UNIT
    48.
    发明申请
    ACTIVE DAMPING FOR DIMMABLE DRIVER FOR LIGHTING UNIT 审中-公开
    用于照明装置的二手驱动器的主动阻尼

    公开(公告)号：US20140203721A1

    公开(公告)日：2014-07-24

    申请号：US13809284

    申请日：2010-08-10

    Applicant: Haibo Qiao ,  Zhen Yuan Guan ,  Chao Peng ,  Jianghong Kong ,  Tianyi Wei ,  Jian Jiang

    Inventor： Haibo Qiao ,  Zhen Yuan Guan ,  Chao Peng ,  Jianghong Kong ,  Tianyi Wei ,  Jian Jiang

    IPC: H05B33/08

    CPC classification number: H05B33/0815 ,  H05B33/0887

    Abstract: A circuit (236, 300, 400, 536) is provided for an apparatus (200, 500) configured to convert an AC signal to a DC signal for driving at least one light source (240, 540). The circuit includes a damping element (350, 450) configured to damp a current in the apparatus during time periods when the current exceeds a threshold, and a bypass path (340, 440) for bypassing the damping element during time periods when the current does not exceed the threshold.

    Abstract translation: 提供了一种用于装置（200,500）的电路（236,300,400,536），其被配置为将AC信号转换成用于驱动至少一个光源（240,540）的DC信号。 该电路包括阻尼元件（350,450），该阻尼元件构造成在电流超过阈值的时间周期内阻尼装置中的电流;以及旁路路径（340,440），用于在电流达到时间周期内绕过阻尼元件 不超过阈值。

    Method to reduce void formation during trapezoidal write pole plating in perpendicular recording
    50.
    发明授权
    Method to reduce void formation during trapezoidal write pole plating in perpendicular recording 有权
    在垂直记录中梯形写入极电镀期间减少空隙形成的方法

    公开(公告)号：US08273233B2

    公开(公告)日：2012-09-25

    申请号：US12460432

    申请日：2009-07-17

    Applicant: Chao-Peng Chen ,  Jas Chudasama ,  Situan Lam ,  Chien-Li Lin

    Inventor： Chao-Peng Chen ,  Jas Chudasama ,  Situan Lam ,  Chien-Li Lin

    IPC: C25D5/02

    CPC classification number: C25D5/022 ,  C25D5/18 ,  C25D7/001 ,  G11B5/1278 ,  G11B5/3116 ,  G11B5/3163

    Abstract: A method of forming a write pole in a PMR head is disclosed that involves forming an opening in a mold forming layer. A conformal Ru seed layer is formed within the opening and on a top surface. An auxiliary layer made of CoFeNi or alloys thereof is formed as a conformal layer on the seed layer. All or part of the auxiliary layer is removed in an electroplating solution by applying a (−) current or voltage during an activation step that is controlled by activation time. Thereafter, a magnetic material is electroplated with a (+) current to fill the opening and preferably has the same CoFeNi composition as the auxiliary layer. The method avoids Ru oxidation that causes poor adhesion to CoFeNi, and elevated surfactant levels that lead to write pole impurities. Voids in the plated material are significantly reduced by forming a seed layer surface with improved wettability.

    Abstract translation: 公开了一种在PMR头中形成写极的方法，其涉及在成型层中形成开口。 在开口内和顶表面上形成保形钌籽晶层。 由CoFeNi制成的辅助层或其合金在种子层上形成为保形层。 通过在由激活时间控制的激活步骤期间施加（ - ）电流或电压，在电镀溶液中去除全部或部分辅助层。 此后，以（+）电流电镀磁性材料以填充开口，并且优选地具有与辅助层相同的CoFeNi组成。 该方法避免了Ru氧化，导致对CoFeNi的粘附不良，以及导致写入极杂质的表面活性剂含量升高。 通过形成具有改善的润湿性的种子层表面，可显着地减少电镀材料中的空隙。

Patent Agency Ranking