公开(公告)号：US20060184763A1

公开(公告)日：2006-08-17

申请号：US11308243

申请日：2006-03-14

Applicant: Yung-Chun Lei ,  Chun-Nan Lin

Inventor： Yung-Chun Lei ,  Chun-Nan Lin

IPC: G06F9/34

CPC classification number: G06F8/65

Abstract: A processing system connected to an apparatus includes a non-volatile memory (NVM) for storing firmware needed by the processing system; and an NVM control interface capable of writing and reading data stored in the NVM; wherein the NVM control interface reads a previous piece of data being already written into the NVM prior to a current piece of data and transmits the previous piece of data to the apparatus for comparison with original data that was previously written into the NVM, and the NVM control interface writes the current piece of data into the NVM.

Abstract translation: 连接到装置的处理系统包括用于存储处理系统所需的固件的非易失性存储器（NVM） 以及能够写入和读取存储在NVM中的数据的NVM控制接口; 其中NVM控制接口在当前数据片段之前读取已经写入NVM的先前数据块，并将先前的数据发送到装置以与之前写入NVM的原始数据进行比较，并且NVM 控制接口将当前数据写入NVM。

公开(公告)号：US06482384B1

公开(公告)日：2002-11-19

申请号：US09712551

申请日：2000-11-14

Applicant: Shyan-Lung Chung ,  Chun-Nan Lin ,  Zheng-Xiuo Lin

Inventor： Shyan-Lung Chung ,  Chun-Nan Lin ,  Zheng-Xiuo Lin

IPC: C01B21072

CPC classification number: C04B35/6267 ,  C01B21/0722 ,  C01P2002/72 ,  C01P2004/10 ,  C01P2004/50 ,  C01P2004/61 ,  C01P2006/14 ,  C01P2006/40 ,  C01P2006/60 ,  C01P2006/80 ,  C04B2235/3217 ,  C04B2235/3232 ,  C04B2235/3244 ,  C04B2235/3418 ,  C04B2235/3826 ,  C04B2235/386 ,  C04B2235/3865 ,  C04B2235/3873 ,  C04B2235/3886 ,  C04B2235/40 ,  C04B2235/401 ,  C04B2235/402 ,  C04B2235/404 ,  C04B2235/405 ,  C04B2235/422 ,  C04B2235/428 ,  C04B2235/46 ,  C04B2235/52 ,  C04B2235/5292 ,  C04B2235/5436

Abstract: This invention provides a method for production of AlN powder. An Al powder was poured into a refractory container having an opening end. If the packing density of the Al powder was less than 0.8 g/cm3, the container containing the Al powder was placed in a reaction chamber filled with nitrogen. If the packing density was larger than 0.8 g/cm3, porous aluminum tubes were placed vertically in Al powder or an initiator was placed on top of the Al powder or both were taken. The container was then placed in the reaction chamber filled with nitrogen. A nitrogen stream was allowed to flow through the Al powder from the bottom to the top and the combustion synthesis reaction was ignited by heating the top surface of the reactant powder.

Abstract translation: 本发明提供一种生产AlN粉末的方法。 将Al粉末倒入具有开口端的耐火容器中。 如果Al粉末的填充密度小于0.8g / cm 3，则将含有Al粉末的容器放入填充有氮气的反应室中。 如果填充密度大于0.8g / cm 3，则将多孔铝管垂直放置在Al粉末中，或者将引发剂置于Al粉末的顶部或两者。 然后将容器放置在填充有氮气的反应室中。 使氮气流从底部向顶部流过Al粉末，通过加热反应物粉末的顶部表面燃烧合成反应。

公开(公告)号：US5741813A

公开(公告)日：1998-04-21

申请号：US537089

申请日：1995-09-29

Applicant: Chun-Nan Lin ,  Shen-Jeu Won ,  Hsiao-Sheng Lieu ,  Shorong-Shii Liou

Inventor： Chun-Nan Lin ,  Shen-Jeu Won ,  Hsiao-Sheng Lieu ,  Shorong-Shii Liou

IPC: A61K31/352 ,  C07D407/14 ,  A61K31/35

CPC classification number: C07D407/14 ,  A61K31/352

Abstract: Compounds of general Formula I in which the substituents of R.sub.1 -R.sub.7 are hydrogen, hydroxy group, C.sub.1-6 alkyl group, C.sub.1-6 alkoxy group, or epoxypropoxy, but at the most, six of the substituents can simultaneously be hydrogen, methoxy group, or hydroxy group, or epoxypropoxy group for activity against hepatoma. There are also described processes for the preparation of the novel compounds and useful intermediates. Substitute benzophenones are described.

公开(公告)号：US08987739B2

公开(公告)日：2015-03-24

申请号：US13424382

申请日：2012-03-20

Applicant: Chen-Yuan Tu ,  Yih-Chyun Kao ,  Shu-Feng Wu ,  Chun-Nan Lin

Inventor： Chen-Yuan Tu ,  Yih-Chyun Kao ,  Shu-Feng Wu ,  Chun-Nan Lin

IPC: H01L31/00 ,  H01L29/786 ,  H01L27/12

CPC classification number: H01L29/43 ,  H01L27/1225 ,  H01L27/1248 ,  H01L29/786 ,  H01L29/7869

Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a gate, a channel layer, a gate insulation layer, a source, a drain and a silicon-aluminum-oxide layer. The gate is disposed on a substrate. The channel layer is disposed on the substrate. The channel layer overlaps the gate. The gate insulation layer is disposed between the gate and the channel layer. The source and the drain are disposed on two sides of the channel layer. The silicon-aluminum-oxide layer is disposed on the substrate and covers the source, the drain and the channel layer.

Abstract translation: 提供了一种半导体器件及其制造方法。 半导体器件包括栅极，沟道层，栅极绝缘层，源极，漏极和硅 - 氧化铝层。 栅极设置在基板上。 通道层设置在基板上。 沟道层与栅极重叠。 栅极绝缘层设置在栅极和沟道层之间。 源极和漏极设置在沟道层的两侧。 硅 - 氧化铝层设置在基板上并覆盖源极，漏极和沟道层。

公开(公告)号：US20110306775A1

公开(公告)日：2011-12-15

申请号：US12896246

申请日：2010-10-01

Applicant: Chun-Nan Lin ,  Huang-Yao Tu ,  A-Mei Huang ,  Tzyh-Chyuan Hoar ,  Shyh-Chyun Yang ,  Yeong-Shiau Pu ,  Jan-Gowth Chang

Inventor： Chun-Nan Lin ,  Huang-Yao Tu ,  A-Mei Huang ,  Tzyh-Chyuan Hoar ,  Shyh-Chyun Yang ,  Yeong-Shiau Pu ,  Jan-Gowth Chang

IPC: C07D207/12 ,  C07C233/00 ,  C07C69/76 ,  C07C59/90 ,  C07D333/38

CPC classification number: C07D333/40 ,  C07C59/90 ,  C07D207/06

Abstract: Disclosed are a serious of 2′,5′-dimethoxychalcone derivatives for treating cancer, wherein 2,5-dimethoxyacetophenone and methyl 4-formylbenzoate are condensed to form 4-carboxyl-2′,5′-dimethoxychalcone (compound 1), which is further reacted with alkyl halides or amines to synthesize the chalcone derivatives of compounds 2-17. In addition, 2,5-dimethoxyacetophenone is reacted with 5-formyl-2-thiophenecarboxylic acid to form compound 18 (3-(3-thiophene)carboxyl-1-(2,5-dimethoxyphenyl)prop-2-en-1-one). The synthesized 2′,5′-dimethoxychalcone derivatives can be acted as microtubule-targeted tubulin-polymerizing agents.

Abstract translation: 公开了用于治疗癌症的2'，5'-二甲氧基查耳酮衍生物，其中2,5-二甲氧基苯乙酮和4-甲酰基苯甲酸甲酯缩合形成4-羧基-2'，5'-二甲氧基查耳酮（化合物1），其为 进一步与烷基卤化物或胺反应以合成化合物2-17的查耳酮衍生物。 此外，将2,5-二甲氧基苯乙酮与5-甲酰基-2-噻吩羧酸反应，形成化合物18（3-（3-噻吩）羧基-1-（2,5-二甲氧基苯基）丙-2-烯-1-酮 一）。 合成的2'，5'-二甲氧基查耳酮衍生物可以作为微管靶向微管蛋白聚合剂。

公开(公告)号：US08062917B2

公开(公告)日：2011-11-22

申请号：US12855837

申请日：2010-08-13

Applicant: Chun-Nan Lin ,  Kuo-Yuan Tu ,  Shu-Feng Wu ,  Wen-Ching Tsai

Inventor： Chun-Nan Lin ,  Kuo-Yuan Tu ,  Shu-Feng Wu ,  Wen-Ching Tsai

IPC: H01L21/00

CPC classification number: H01L29/4908 ,  H01L29/458 ,  H01L29/66757 ,  H01L29/66765

Abstract: A display panel structure having a circuit element disposed thereon and method of manufacture are provided. The display panel includes a substrate and the circuit element disposed on the substrate. The circuit element has a first interface layer and a first conductive layer. Both the first interface layer and the first conductive layer have cooper materials. The material which makes the first interface layer includes a reactant or a compound of the material which makes the first conductive layer. The method for manufacturing includes the following steps: forming a first interface layer on the substrate; forming a first conductive layer on the first interface layer; and etching the first conductive and interface layers to form a pattern. The existence of the first interface reduces the penetration of the first conductive layer on the substrate and improves the adhesive force between the first conductive layer and the substrate.

Abstract translation: 提供一种其上设置有电路元件的显示面板结构及其制造方法。 显示面板包括基板和设置在基板上的电路元件。 电路元件具有第一界面层和第一导电层。 第一界面层和第一导电层都具有铜材料。 制造第一界面层的材料包括制成第一导电层的反应物或材料的化合物。 制造方法包括以下步骤：在基板上形成第一界面层; 在所述第一界面层上形成第一导电层; 并蚀刻第一导电层和界面层以形成图案。 第一界面的存在减少了第一导电层在衬底上的穿透，并改善了第一导电层和衬底之间的粘合力。

公开(公告)号：US20110039922A1

公开(公告)日：2011-02-17

申请号：US12649437

申请日：2009-12-30

Applicant: Chun-Nan Lin ,  Dravidum Maitraie ,  Jih-Pyang Wang ,  Chi-Feng Hung ,  Huang-Yao Tu ,  Ya-Ting Liou ,  Bai-Luh Wei ,  Shyh-Chyun Yang

Inventor： Chun-Nan Lin ,  Dravidum Maitraie ,  Jih-Pyang Wang ,  Chi-Feng Hung ,  Huang-Yao Tu ,  Ya-Ting Liou ,  Bai-Luh Wei ,  Shyh-Chyun Yang

IPC: A61K31/335 ,  C07D313/06 ,  C07C69/74 ,  C07C61/16 ,  A61K31/215 ,  A61K31/19 ,  A61P29/00

CPC classification number: C07D313/06 ,  A61K31/19 ,  A61K31/215 ,  A61K31/335 ,  C07C231/02 ,  C07C231/12 ,  C07D313/08 ,  C07J63/008 ,  C07J73/003

Abstract: The present invention provides a chemical compound having the structure being one selected from a group consisting of wherein R1 is one selected from a group consisting of COOCH3, COOCH2Ph, CONHCH(CH3)2 and CONHC6H5, R2 is one selected from a group consisting of H, CH3 and CH(CH3)2, R3 is one selected from a group consisting of H, CH3, CH(CH3)2 and CH2Ph, and R4 is one of CH(CH3)2 and C6H5.

Abstract translation: 本发明提供一种具有以下结构的化合物：其中R 1为选自COOCH 3，COOCH 2 Ph，CONHCH（CH 3）2和CONHC 6 H 5中的一个，R 2为选自H ，CH 3和CH（CH 3）2，R 3是选自H，CH 3，CH（CH 3）2和CH 2 Ph的一个，R 4是CH（CH 3）2和C 6 H 5之一。

公开(公告)号：US07625788B2

公开(公告)日：2009-12-01

申请号：US12115855

申请日：2008-05-06

Applicant: Po-Lin Chen ,  Wen-Ching Tsai ,  Chun-Nan Lin ,  Kuo-Yuan Tu

Inventor： Po-Lin Chen ,  Wen-Ching Tsai ,  Chun-Nan Lin ,  Kuo-Yuan Tu

IPC: H01L21/00 ,  H01L21/44

CPC classification number: H01L29/458 ,  H01L27/124 ,  H01L29/41733

Abstract: A display element and a method of manufacturing the same are provided. The method comprises the following steps: forming a first patterned conducting layer with a gate on a substrate and a dielectric layer thereon; forming a patterned semiconductor layer on the dielectric layer, wherein the patterned semiconductor layer has a channel region, a source and a drain, and wherein the source and the drain lie on the opposite sides of the channel region; selectively depositing a barrier layer, which only wraps the patterned semiconductor layer; forming a second patterned conducting layer on the barrier layer and above the source and the drain. In the display element manufactured by the method, the barrier layer only wraps the patterned semiconductor layer.

Abstract translation: 提供了一种显示元件及其制造方法。 该方法包括以下步骤：在衬底上形成具有栅极的第一图案化导电层和其上的电介质层; 在所述电介质层上形成图案化的半导体层，其中所述图案化半导体层具有沟道区，源极和漏极，并且其中所述源极和漏极位于所述沟道区的相对侧上; 选择性地沉积仅包裹图案化半导体层的阻挡层; 在阻挡层上和源极和漏极之上形成第二图案化导电层。 在通过该方法制造的显示元件中，阻挡层仅包裹图案化的半导体层。

公开(公告)号：US20090173944A1

公开(公告)日：2009-07-09

申请号：US12049362

申请日：2008-03-16

Applicant: Po-Lin Chen ,  Ting Hsieh ,  Chun-Nan Lin ,  Wen-Ching Tsai

Inventor： Po-Lin Chen ,  Ting Hsieh ,  Chun-Nan Lin ,  Wen-Ching Tsai

IPC: H01L33/00 ,  H01L29/786

CPC classification number: H01L29/4908 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/458 ,  H01L29/78669

Abstract: A thin film transistor (TFT) includes a substrate, a gate, a gate dielectric layer, a channel layer, a source and a drain. The gate and the gate dielectric layer are disposed on the substrate and the gate dielectric layer covers the gate. The channel layer is disposed on the gate dielectric layer over the gate, and the source and the drain are respectively disposed on a portion of the channel layer at both sides of the gate. At least one of the gate, the source and the drain has a lower conductive layer, an upper conductive layer and an intermediate conductive layer located between the lower conductive layer and the upper conductive layer. The material of the lower conductive layer is different from the material of the intermediate conductive layer, and the thickness of the lower conductive layer is less than or equal to about 150 Å.

Abstract translation: 薄膜晶体管（TFT）包括衬底，栅极，栅极电介质层，沟道层，源极和漏极。 栅极和栅极介电层设置在基板上，栅极电介质层覆盖栅极。 沟道层设置在栅极上的栅极介电层上，源极和漏极分别设置在栅极两侧的沟道层的一部分上。 栅极，源极和漏极中的至少一个具有位于下导电层和上导电层之间的下导电层，上导电层和中间导电层。 下导电层的材料与中间导电层的材料不同，下导电层的厚度小于或等于约150。

公开(公告)号：US20090153056A1

公开(公告)日：2009-06-18

申请号：US12060873

申请日：2008-04-02

Applicant: Po-Lin Chen ,  Chun-Nan Lin ,  Shu-Feng Wu ,  Wen-Ching Tsai

Inventor： Po-Lin Chen ,  Chun-Nan Lin ,  Shu-Feng Wu ,  Wen-Ching Tsai

IPC: H01J7/44 ,  H01L21/04 ,  H01J9/00

CPC classification number: H01L29/458 ,  H01L27/124 ,  H01L27/1255

Abstract: A pixel structure disposed on a substrate including a thin film transistor (TFT), a bottom capacitor electrode, a dielectric layer, an upper capacitor electrode, a passivation layer, and a pixel electrode is provided. The TFT having a source/drain and the bottom capacitor electrode are disposed on the substrate. The dielectric layer is disposed on the bottom capacitor electrode. The upper capacitor electrode has a semiconductor layer, a barrier layer, and a metal layer. The semiconductor layer is disposed on the dielectric layer above the bottom capacitor electrode. The barrier layer is disposed on the semiconductor layer. The metal layer whose material includes copper, a copper alloy, or a combination thereof is disposed on the barrier layer. The passivation layer covers the TFT and the upper capacitor electrode and has a first opening exposing the source/drain. The pixel electrode is electrically connected to the TFT through the first opening.

Abstract translation: 提供了一种设置在包括薄膜晶体管（TFT），底部电容器电极，电介质层，上部电容器电极，钝化层和像素电极的基板上的像素结构。 具有源极/漏极和底部电容器电极的TFT设置在衬底上。 电介质层设置在底部电容器电极上。 上部电容器电极具有半导体层，阻挡层和金属层。 半导体层设置在底部电容器电极上方的电介质层上。 阻挡层设置在半导体层上。 其材料包括铜，铜合金或其组合的金属层设置在阻挡层上。 钝化层覆盖TFT和上电容器电极，并且具有暴露源极/漏极的第一开口。 像素电极通过第一开口与TFT电连接。