公开(公告)号：US06743641B2

公开(公告)日：2004-06-01

申请号：US10022721

申请日：2001-12-20

Applicant: Donald L. Yates ,  Joel A. Drewes

Inventor： Donald L. Yates ,  Joel A. Drewes

IPC: H01L2100

CPC classification number: H01L27/222 ,  G11C11/15 ,  H01L21/7684

Abstract: The present invention provides a method of fabricating a portion of a memory cell, the method comprising providing a first conductor in a trench which is provided in an insulating layer and flattening an upper surface of the insulating layer and the first conductor, forming a material layer over the flattened upper surface of the insulating layer and the first conductor and flattening an upper portion of the material layer while leaving intact a lower portion of the material layer over the insulating layer and the first conductor.

Abstract translation: 本发明提供了一种制造存储单元的一部分的方法，该方法包括提供一沟槽中的第一导体，其设置在绝缘层中并使绝缘层和第一导体的上表面平坦化，形成材料层 在绝缘层和第一导体的平坦的上表面上方，并且使材料层的上部平坦化，同时在绝缘层和第一导体上完整地保留材料层的下部。

公开(公告)号：US06703319B1

公开(公告)日：2004-03-09

申请号：US09595714

申请日：2000-06-16

Applicant: Donald L. Yates ,  Donald L. Westmoreland

Inventor： Donald L. Yates ,  Donald L. Westmoreland

IPC: H01L21302

CPC classification number: C09K13/08 ,  H01L21/02063

Abstract: A composition suitable for cleaning and methods of cleaning etch residue are provided. The composition includes at least one source of a fluoride ion and at least one organic solvent.

公开(公告)号：US06656372B2

公开(公告)日：2003-12-02

申请号：US09971758

申请日：2001-10-04

Applicant: Donald L. Yates

Inventor： Donald L. Yates

IPC: G11B5127

CPC classification number: H01L43/12 ,  H01L27/222

Abstract: The invention includes methods of forming magnetoresistive devices. In one method, a construction is formed which includes a first magnetic layer, a non-magnetic layer over the first magnetic layer, and a second magnetic layer over the non-magnetic layer. A first pattern is extended through the second magnetic layer and to the non-magnetic layer with an etch selective for the material of the second magnetic layer relative to the material of the non-magnetic layer. A dielectric material is formed over the patterned second magnetic layer, and subsequently a second etch is utilized to extend a second pattern through the non-magnetic layer and at least partway into the first magnetic layer.

Abstract translation: 本发明包括形成磁阻器件的方法。 在一种方法中，形成包括第一磁性层，第一磁性层上的非磁性层和非磁性层上的第二磁性层的结构。 相对于非磁性层的材料，第一图案通过第二磁性层和与非磁性层相对于第二磁性层的材料的选择性蚀刻而延伸。 介电材料形成在图案化的第二磁性层之上，随后利用第二蚀刻来延伸通过非磁性层的第二图案，并且至少部分地进入第一磁性层。

公开(公告)号：US06486108B1

公开(公告)日：2002-11-26

申请号：US09584552

申请日：2000-05-31

Applicant: Donald L. Yates ,  Max F. Hineman

Inventor： Donald L. Yates ,  Max F. Hineman

IPC: C11D708

CPC classification number: C11D7/08 ,  C11D7/265 ,  C11D11/0047

Abstract: A composition for use in semiconductor processing wherein the composition comprises water, phosphoric acid, and an organic acid; wherein the organic acid is ascorbic acid or is an organic acid having two or more carboxylic acid groups (e.g., citric acid). The water can be present in about 40 wt. % to about 85 wt. % of the composition, the phosphoric acid can be present in about 0.01 wt. % to about 10 wt. % of the composition, and the organic acid can be present in about 10 wt. % to about 60 wt. % of the composition. The composition can be used for cleaning various surfaces, such as, for example, patterned metal layers and vias by exposing the surfaces to the composition.

Abstract translation: 一种用于半导体加工的组合物，其中组合物包含水，磷酸和有机酸; 其中有机酸是抗坏血酸，或者是具有两个以上羧酸基团的有机酸（例如柠檬酸）。 水可以约40wt。 ％至约85重量％ 组合物的％，磷酸可以以约0.01重量％存在。 ％至约10wt。 ％的组成，并且有机酸可以以约10重量％ ％至约60wt。 ％的组成。 组合物可以用于通过将表面暴露于组合物来清洁各种表面，例如图案化的金属层和通孔。

公开(公告)号：US06358793B1

公开(公告)日：2002-03-19

申请号：US09258471

申请日：1999-02-26

Applicant: Donald L. Yates ,  Garry A. Mercaldi

Inventor： Donald L. Yates ,  Garry A. Mercaldi

IPC: H01L218242

CPC classification number: H01L28/92 ,  G03F7/0035 ,  G03F7/201 ,  H01L21/0273 ,  H01L21/0274 ,  H01L21/0275 ,  H01L21/32139 ,  H01L27/10852 ,  H01L28/84 ,  H01L28/91

Abstract: Container structures for use in integrated circuits and methods of their manufacture without the use of mechanical planarization such as chemical-mechanical planarization (CMP), thus eliminating CMP-induced defects and variations. The methods utilize localized masking of holes for protection of the inside of the holes during non-mechanical removal of exposed surface layers. The localized masking is accomplished through differential exposure of a resist layer to electromagnetic or thermal energy. The container structures are adapted for use in memory cells and apparatus incorporating such memory cells, as well as other integrated circuits.

Abstract translation: 用于集成电路的容器结构及其制造方法，而不使用机械平面化（例如化学机械平面化（CMP）），从而消除了CMP引起的缺陷和变化。 该方法利用在非机械去除暴露的表面层期间的孔的局部掩蔽来保护孔的内部。 通过将抗蚀剂层与电磁或热能的差分曝光来实现局部掩蔽。 容器结构适用于并入这种存储单元的存储器单元和装置以及其它集成电路。

公开(公告)号：US06350322B1

公开(公告)日：2002-02-26

申请号：US08814900

申请日：1997-03-21

Applicant: Donald L. Yates

Inventor： Donald L. Yates

IPC: B08B700

CPC classification number: H01L21/67034 ,  H01L21/02052 ,  H01L21/02057 ,  H01L21/67028 ,  H01L21/67057 ,  Y10S134/902

Abstract: The present invention relates to a method of cleaning and drying a semiconductor structure in a modified conventional gas etch/rinse or dryer vessel. In a first embodiment of the present invention, a semiconductor structure is placed into a first treatment vessel and chemically treated. Following the chemical treatment, the semiconductor structure is transferred directly to a second treatment vessel where it is rinsed with DI water and then dried. The second treatment vessel is flooded with both DI water and a gas that is inert to the ambient, such as nitrogen, to form a DI water bath upon which an inert atmosphere is maintained during rinsing. Next, an inert gas carrier laden with IPA vapor is fed into the second treatment vessel. After sufficient time, a layer of IPA has formed upon the surface of the DI water bath to form an IPA-DI water interface. The semiconductor structure is drawn out of the DI water bath at a rate that allows substantially all DI water, and contaminants therein, to be entrained beneath the IPA-DI water interface. In a second embodiment of the present invention, chemical treatment, rinsing, and drying are carried out in a single vessel. In a third embodiment of the present invention, a retrofit spray/dump rinser with a lid is used for rinsing and drying according to the method of the present invention.

Abstract translation: 本发明涉及一种在改进的常规气体蚀刻/漂洗或干燥容器中清洗和干燥半导体结构的方法。 在本发明的第一实施例中，将半导体结构放置在第一处理容器中并进行化学处理。 化学处理后，将半导体结构直接转移到第二处理容器，在其中用DI水冲洗然后干燥。 第二处理容器充满了DI水和对环境如氮气是惰性的气体，以形成在洗涤期间保持惰性气氛的去离子水浴。 接下来，将载有IPA蒸气的惰性气体载体进料到第二处理容器中。 在足够的时间之后，在去离子水浴表面上形成一层IPA以形成IPA-DI水界面。 将半导体结构从DI水浴中抽出，其速率允许基本上所有的去离子水和其中的污染物被夹带在IPA-DI水界面下面。 在本发明的第二个实施方案中，化学处理，漂洗和干燥在单个容器中进行。 在本发明的第三实施例中，根据本发明的方法，使用具有盖的改型喷雾/倾倒式冲洗机进行漂洗和干燥。

公开(公告)号：US5939336A

公开(公告)日：1999-08-17

申请号：US138045

申请日：1998-08-21

Applicant: Donald L. Yates

Inventor： Donald L. Yates

IPC: C09K13/00 ,  H01L21/306

CPC classification number: H01L21/02052 ,  C09K13/00

Abstract: Compositions of ammonium fluoride, propylene glycol, and water and methods of using these compositions to remove etch residues from silicon substrates which result from plasma or reactive ion etching of silicon substrate are provided. Not only do the compositions of the present invention overcome the environmental concerns associated with the use of ethylene glycol, but unlike previous compositions of ammonium fluoride in propylene glycol which are acidic, the compositions of the present invention are neutral to slightly basic (i.e., pH 7 to about pH 8). Hence, they remove etch residues from silicon substrates with minimal attack on other features on the silicon substrates.

公开(公告)号：US08454760B2

公开(公告)日：2013-06-04

申请号：US12476139

申请日：2009-06-01

Applicant: Donald L. Yates

Inventor： Donald L. Yates

IPC: B08B3/02

CPC classification number: H01L21/02057 ,  H01L21/67051 ,  H01L21/67057

Abstract: Several methods of removing contaminant particles from a surface of a substrate are disclosed herein. In one embodiment, the method includes directing an incompressible fluid spray onto a surface of a substrate to remove contaminant particles from the surface. In an embodiment, the surface of the substrate and the nozzle are both immersed in an incompressible fluid. The fluid can flow across the surface of the substrate to remove the contaminant particles from the area. The fluid spray can be positioned normal to the substrate surface, or can be positioned at an angle relative to the substrate surface.

Abstract translation: 本文公开了从衬底的表面去除污染物颗粒的几种方法。 在一个实施例中，该方法包括将不可压缩的流体喷雾引导到基底的表面上以从表面去除污染物颗粒。 在一个实施例中，基板和喷嘴的表面都浸没在不可压缩流体中。 流体可以流过基板的表面以从该区域去除污染物颗粒。 流体喷雾可以垂直于基底表面定位，或者可以相对于基底表面成一定角度定位。

公开(公告)号：US07468534B2

公开(公告)日：2008-12-23

申请号：US11216417

申请日：2005-08-30

Applicant: Donald L. Yates ,  Garry A. Mercaldi

Inventor： Donald L. Yates ,  Garry A. Mercaldi

IPC: H01L27/108

CPC classification number: H01L28/92 ,  G03F7/0035 ,  G03F7/201 ,  H01L21/0273 ,  H01L21/0274 ,  H01L21/0275 ,  H01L21/32139 ,  H01L27/10852 ,  H01L28/84 ,  H01L28/91

Abstract: Container structures for use in integrated circuits and methods of their manufacture without the use of mechanical planarization such as chemical-mechanical planarization (CMP), thus eliminating CMP-induced defects and variations. The methods utilize localized masking of holes for protection of the inside of the holes during non-mechanical removal of exposed surface layers. The localized masking is accomplished through differential exposure of a resist layer to electromagnetic or thermal energy. The container structures are adapted for use in memory cells and apparatus incorporating such memory cells, as well as other integrated circuits.

Abstract translation: 用于集成电路的容器结构及其制造方法，而不使用机械平面化（例如化学机械平面化（CMP）），从而消除了CMP引起的缺陷和变化。 该方法利用在非机械去除暴露的表面层期间的孔的局部掩蔽来保护孔的内部。 通过将抗蚀剂层与电磁或热能的差分曝光来实现局部掩蔽。 容器结构适用于并入这种存储单元的存储器单元和装置以及其它集成电路。

公开(公告)号：US20080290432A1

公开(公告)日：2008-11-27

申请号：US12153073

申请日：2008-05-13

Applicant: Donald L. Yates ,  Joel A. Drewes

Inventor： Donald L. Yates ,  Joel A. Drewes

IPC: H01L29/82

CPC classification number: H01L27/222 ,  G11C11/15 ,  H01L21/7684

Abstract: The present invention provides a method of fabricating a portion of a memory cell, the method comprising providing a first conductor in a trench which is provided in an insulating layer and flattening an upper surface of the insulating layer and the first conductor, forming a material layer over the flattened upper surface of the insulating layer and the first conductor and flattening an upper portion of the material layer while leaving intact a lower portion of the material layer over the insulating layer and the first conductor.

Abstract translation: 本发明提供了一种制造存储单元的一部分的方法，该方法包括提供一沟槽中的第一导体，其设置在绝缘层中并使绝缘层和第一导体的上表面平坦化，形成材料层 在绝缘层和第一导体的平坦的上表面上方，并且使材料层的上部平坦化，同时在绝缘层和第一导体上完整地保留材料层的下部。