公开(公告)号：US08632692B2

公开(公告)日：2014-01-21

申请号：US12146113

申请日：2008-06-25

Applicant: Donald L. Yates

Inventor： Donald L. Yates

IPC: C09K13/00

CPC classification number: C09K13/08 ,  B08B3/08 ,  C09K13/00 ,  C09K13/04 ,  C09K13/06 ,  C11D7/08 ,  C11D7/10 ,  C11D7/50 ,  C11D11/0047 ,  C23G1/02 ,  G03F7/423 ,  H01L21/31111 ,  H01L21/31133 ,  Y10S438/948

Abstract: An improved composition and method for cleaning a surface of a semiconductor wafer are provided. The composition can be used to selectively remove a low-k dielectric material such as silicon dioxide, a photoresist layer overlying a low-k dielectric layer, or both layers from the surface of the wafer. The composition is formulated according to the invention to provide a desired removal rate of the low-k dielectric and/or photoresist from the surface of the wafer. By varying a fluorine ion component, and the amounts of the fluorine ion component and an acid component, and controlling the pH, a composition can be formulated in order to achieve a desired low-k dielectric removal rate that ranges from slow and controlled at about 50 to about 1000 angstroms per minute, to a relatively rapid removal of low-k dielectric material at greater than about 1000 angstroms per minute. The composition can also be formulated to selectively remove the photoresist layer, leaving the underlying low-k dielectric layer essentially intact.

Abstract translation: 提供了用于清洁半导体晶片的表面的改进的组合物和方法。 该组合物可用于选择性地除去低k电介质材料，例如二氧化硅，覆盖低k电介质层的光致抗蚀剂层，或从晶片表面两层。 根据本发明配制组合物以从晶片的表面提供低k电介质和/或光致抗蚀剂的期望的去除速率。 通过改变氟离子成分以及氟离子成分和酸成分的量，并控制pH，可以配制组合物以实现期望的低k电介质去除速率，其范围从缓慢和受控于约 每分钟50至约1000埃，以每分钟大约1000埃的速度相对快速地除去低k电介质材料。 组合物也可以配制成选择性地除去光致抗蚀剂层，使底层的低k介电层基本上完整无缺。

公开(公告)号：US07759053B2

公开(公告)日：2010-07-20

申请号：US11497688

申请日：2006-07-31

Applicant: Donald L. Yates

Inventor： Donald L. Yates

IPC: G03F7/00 ,  G03F7/26 ,  G03F7/40

CPC classification number: H01L21/02071 ,  H01L21/31133 ,  H01L21/76802 ,  H01L21/76877

Abstract: The invention includes methods of fabricating integrated circuitry and semiconductor processing polymer residue removing solutions. In one implementation, a method of fabricating integrated circuitry includes forming a conductive metal line over a semiconductor substrate. The conductive line is exposed to a solution comprising an inorganic acid, hydrogen peroxide and a carboxylic acid buffering agent. In one implementation, a method of fabricating integrated circuitry includes forming an insulating layer over a semiconductor substrate. A contact opening is at least partially formed into the insulating layer. The contact opening is exposed to a solution comprising an inorganic acid, hydrogen peroxide and a carboxylic acid buffering agent. In one implementation, a semiconductor processing polymer residue removing solution comprises an inorganic acid, hydrogen peroxide and a carboxylic acid buffering agent. Other aspects and implementations are contemplated.

Abstract translation: 本发明包括制造集成电路和半导体处理聚合物残渣除去溶液的方法。 在一个实现中，制造集成电路的方法包括在半导体衬底上形成导电金属线。 导电线暴露于包含无机酸，过氧化氢和羧酸缓冲剂的溶液中。 在一个实施方案中，制造集成电路的方法包括在半导体衬底上形成绝缘层。 接触开口至少部分地形成在绝缘层中。 将接触开口暴露于包含无机酸，过氧化氢和羧酸缓冲剂的溶液中。 在一个实施方案中，半导体加工聚合物残渣除去溶液包含无机酸，过氧化氢和羧酸缓冲剂。 考虑了其他方面和实现。

公开(公告)号：US20090305511A1

公开(公告)日：2009-12-10

申请号：US12136661

申请日：2008-06-10

Applicant: Janos Fucsko ,  Niraj B. Rana ,  Sandra Tagg ,  Robert J. Hanson ,  Gundu M. Sabde ,  Donald L. Yates ,  Patrick M. Flynn ,  Prashani Raghu ,  Kyle Grant

Inventor： Janos Fucsko ,  Niraj B. Rana ,  Sandra Tagg ,  Robert J. Hanson ,  Gundu M. Sabde ,  Donald L. Yates ,  Patrick M. Flynn ,  Prashani Raghu ,  Kyle Grant

IPC: H01L21/306

CPC classification number: H01L21/30604 ,  H01L21/02052 ,  H01L21/31111

Abstract: Some embodiments include methods of treating semiconductor substrates. The substrates may be exposed to one or more conditions that vary continuously. The conditions may include temperature gradients, concentration gradients of one or more compositions that quench etchant, pH gradients to assist in removing particles, and/or concentration gradients of one or more compositions that assist in removing particles. The continuously varying conditions may be imparted by placing the semiconductor substrates in a bath of flowing rinsing solution, with the bath having at least two feed lines that provide the rinsing solution therein. One of the feed lines may be at a first condition, and the other may be at a second condition that is different from the first condition. The relative amount of rinsing solution provided to the bath by each feed line may be varied to continuously vary the condition within the bath.

Abstract translation: 一些实施方案包括处理半导体衬底的方法。 衬底可以暴露于连续变化的一个或多个条件。 条件可以包括温度梯度，一种或多种淬灭蚀刻剂的组合物的浓度梯度，有助于除去颗粒的pH梯度和/或一种或多种有助于除去颗粒的组合物的浓度梯度。 可以通过将半导体衬底放置在流动的冲洗溶液浴中来赋予连续变化的条件，浴中具有至少两条在其中提供漂洗溶液的进料管线。 供给管线中的一个可以处于第一状态，另一个可以处于与第一条件不同的第二条件。 可以改变通过每个进料管提供给浴的冲洗溶液的相对量，以连续地改变浴内的状态。

公开(公告)号：US07204889B2

公开(公告)日：2007-04-17

申请号：US10701383

申请日：2003-11-04

Applicant: Donald L. Yates

Inventor： Donald L. Yates

IPC: B08B7/04

CPC classification number: H01L21/67034 ,  H01L21/02052 ,  H01L21/02057 ,  H01L21/67028 ,  H01L21/67057 ,  Y10S134/902

Abstract: The present invention relates to a method of cleaning and drying a semiconductor structure in a modified conventional gas etch/rinse or dryer vessel.

Abstract translation: 本发明涉及一种在改进的常规气体蚀刻/漂洗或干燥容器中清洗和干燥半导体结构的方法。

公开(公告)号：US07135444B2

公开(公告)日：2006-11-14

申请号：US10186778

申请日：2002-07-01

Applicant: Donald L. Yates ,  Max F. Hineman

Inventor： Donald L. Yates ,  Max F. Hineman

IPC: C11D1/00

CPC classification number: C11D7/08 ,  C11D7/265 ,  C11D11/0047

Abstract: A composition for use in semiconductor processing wherein the composition comprises water, phosphoric acid, and an organic acid; wherein the organic acid is ascorbic acid or is an organic acid having two or more carboxylic acid groups (e.g., citric acid). The water can be present in about 40 wt. % to about 85 wt. % of the composition, the phosphoric acid can be present in about 0.01 wt. % to about 10 wt. % of the composition, and the organic acid can be present in about 10 wt. % to about 60 wt. % of the composition. The composition can be used for cleaning various surfaces, such as, for example, patterned metal layers and vias by exposing the surfaces to the composition.

公开(公告)号：US07119388B2

公开(公告)日：2006-10-10

申请号：US10721744

申请日：2003-11-26

Applicant: Donald L. Yates ,  Garry A. Mercaldi

Inventor： Donald L. Yates ,  Garry A. Mercaldi

IPC: H01L29/76 ,  H01L21/00

CPC classification number: H01L27/222 ,  H01L43/12

Abstract: The present invention provides a method of forming an MRAM cell which minimizes the occurrence of electrical shorts during fabrication. A first conductor is provided in a trench in an insulating layer and an upper surface of the insulating layer and the first conductor is planarized. Then, a first dielectric layer is deposited over the first conductor and insulating layer to a thickness at least greater than the thickness of a desired MRAM cell. The first dielectric layer is then patterned and etched to form an opening over the first conductor for the cell shapes. Then, the magnetic layers comprising the MRAM cell are consecutively formed within the cell shapes and the first dielectric layer.

Abstract translation: 本发明提供一种形成MRAM单元的方法，该方法在制造期间使电短路的发生最小化。 第一导体设置在绝缘层中的沟槽中，绝缘层的上表面和第一导体被平坦化。 然后，将第一介电层沉积在第一导体和绝缘层上方至少大于所需MRAM单元厚度的厚度。 然后对第一介电层进行图案化和蚀刻，以在单元形状的第一导体上形成开口。 然后，包含MRAM单元的磁性层在单元格形状和第一介电层内连续地形成。

公开(公告)号：US07067465B2

公开(公告)日：2006-06-27

申请号：US10186777

申请日：2002-07-01

Applicant: Donald L. Yates ,  Max F. Hineman

Inventor： Donald L. Yates ,  Max F. Hineman

IPC: H01L21/302 ,  H01L21/00 ,  C11D7/08 ,  C09K13/00

CPC classification number: C11D7/08 ,  C11D7/265 ,  C11D11/0047

Abstract: A composition for use in semiconductor processing wherein the composition comprises water, phosphoric acid, and an organic acid; wherein the organic acid is ascorbic acid or is an organic acid having two or more carboxylic acid groups (e.g., citric acid). The water can be present in about 40 wt. % to about 85 wt. % of the composition, the phosphoric acid can be present in about 0.01 wt. % to about 10 wt. % of the composition, and the organic acid can be present in about 10 wt. % to about 60 wt. % of the composition. The composition can be used for cleaning various surfaces, such as, for example, patterned metal layers and vias by exposing the surfaces to the composition.

公开(公告)号：US06831047B2

公开(公告)日：2004-12-14

申请号：US10186928

申请日：2002-07-01

Applicant: Donald L. Yates ,  Max F. Hineman

Inventor： Donald L. Yates ,  Max F. Hineman

IPC: G03C102

CPC classification number: C11D7/08 ,  C11D7/265 ,  C11D11/0047

Abstract: A composition for use in semiconductor processing wherein the composition comprises water, phosphoric acid, and an organic acid; wherein the organic acid is ascorbic acid or is an organic acid having two or more carboxylic acid groups (e.g., citric acid). The water can be present in about 40 wt. % to about 85 wt. % of the composition, the phosphoric acid can be present in about 0.01 wt. % to about 10 wt. % of the composition, and the organic acid can be present in about 10 wt. % to about 60 wt. % of the composition. The composition can be used for cleaning various surfaces, such as, for example, patterned metal layers and vias by exposing the surfaces to the composition.

Abstract translation: 一种用于半导体加工的组合物，其中组合物包含水，磷酸和有机酸; 其中有机酸是抗坏血酸，或者是具有两个以上羧酸基团的有机酸（例如柠檬酸）。 水可以约40wt。 ％至约85重量％ 组合物的％，磷酸可以以约0.01重量％存在。 ％至约10wt。 ％的组成，并且有机酸可以以约10重量％ ％至约60wt。 ％的组成。 组合物可以用于通过将表面暴露于组合物来清洁各种表面，例如图案化的金属层和通孔。

公开(公告)号：US06639266B1

公开(公告)日：2003-10-28

申请号：US09651470

申请日：2000-08-30

Applicant: Donald L. Yates ,  Garry A. Mercaldi

Inventor： Donald L. Yates ,  Garry A. Mercaldi

IPC: H01L27108

CPC classification number: H01L28/91 ,  H01L21/31056 ,  H01L27/10855 ,  H01L28/84

Abstract: Container structures for use in integrated circuits and methods of their manufacture without the use of mechanical planarization such as chemical-mechanical planarization (CMP), thus eliminating CMP-induced defects and variations. The methods utilize localized masking of holes for protection of the inside of the holes during non-mechanical removal of exposed surface layers. The localized masking is accomplished through differential exposure of a resist layer to electromagnetic or thermal energy. The methods further include modifying the removal selectivity of the surface material relative to material protected by the localized masking. Modification of the removal selectivity eases or quickens removal of the surface material. The container structures are adapted for use in memory cells and apparatus incorporating such memory cells, as well as other integrated circuits.

Abstract translation: 用于集成电路的容器结构及其制造方法，而不使用机械平面化（例如化学机械平面化（CMP）），从而消除了CMP引起的缺陷和变化。 该方法利用在非机械去除暴露的表面层期间的孔的局部掩蔽来保护孔的内部。 通过将抗蚀剂层与电磁或热能的差分曝光来实现局部掩蔽。 所述方法还包括改变表面材料相对于通过局部掩蔽保护的材料的去除选择性。 去除选择性的改性缓和或加快了表面材料的去除。 容器结构适用于并入这种存储单元的存储器单元和装置以及其它集成电路。

公开(公告)号：US06573554B2

公开(公告)日：2003-06-03

申请号：US09912151

申请日：2001-07-24

Applicant: Donald L. Yates ,  Garry A. Mercaldi

Inventor： Donald L. Yates ,  Garry A. Mercaldi

IPC: H01L2978

CPC classification number: H01L28/92 ,  G03F7/0035 ,  G03F7/201 ,  H01L21/0273 ,  H01L21/0274 ,  H01L21/0275 ,  H01L21/32139 ,  H01L27/10852 ,  H01L28/84 ,  H01L28/91

Abstract: Container structures for use in integrated circuits and methods of their manufacture without the use of mechanical planarization such as chemical-mechanical planarization (CMP), thus eliminating CMP-induced defects and variations. The methods utilize localized masking of holes for protection of the inside of the holes during non-mechanical removal of exposed surface layers. The localized masking is accomplished through differential exposure of a resist layer to electromagnetic or thermal energy. The container structures are adapted for use in memory cells and apparatus incorporating such memory cells, as well as other integrated circuits.