INJECTION MOLD
    41.
    发明申请
    INJECTION MOLD 有权
    注射模具

    公开(公告)号:US20120148699A1

    公开(公告)日:2012-06-14

    申请号:US13315008

    申请日:2011-12-08

    Abstract: An injection mold includes a first mold part provided with a first mold surface and a second mold part provided with a second mold surface to form a cavity together with the first mold surface. Cooling channels along which a cooling fluid flows are provided in at least one of the first mold part and the second mold part, and a heat generating layer which receives power and then generates heat is disposed on the inner surfaces of the cooling channels and serves as a heater.

    Abstract translation: 注射模具包括具有第一模具表面的第一模具部件和设置有与第一模具表面一起形成空腔的第二模具表面的第二模具部件。 冷却流体流过的冷却通道设置在第一模具部件和第二模具部件中的至少一个中,并且在冷却通道的内表面上设置接收动力然后产生热量的发热层,并且用作 一个加热器。

    Voltage generator for peripheral circuit
    42.
    发明授权
    Voltage generator for peripheral circuit 有权
    外围电路用电压发生器

    公开(公告)号:US08199600B2

    公开(公告)日:2012-06-12

    申请号:US11529421

    申请日:2006-09-27

    CPC classification number: G11C5/14

    Abstract: A voltage generator for a peripheral circuit, the voltage generator includes: a voltage supplier supplying a peripheral circuit voltage having a voltage level maintained at a reference voltage level, the peripheral circuit voltage outputted in response to a driving signal; and a voltage level compensator increasing the voltage level of the peripheral circuit voltage in response to a column path command.

    Abstract translation: 一种用于外围电路的电压发生器,所述电压发生器包括:提供具有保持在参考电压电平的电压电平的外围电路电压的电压供给器,响应于驱动信号输出的外围电路电压; 以及电压电平补偿器,其响应于列路径命令增加外围电路电压的电压电平。

    Semiconductor memory device capable of read out mode register information through DQ pads
    44.
    发明授权
    Semiconductor memory device capable of read out mode register information through DQ pads 有权
    半导体存储器能够通过DQ焊盘读出模式寄存器信息

    公开(公告)号:US08031534B2

    公开(公告)日:2011-10-04

    申请号:US12317214

    申请日:2008-12-18

    Applicant: Jong Won Lee

    Inventor: Jong Won Lee

    CPC classification number: G11C7/1045 G11C7/1039 G11C7/1051 G11C7/1063

    Abstract: A semiconductor memory device is provided that is capable of reading out mode register information stored in a register adapted for LPDDR2 (Low Power DDR2), through DQ pads. The semiconductor memory device includes a mode register control unit configured to receive address signals, a mode register write signal and a mode register read signal and generate a flag signal and at least one output information signal, and a global I/O line latch unit for transferring the output information signal to a global I/O line in response to the flag signal.

    Abstract translation: 提供半导体存储器件,其能够通过DQ焊盘读出存储在适合于LPDDR2(低功率DDR2)的寄存器中的模式寄存器信息。 半导体存储器件包括配置为接收地址信号的模式寄存器控制单元,模式寄存器写入信号和模式寄存器读取信号,并且生成标志信号和至少一个输出信息信号,以及全局I / O线锁存单元, 响应于标志信号将输出信息信号传送到全局I / O线。

    Reservoir capacitor array circuit
    45.
    发明授权
    Reservoir capacitor array circuit 有权
    蓄电池阵列电路

    公开(公告)号:US07956674B2

    公开(公告)日:2011-06-07

    申请号:US12459037

    申请日:2009-06-26

    Applicant: Jong Won Lee

    Inventor: Jong Won Lee

    Abstract: A reservoir capacitor array circuit capable of allowing an internal voltage to be maintained stably, comprises a plurality of reservoir capacitors, each of the reservoir capacitors including a switch element which is connected between a power source voltage and a prescribed node and switched in response to a test enable signal which is enabled depending on a test mode signal or whether the fuse is cut or not, and a capacitor connected between the node and a ground voltage.

    Abstract translation: 能够稳定地保持内部电压的储存器电容器阵列电路包括多个储存电容器,每个储存电容器包括开关元件,该开关元件连接在电源电压和规定的节点之间,并响应于 根据测试模式信号使能的测试使能信号或者熔丝是否被切断,以及连接在节点和接地电压之间的电容器。

    CATHODE ACTIVE MATERIAL, CATHODE INCLUDING THE SAME AND LITHIUM BATTERY INCLUDING CATHODE
    46.
    发明申请
    CATHODE ACTIVE MATERIAL, CATHODE INCLUDING THE SAME AND LITHIUM BATTERY INCLUDING CATHODE 有权
    阴极活性材料,包括它们的阴极和包括阴极的锂电池

    公开(公告)号:US20110049419A1

    公开(公告)日:2011-03-03

    申请号:US12720159

    申请日:2010-03-09

    Applicant: Jong-won LEE

    Inventor: Jong-won LEE

    Abstract: A cathode active material, a cathode including the cathode active material, and a lithium battery including the cathode. A lithium manganese phosphate cathode active material having an olivine structure represented by LixMn1−y−zM′yM″zPO4, where 0.6≦x≦1.0, 0

    Abstract translation: 阴极活性物质,包含正极活性物质的阴极和包含阴极的锂电池。 一种具有由LixMn1-y-zM'yM“zPO4表示的橄榄石结构的磷酸锰锂正极活性物质,其中0.6≦̸ x< 1.0; 1.0,0

    Method of fabricating semiconductor device
    47.
    发明授权
    Method of fabricating semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号:US07846801B2

    公开(公告)日:2010-12-07

    申请号:US11833050

    申请日:2007-08-02

    CPC classification number: H01L29/66795 H01L29/7851

    Abstract: Disclosed is a method of fabricating a semiconductor device including a multi-gate transistor. The method of fabricating a semiconductor device includes providing a semiconductor device having a number of active patterns which extend in a first direction, are separated by an isolation layer, and covered with a first insulating layer; forming a first groove by etching the isolation layer located between the active patterns adjacent to each other in the first direction; burying the first groove with a passivation layer; forming a second groove exposing at least a portion of both sides of the active patterns by etching the isolation layer located between the active patterns in a second direction intersecting the first direction; removing the passivation layer in the first groove; and forming a gate line filling at least a portion of the second groove and extending in the second direction.

    Abstract translation: 公开了一种制造包括多栅极晶体管的半导体器件的方法。 制造半导体器件的方法包括提供具有多个沿第一方向延伸的活性图案的半导体器件,被隔离层隔开并被第一绝缘层覆盖; 通过在第一方向上蚀刻位于彼此相邻的有源图案之间的隔离层来形成第一凹槽; 用钝化层掩埋第一槽; 通过在与所述第一方向相交的第二方向上蚀刻位于所述有源图案之间的所述隔离层来形成暴露所述有源图案的两侧的至少一部分的第二凹槽; 去除第一凹槽中的钝化层; 以及形成填充所述第二凹槽的至少一部分并沿所述第二方向延伸的栅极线。

    Source control circuit and semiconductor memory device using the same
    48.
    发明申请
    Source control circuit and semiconductor memory device using the same 有权
    源极控制电路和使用其的半导体存储器件

    公开(公告)号:US20100142305A1

    公开(公告)日:2010-06-10

    申请号:US12455784

    申请日:2009-06-04

    Applicant: Jong Won Lee

    Inventor: Jong Won Lee

    Abstract: A source control circuit comprises a control signal generating unit for generating a standby signal which is enabled in a standby condition, and a switching unit connected between a power line for supplying power to an internal circuit and an external power and controlling the supply of the external power in response to the standby signal.

    Abstract translation: 源极控制电路包括用于产生待机状态下使能的待机信号的控制信号产生单元和连接在用于向内部电路供电的电力线和外部电力之间的开关单元,并且控制外部电源的供给 电源响应待机信号。

    METHODS OF FORMING A THIN FERROELECTRIC LAYER AND METHODS OF MANUFACTURING A SEMICONDUCTOR DEVICE INCLUDING THE SAME
    49.
    发明申请
    METHODS OF FORMING A THIN FERROELECTRIC LAYER AND METHODS OF MANUFACTURING A SEMICONDUCTOR DEVICE INCLUDING THE SAME 失效
    形成薄膜层的方法和制造包括其的半导体器件的方法

    公开(公告)号:US20100015729A1

    公开(公告)日:2010-01-21

    申请号:US12503440

    申请日:2009-07-15

    CPC classification number: H01L27/11507 H01L21/3105 H01L21/31053 H01L28/55

    Abstract: In methods of forming a thin ferroelectric layer and methods of manufacturing a semiconductor device, a preliminary ferroelectric layer is formed on a substrate by depositing a metal oxide including lead, zirconium and titanium. The surface of the preliminary ferroelectric layer is polished using a slurry composition including an acrylic acid polymer, abrasive particles, and water to form a thin ferroelectric layer on the substrate. The slurry composition may reduce a polishing rate of the preliminary ferroelectric layer such that removal of a bulk portion of the preliminary ferroelectric layer may be suppressed and the surface roughness of the preliminary ferroelectric layer may be improved.

    Abstract translation: 在形成薄铁电体层的方法和制造半导体器件的方法中,通过沉积包括铅,锆和钛的金属氧化物,在衬底上形成初步铁电层。 使用包括丙烯酸聚合物,磨料颗粒和水的浆料组合物对预制铁电层的表面进行抛光,以在基材上形成薄铁电层。 浆料组合物可以降低预备铁电体层的抛光速率,从而可以抑制初级铁电层的体积部分的去除,并且可以提高预铁电层的表面粗糙度。

    VARIABLE VALVE ACTUATOR
    50.
    发明申请
    VARIABLE VALVE ACTUATOR 有权
    可变阀门执行器

    公开(公告)号:US20090241874A1

    公开(公告)日:2009-10-01

    申请号:US12208926

    申请日:2008-09-11

    Applicant: Jong Won Lee

    Inventor: Jong Won Lee

    CPC classification number: F01L13/0021 F01L1/267

    Abstract: A variable valve actuator presses rocker arms using force transmitted from a drive cam to open/close valves of an engine, and includes a swing arm, which is pivotably coupled to the engine on a first side thereof, and at least two pressing means, which come into contact with the rocker arms on first sides thereof, are pivotably coupled to a second side of a swing arm on second sides thereof, and press the rocker arms when pressed by the drive cam. Thereby, the variable valve actuator can adjust a lift time and a lift distance of each valve without changing positions of the drive cams and the camshaft, and more easily adjust the lift time of each valve, and have very excellent applicability to the engine due to simple internal configuration.

    Abstract translation: 可变气门执行器使用从驱动凸轮传递的力来打开/关闭发动机的阀来按压摇臂,并且包括在其第一侧上可枢转地联接到发动机的摇臂和至少两个按压装置, 在其第一侧与摇臂接触,在其第二侧上枢转地联接到摆臂的第二侧,并且当由驱动凸轮按压时按压摇臂。 因此,可变阀致动器可以在不改变驱动凸轮和凸轮轴的位置的情况下调节每个阀的升程时间和升程距离,并且更容易地调节每个阀的升程时间,并且由于 简单的内部配置。

Patent Agency Ranking