公开(公告)号：US20080149910A1

公开(公告)日：2008-06-26

申请号：US11941173

申请日：2007-11-16

Applicant: Hyeong-geun AN ,  Hideki HORII ,  Jong-chan SHIN ,  Dong-ho AHN ,  Jun-soo BAE

Inventor： Hyeong-geun AN ,  Hideki HORII ,  Jong-chan SHIN ,  Dong-ho AHN ,  Jun-soo BAE

IPC: H01L47/00

CPC classification number: H01L45/144 ,  G11C11/5678 ,  G11C13/0004 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/2472 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1675

Abstract: Provided is a phase-change memory device including a phase-change material pattern of which strips are shared by neighboring cells. The phase-change memory device includes a plurality of bottom electrodes arranged in a matrix array. The phase-change material pattern is formed on the bottom electrodes, and the strips of the phase-change material pattern are electrically connected to the bottom electrodes. Each strip of the phase-change material pattern is connected to at least two diagonally neighboring bottom electrodes of the bottom electrodes.

Abstract translation: 提供了一种相变存储器件，其包括相邻单元共享条带的相变材料图案。 相变存储器件包括以矩阵阵列排列的多个底部电极。 相变材料图案形成在底部电极上，相变材料图案的条带电连接到底部电极。 相变材料图案的每个条带连接到底部电极的至少两个对角相邻的底部电极。

公开(公告)号：US07378698B2

公开(公告)日：2008-05-27

申请号：US10851387

申请日：2004-05-24

Applicant: Young-Ki Ha ,  Jang-Eun Lee ,  Hyun-Jo Kim ,  Jun-Soo Bae ,  In-Gyu Baek ,  Se-Chung Oh

Inventor： Young-Ki Ha ,  Jang-Eun Lee ,  Hyun-Jo Kim ,  Jun-Soo Bae ,  In-Gyu Baek ,  Se-Chung Oh

IPC: H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC classification number: B82Y25/00 ,  G11C11/15 ,  H01F10/3204 ,  H01F10/3254 ,  H01F10/3272 ,  H01F10/3295 ,  H01L43/08

Abstract: A magnetic tunnel junction device includes a magnetically programmable free magnetic layer. The free magnetic layer includes a lamination of at least two ferromagnetic layers and at least one intermediate layer interposed between the at least two ferromagnetic layers.

Abstract translation: 磁性隧道结装置包括可磁性可编程的自由磁性层。 自由磁性层包括至少两个铁磁层和至少一个介于至少两个铁磁层之间的中间层的叠层。

公开(公告)号：US07351594B2

公开(公告)日：2008-04-01

申请号：US11673612

申请日：2007-02-12

Applicant: Jun-Soo Bae ,  Jang-Eun Lee ,  Hyun-Jo Kim ,  In-Gyu Baek ,  Young-Ki Ha

Inventor： Jun-Soo Bae ,  Jang-Eun Lee ,  Hyun-Jo Kim ,  In-Gyu Baek ,  Young-Ki Ha

IPC: H01L21/00

CPC classification number: B82Y25/00 ,  B82Y10/00 ,  G11B5/3909 ,  G11C11/16 ,  H01F10/3254 ,  H01F41/302 ,  H01L43/08 ,  H01L43/12

Abstract: Magnetic Random Access Memory (MRAM) devices include a lower electrode and a magnetic tunnel junction on the lower electrode. The magnetic tunnel junction includes a seed layer and a tunneling barrier that is oriented in a same direction as the most closely packed plane direction of the seed layer. An oxide layer may be provided between the lower electrode and the magnetic tunnel junction. The lower electrode may be a titanium-rich TiN layer having more than 50 atomic percent titanium content. Analogous fabrication methods are also described.

Abstract translation: 磁性随机存取存储器（MRAM）器件包括下电极和下电极上的磁隧道结。 磁性隧道结包括种子层和隧道势垒，其定向在与种子层的最紧密堆积的平面方向相同的方向上。 可以在下电极和磁隧道结之间提供氧化物层。 下电极可以是具有超过50原子％钛含量的富钛TiN层。 还描述了类似的制造方法。

公开(公告)号：US20070215853A1

公开(公告)日：2007-09-20

申请号：US11627775

申请日：2007-01-26

Applicant: Jeong-Hee Park ,  Ju-Chul Park ,  Jun-Soo Bae ,  Bong-Jin Kuh ,  Yong-Ho Ha

Inventor： Jeong-Hee Park ,  Ju-Chul Park ,  Jun-Soo Bae ,  Bong-Jin Kuh ,  Yong-Ho Ha

IPC: H01L47/00 ,  H01L21/44

CPC classification number: H01L45/06 ,  G11C13/0004 ,  G11C2213/79 ,  H01L45/1233 ,  H01L45/143 ,  H01L45/144 ,  H01L45/1625 ,  H01L45/1675

Abstract: A phase-changeable memory device includes a phase-changeable material pattern and first and second electrodes electrically connected to the phase-changeable material pattern. The first and second electrodes are configured to provide an electrical signal to the phase-changeable material pattern. The phase-changeable material pattern includes a first phase-changeable material layer and a second phase-changeable material layer. The first and second phase-changeable material patterns have different chemical, physical, and/or electrical characteristics. For example, the second phase-changeable material layer may have a greater resistivity than the first phase-changeable material layer. For instance, the first phase-changeable material layer may include nitrogen at a first concentration, and the second phase-changeable material layer may include nitrogen at a second concentration that is greater than the first concentration. Related devices and fabrication methods are also discussed.

Abstract translation: 可变相存储器件包括相变材料图案，以及电连接到相变材料图案的第一和第二电极。 第一和第二电极被配置为向相变材料图案提供电信号。 相变材料图案包括第一相变材料层和第二相变材料层。 第一和第二可相变材料图案具有不同的化学，物理和/或电特性。 例如，第二相变材料层可以具有比第一相变材料层更大的电阻率。 例如，第一相变材料层可以包括第一浓度的氮，第二相变材料层可以包括大于第一浓度的第二浓度的氮。 还讨论了相关设备和制造方法。

公开(公告)号：US20070166870A1

公开(公告)日：2007-07-19

申请号：US11623890

申请日：2007-01-17

Applicant: Young-Soo LIM ,  Jae-Seung HWANG ,  Hyun-Chul KIM ,  Jun-Soo BAE

Inventor： Young-Soo LIM ,  Jae-Seung HWANG ,  Hyun-Chul KIM ,  Jun-Soo BAE

IPC: H01L21/00

CPC classification number: H01L45/1233 ,  H01L45/06 ,  H01L45/144 ,  H01L45/1675

Abstract: In one embodiment, a phase-changeable structure can be formed by forming a phase-changeable layer on the lower electrode, forming a conductive layer on the phase-changeable layer, etching the conductive layer using a first etching material to form an upper electrode and etching the phase-changeable layer using a second etching material to form a phase-changeable pattern. The first etching material can include a first component containing fluorine. The second etching material does not contain chlorine.

Abstract translation: 在一个实施例中，可以通过在下电极上形成相变层，在相变层上形成导电层，使用第一蚀刻材料蚀刻导电层以形成上电极和 使用第二蚀刻材料蚀刻相变层以形成相变图案。 第一蚀刻材料可以包括含氟的第一成分。 第二蚀刻材料不含氯。

公开(公告)号：US20070148789A1

公开(公告)日：2007-06-28

申请号：US11673612

申请日：2007-02-12

Applicant: Jun-Soo Bae ,  Jang-Eun Lee ,  Hyun-Jo Kim ,  In-Gyu Baek ,  Young-Ki Ha

Inventor： Jun-Soo Bae ,  Jang-Eun Lee ,  Hyun-Jo Kim ,  In-Gyu Baek ,  Young-Ki Ha

IPC: H01L21/00 ,  H01L21/8244

CPC classification number: B82Y25/00 ,  B82Y10/00 ,  G11B5/3909 ,  G11C11/16 ,  H01F10/3254 ,  H01F41/302 ,  H01L43/08 ,  H01L43/12

Abstract: Magnetic Random Access Memory (MRAM) devices include a lower electrode and a magnetic tunnel junction on the lower electrode. The magnetic tunnel junction includes a seed layer and a tunneling barrier that is oriented in a same direction as the most closely packed plane direction of the seed layer. An oxide layer may be provided between the lower electrode and the magnetic tunnel junction. The lower electrode may be a titanium-rich TiN layer having more than 50 atomic percent titanium content. Analogous fabrication methods are also described.

Abstract translation: 磁性随机存取存储器（MRAM）器件包括下电极和下电极上的磁隧道结。 磁性隧道结包括种子层和隧道势垒，其定向在与种子层的最紧密堆积的平面方向相同的方向上。 可以在下电极和磁隧道结之间提供氧化物层。 下电极可以是具有超过50原子％钛含量的富钛TiN层。 还描述了类似的制造方法。

公开(公告)号：US20060039190A1

公开(公告)日：2006-02-23

申请号：US11097495

申请日：2005-04-01

Applicant: Hyun-Jo Kim ,  Jang-Eun Lee ,  Se-Chung Oh ,  Jun-Soo Bae ,  Young-Ki Ha ,  Kyung-Tae Nam

Inventor： Hyun-Jo Kim ,  Jang-Eun Lee ,  Se-Chung Oh ,  Jun-Soo Bae ,  Young-Ki Ha ,  Kyung-Tae Nam

IPC: G11C11/00

CPC classification number: G11C11/16

Abstract: A method of writing to magnetic random access memory (MRAM) devices is provided. The method includes preparing a digit line disposed on a semiconductor substrate, a bit line crossing over the digit line, and a magnetic tunnel junction (MTJ) interposed between the digit line and the bit line. The MTJ has a pinned layer, a tunneling insulating layer, and a synthetic anti-ferromagnetic (SAF) free layer which are sequentially stacked. In addition, the SAF free layer has a bottom free layer and a top free layer which are separated by an exchange spacer layer. An initial magnetization state of the MTJ is read and compared with a desired magnetization state. When the initial magnetization state is different from the desired magnetization state, a first write line pulse is applied to one of the digit line and the bit line, and a second write line pulse is applied to the other of the digit line and the bit line, thereby changing the magnetization state of the MTJ. The MTJ may be disposed at an angle equal to or greater than 0° and less than 90° to a line to which the second write line pulse is applied.

Abstract translation: 提供了一种写入磁性随机存取存储器（MRAM）器件的方法。 该方法包括准备设置在半导体衬底上的数字线，与数字线交叉的位线以及置于数字线和位线之间的磁性隧道结（MTJ）。 MTJ具有钉扎层，隧道绝缘层和顺序层叠的合成反铁磁（SAF）层。 此外，SAF自由层具有由交换间隔层隔开的无底层和顶部自由层。 读取MTJ的初始磁化状态并与期望的磁化状态进行比较。 当初始磁化状态不同于期望的磁化状态时，第一写入线脉冲被施加到数字线和位线之一，并且第二写入线脉冲被施加到数字线和位线中的另一个 ，从而改变MTJ的磁化状态。 MTJ可以以与第二写入线脉冲施加的线等于或大于0°且小于90°的角度布置。

公开(公告)号：US08513051B2

公开(公告)日：2013-08-20

申请号：US12708742

申请日：2010-02-19

Applicant: Yong-Ho Ha ,  Bong-Jin Kuh ,  Ji-Hye Yi ,  Jun-Soo Bae

Inventor： Yong-Ho Ha ,  Bong-Jin Kuh ,  Ji-Hye Yi ,  Jun-Soo Bae

IPC: H01L21/8239

CPC classification number: H01L45/06 ,  H01L27/2436 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/128 ,  H01L45/143 ,  H01L45/144 ,  H01L45/1675

Abstract: Phase-changeable memory devices include a lower electrode electrically connected to an impurity region of a transistor in a substrate and a programming layer pattern including a first phase-changeable material on the lower electrode. An adiabatic layer pattern including a material having a lower thermal conductivity than the first phase-changeable material is on the programming layer pattern and an upper electrode is on the adiabatic layer pattern.

Abstract translation: 相变存储器件包括电连接到衬底中的晶体管的杂质区的下电极和在下电极上包括第一相变材料的编程层图案。 包含具有比第一相变材料低的热导率的材料的绝热层图案在编程层图案上，上电极在绝热层图案上。

公开(公告)号：US08238147B2

公开(公告)日：2012-08-07

申请号：US12283409

申请日：2008-09-11

Applicant: Jun-Soo Bae ,  Hideki Horii ,  Jong-Chan Shin

Inventor： Jun-Soo Bae ,  Hideki Horii ,  Jong-Chan Shin

IPC: G11C11/00

CPC classification number: G11C13/0061 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0069 ,  G11C16/32 ,  G11C2013/009 ,  G11C2013/0092 ,  Y10S977/754

Abstract: In a program method for a multi-level phase change memory device, multi-level data to be programmed in a selected memory cell is received, and a program signal is applied to the selected memory cell according to the received multi-level data. Herein, a rising time of the program signal is set to be longer than a falling time of the program signal.

Abstract translation: 在多电平相变存储器件的程序方法中，接收在所选择的存储器单元中要编程的多电平数据，并且根据所接收的多电平数据将程序信号施加到所选存储单元。 这里，程序信号的上升时间被设定为长于编程信号的下降时间。

公开(公告)号：US08168535B2

公开(公告)日：2012-05-01

申请号：US13084657

申请日：2011-04-12

Applicant: Jun-Soo Bae ,  Suk-Hun Choi ,  Won-Jun Lee ,  Joon-Sang Park

Inventor： Jun-Soo Bae ,  Suk-Hun Choi ,  Won-Jun Lee ,  Joon-Sang Park

IPC: H01L21/44

CPC classification number: H01L45/1683 ,  H01L45/06 ,  H01L45/141

Abstract: A method of fabricating a phase change memory device includes the use of first, second and third polishing processes. The first polishing process forms a first contact portion using a first sacrificial layer and the second polishing process forms a phase change material pattern using a second sacrificial layer. After removing the first and second sacrificial layers to expose resultant protruding structures of the first contact portion and the phase change material pattern, a third polishing process is used to polish the resultant protruding structures using an insulation layer as a polishing stopper layer.

Abstract translation: 制造相变存储器件的方法包括使用第一，第二和第三抛光工艺。 第一抛光工艺使用第一牺牲层形成第一接触部分，并且第二抛光工艺使用第二牺牲层形成相变材料图案。 在去除第一和第二牺牲层以暴露第一接触部分的相应突出结构和相变材料图案之后，使用第三抛光工艺来使用绝缘层作为抛光停止层来抛光所得的突出结构。