公开(公告)号：US08373321B2

公开(公告)日：2013-02-12

申请号：US12950971

申请日：2010-11-19

申请人： Hyeoun Dong Lee ,  Do Hyun Kim ,  Ki Nam Kim ,  Sam Gyun Kim ,  Tack Hwan Kwon

发明人： Hyeoun Dong Lee ,  Do Hyun Kim ,  Ki Nam Kim ,  Sam Gyun Kim ,  Tack Hwan Kwon

IPC分类号： H02K11/00

CPC分类号： H02K3/38

摘要： The present invention features a terminal assembly for a motor of a hybrid vehicle as a wire connection structure of a concentrated winding motor, which can maintain a gap between a plurality of terminals using a clip and a holder in an insulated manner. Such a terminal assembly for a motor of a hybrid vehicle, includes: an open type holder with an open top; a plurality of terminals concentrically arranged and inserted into the holder; and a plurality of clips, each inserted between the terminals in an insulated manner to maintain a gap between the terminals.

摘要翻译： 本发明的特征在于一种用于混合动力车辆的电动机的端子组件作为集中绕线电动机的电线连接结构，其可以使用夹子和保持器以绝缘方式保持多个端子之间的间隙。 这种用于混合动力车辆的电动机的端子组件包括：具有开口顶部的敞开式保持器; 多个端子同心地布置并插入保持器中; 以及多个夹子，每个夹子以绝缘方式插入在端子之间以保持端子之间的间隙。

公开(公告)号：US20120207456A1

公开(公告)日：2012-08-16

申请号：US13391410

申请日：2010-08-04

申请人： Chang Kyo Kim ,  Tae Jong Ki ,  Choul Soo Kim ,  Ki Nam Kim

发明人： Chang Kyo Kim ,  Tae Jong Ki ,  Choul Soo Kim ,  Ki Nam Kim

IPC分类号： F27D11/12

CPC分类号： H05B3/744

摘要： The present invention relates to a heater block for a rapid thermal processing apparatus, and more particularly, to a heater block in which heating lamps are densely arranged in a tessellation. The tessellation has a structure such that the plurality of heating lamps are arranged at right angles to form a zigzag line, and the thus-formed zigzagged line is repeated such that the zigzagged line is combined with the adjacent zigzagged line. According to the present invention, a temperature gradient caused by a void between heating lamps is prevented, and heating lamps are densely arranged to increase heat density for a heat radiation area as opposed to conventional heater blocks, thus achieving improved heat treatment efficiency using less energy. In addition, fully uniform temperature control is enabled, in terms of sector allocated temperature control, even when the area to be independently controlled is enlarged as opposed to conventional heater blocks, thereby simplifying the configuration of a temperature control circuit.

摘要翻译： 本发明涉及一种用于快速热处理装置的加热器块，更具体地说，涉及一种加热块，其中加热灯密集地布置成镶嵌。 该细分具有这样的结构，使得多个加热灯以直角排列以形成之字形线，并且重复如此形成的之字形线，使得之字形线与相邻之字形线组合。 根据本发明，防止了由加热灯之间的空隙引起的温度梯度，与传统的加热器块相比，加热灯密集地布置成增加了散热面积的热密度，从而使用更少的能量来实现提高的热处理效率 。 此外，就扇区分配的温度控制而言，即使独立控制的区域与常规的加热器块相反，也能够进行完全均匀的温度控制，从而简化了温度控制电路的结构。

公开(公告)号：US20120092369A1

公开(公告)日：2012-04-19

申请号：US13012249

申请日：2011-01-24

申请人： Ki Nam KIM ,  Bub Yeon KIM ,  Hea Beck YANG ,  Seung Jae LEE

发明人： Ki Nam KIM ,  Bub Yeon KIM ,  Hea Beck YANG ,  Seung Jae LEE

IPC分类号： G09G5/00

CPC分类号： G06T11/00 ,  G06T19/006

摘要： Provided are a display apparatus and a display method for improving visibility of each object by differently displaying each object from the background when providing an augmented reality (AR) service. The display apparatus and the display method may improve visibility of each object by outputting a list of overlapped objects or a map of overlapped objects. Also, the display apparatus and the display method may improve visibility of each object by enlarging a complex area, in which objects are densely disposed, to reduce overlapping of the objects.

摘要翻译： 提供了一种显示装置和显示方法，用于通过在提供增强现实（AR）服务时从背景中不同地显示每个对象来提高每个对象的可见性。 显示装置和显示方法可以通过输出重叠对象的列表或重叠对象的映射来提高每个对象的可见性。 此外，显示装置和显示方法可以通过扩大其中密集地布置对象的复杂区域来减少每个对象的可视性，以减少对象的重叠。

公开(公告)号：US08026504B2

公开(公告)日：2011-09-27

申请号：US12379814

申请日：2009-03-02

申请人： Jun-Beom Park ,  Soon-Moon Jung ,  Ki-Nam Kim

发明人： Jun-Beom Park ,  Soon-Moon Jung ,  Ki-Nam Kim

IPC分类号： H01L47/00

CPC分类号： H01L27/24 ,  Y10S977/774

摘要： A semiconductor device and a method of forming the same are provided. The method includes preparing a semiconductor substrate. Insulating layers may be sequentially formed on the semiconductor substrate. Active elements may be formed between the insulating layers. A common node may be formed in the insulating layers to be electrically connected to the active elements. The common node and the active elements may be 2-dimensionally and repeatedly arranged on the semiconductor substrate.

摘要翻译： 提供半导体器件及其形成方法。 该方法包括制备半导体衬底。 可以在半导体衬底上依次形成绝缘层。 可以在绝缘层之间形成有源元件。 可以在绝缘层中形成公共节点以电连接到有源元件。 公共节点和有源元件可以二维重复地布置在半导体衬底上。

公开(公告)号：US20110215662A1

公开(公告)日：2011-09-08

申请号：US12950971

申请日：2010-11-19

申请人： Hyeoun Dong Lee ,  Do Hyun Kim ,  Ki Nam Kim ,  Sam Gyun Kim ,  Tack Hwan Kwon

发明人： Hyeoun Dong Lee ,  Do Hyun Kim ,  Ki Nam Kim ,  Sam Gyun Kim ,  Tack Hwan Kwon

IPC分类号： H02K3/38

CPC分类号： H02K3/38

摘要： The present invention features a terminal assembly for a motor of a hybrid vehicle as a wire connection structure of a concentrated winding motor, which can maintain a gap between a plurality of terminals using a clip and a holder in an insulated manner. Such a terminal assembly for a motor of a hybrid vehicle, includes: an open type holder with an open top; a plurality of terminals concentrically arranged and inserted into the holder; and a plurality of clips, each inserted between the terminals in an insulated manner to maintain a gap between the terminals.

摘要翻译： 本发明的特征在于一种用于混合动力车辆的电动机的端子组件作为集中绕线电动机的电线连接结构，其可以使用夹子和保持器以绝缘方式保持多个端子之间的间隙。 这种用于混合动力车辆的电动机的端子组件包括：具有开口顶部的敞开式保持器; 多个端子同心地布置并插入保持器中; 以及多个夹子，每个夹子以绝缘方式插入在端子之间以保持端子之间的间隙。

公开(公告)号：US07888667B2

公开(公告)日：2011-02-15

申请号：US12008125

申请日：2008-01-09

申请人： Yoon-Jong Song ,  Se-Ho Lee ,  Ki-Nam Kim ,  Su-Youn Lee ,  Jae-Hyun Park

发明人： Yoon-Jong Song ,  Se-Ho Lee ,  Ki-Nam Kim ,  Su-Youn Lee ,  Jae-Hyun Park

IPC分类号： H01L47/00 ,  H01L21/00 ,  G11C11/00

CPC分类号： H01L45/06 ,  G11C2213/52 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/141 ,  H01L45/1683 ,  Y10S438/90

摘要： A phase change memory device includes a mold layer disposed on a substrate, a heating electrode, a filling insulation pattern and a phase change material pattern. The heating electrode is disposed in an opening exposing the substrate through the mold layer. The heating electrode is formed in a substantially cylindrical shape, having its sidewalls conformally disposed on the lower inner walls of the opening. The filling insulation pattern fills an empty region surrounded by the sidewalls of the heating electrode. The phase change material pattern is disposed on the mold layer and downwardly extended to fill the empty part of the opening. The phase change material pattern contacts the top surfaces of the sidewalls of the heating electrode.

摘要翻译： 相变存储器件包括设置在基板上的模具层，加热电极，填充绝缘图案和相变材料图案。 加热电极设置在使基板穿过模具层的开口中。 加热电极形成为大致圆筒形，其侧壁共形地设置在开口的下内壁上。 填充绝缘图案填充由加热电极的侧壁围绕的空白区域。 相变材料图案设置在模具层上并向下延伸以填充开口的空的部分。 相变材料图案接触加热电极的侧壁的顶表面。

公开(公告)号：US20100330752A1

公开(公告)日：2010-12-30

申请号：US12842703

申请日：2010-07-23

申请人： Jae-Hun Jeong ,  Ki-Nam Kim ,  Soon-Moon Jung ,  Jae-Hoon Jang

发明人： Jae-Hun Jeong ,  Ki-Nam Kim ,  Soon-Moon Jung ,  Jae-Hoon Jang

IPC分类号： H01L21/322 ,  H01L21/336

CPC分类号： H01L27/10802 ,  H01L21/8221 ,  H01L27/0688 ,  H01L27/108 ,  H01L27/10844 ,  H01L27/1203 ,  H01L29/7841

摘要： A one transistor DRAM device includes: a substrate with an insulating layer, a first semiconductor layer provided on the insulating layer and including a first source region and a first region which are in contact with the insulating layer and a first floating body between the first source region and the first drain region, a first gate pattern to cover the first floating body, a first interlayer dielectric to cover the first gate pattern, a second semiconductor layer provided on the first interlayer dielectric and including a second source region and a second drain region which are in contact with the first interlayer dielectric and a second floating body between the second source region and the second drain region, and a second gate pattern to cover the second floating body.

摘要翻译： 一个晶体管DRAM器件包括：具有绝缘层的衬底，设置在绝缘层上的第一半导体层，包括与绝缘层接触的第一源极区域和第一区域以及第一源极 区域和第一漏极区域，覆盖第一浮动体的第一栅极图案，覆盖第一栅极图案的第一层间电介质，设置在第一层间电介质上并包括第二源极区域和第二漏极区域的第二半导体层 其与第一层间电介质接触，第二浮动体与第二源极区和第二漏极区之间接触，第二栅极图案覆盖第二浮体。

公开(公告)号：US20100002523A1

公开(公告)日：2010-01-07

申请号：US12558717

申请日：2009-09-14

申请人： Ki-Tae Park ,  Yong-Seok Kim ,  Ki-Nam Kim ,  Yeong-Taek Lee

发明人： Ki-Tae Park ,  Yong-Seok Kim ,  Ki-Nam Kim ,  Yeong-Taek Lee

IPC分类号： G11C16/06 ,  G11C16/04

CPC分类号： G11C16/344 ,  G11C16/3454

摘要： Disclosed is a method of verifying a programmed condition of a flash memory device, being comprised of: determining a level of an additional verifying voltage in response to the number of programming/erasing cycles of memory cells; conducting a verifying operation to programmed memory cells with an initial verifying voltage lower than the additional verifying voltage; and selectively conducting an additional verifying operation with the additional verifying voltage to the program-verified memory cells in response to the number of programming/erasing cycles.

摘要翻译： 公开了一种验证闪速存储器件的编程状态的方法，其包括：响应于存储器单元的编程/擦除循环的数量确定额外的验证电压的电平; 对初始验证电压低于附加验证电压的程序存储单元执行验证操作; 以及响应于所述编程/擦除周期的数量，选择性地对所述经过程序验证的存储器单元执行附加验证电压的附加验证操作。

公开(公告)号：US20090253257A1

公开(公告)日：2009-10-08

申请号：US12478538

申请日：2009-06-04

申请人： Young-Chul Jang ,  Ki-Nam Kim ,  Soon-Moon Jung ,  Jae-Hoon Jang

发明人： Young-Chul Jang ,  Ki-Nam Kim ,  Soon-Moon Jung ,  Jae-Hoon Jang

IPC分类号： H01L21/8246 ,  H01L21/4763 ,  H01L21/3205

CPC分类号： H01L27/105 ,  H01L21/8221 ,  H01L27/0688 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/11526 ,  H01L27/11529 ,  H01L27/11551

摘要： A nonvolatile memory device includes a semiconductor substrate having a first well region of a first conductivity type, and at least one semiconductor layer formed on the semiconductor substrate. A first cell array is formed on the semiconductor substrate, and a second cell array formed on the semiconductor layer. The semiconductor layer includes a second well region of the first conductivity type having a doping concentration greater than a doping concentration of the first well region of the first conductivity type. As the doping concentration of the second well region is increased, a resistance difference may be reduced between the first and second well regions.

摘要翻译： 非易失性存储器件包括具有第一导电类型的第一阱区和形成在半导体衬底上的至少一个半导体层的半导体衬底。 第一单元阵列形成在半导体衬底上，第二单元阵列形成在半导体层上。 半导体层包括第一导电类型的第二阱区，其具有大于第一导电类型的第一阱区的掺杂浓度的掺杂浓度。 随着第二阱区域的掺杂浓度增加，可以在第一和第二阱区域之间减小电阻差。

公开(公告)号：US20090218558A1

公开(公告)日：2009-09-03

申请号：US12379814

申请日：2009-03-02

申请人： Jun-Beom Park ,  Soon-Moon Jung ,  Ki-Nam Kim

发明人： Jun-Beom Park ,  Soon-Moon Jung ,  Ki-Nam Kim

IPC分类号： H01L47/00

CPC分类号： H01L27/24 ,  Y10S977/774

摘要： A semiconductor device and a method of forming the same are provided. The method includes preparing a semiconductor substrate. Insulating layers may be sequentially formed on the semiconductor substrate. Active elements may be formed between the insulating layers. A common node may be formed in the insulating layers to be electrically connected to the active elements. The common node and the active elements may be 2-dimensionally and repeatedly arranged on the semiconductor substrate.

摘要翻译： 提供半导体器件及其形成方法。 该方法包括制备半导体衬底。 可以在半导体衬底上依次形成绝缘层。 可以在绝缘层之间形成有源元件。 可以在绝缘层中形成公共节点以电连接到有源元件。 公共节点和有源元件可以二维重复地布置在半导体衬底上。