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公开(公告)号:US11934240B2
公开(公告)日:2024-03-19
申请号:US17664000
申请日:2022-05-18
Applicant: Apple Inc.
Inventor: Inder M. Sodhi , Achmed R. Zahir , Carmel Yamberger , Daniele Perretta , Jan Krellner , Ron Neuman , James S. Ismail , Keith Cox
CPC classification number: G06F1/206 , G06F1/28 , G06F11/3058
Abstract: Techniques are disclosed relating to thermal control implemented by a power management unit. In some embodiments, the power management unit itself is configured to monitor thermal conditions, implement control for one or more thermal loops, and send reduction alerts, via an inter-chip interconnect, to the processor circuitry it powers. In some embodiments, the power management unit implements both thermal and electromigration control loops. Disclosed techniques may advantageously reduce or avoid thermal issues, potentially with reduced impact on processor performance relative to traditional techniques.
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公开(公告)号:US20230376091A1
公开(公告)日:2023-11-23
申请号:US17664000
申请日:2022-05-18
Applicant: Apple Inc.
Inventor: Inder M. Sodhi , Achmed R. Zahir , Carmel Yamberger , Daniele Perretta , Jan Krellner , Ron Neuman , James S. Ismail , Keith Cox
CPC classification number: G06F1/206 , G06F1/28 , G06F11/3058
Abstract: Techniques are disclosed relating to thermal control implemented by a power management unit. In some embodiments, the power management unit itself is configured to monitor thermal conditions, implement control for one or more thermal loops, and send reduction alerts, via an inter-chip interconnect, to the processor circuitry it powers. In some embodiments, the power management unit implements both thermal and electromigration control loops. Disclosed techniques may advantageously reduce or avoid thermal issues, potentially with reduced impact on processor performance relative to traditional techniques.
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43.
公开(公告)号:US11513576B2
公开(公告)日:2022-11-29
申请号:US16889232
申请日:2020-06-01
Applicant: Apple Inc.
Inventor: Achmed R. Zahir , Diwakar N. Tundlam , James S. Ismail , Keith Cox , Reza Arastoo , Douglas A. MacKay , John M. Ananny , Michael Eng
IPC: G06F1/28 , G06F1/3212 , H02J7/00 , G01R31/367 , G01R31/387
Abstract: Systems and methods are disclosed for allocating and distributing power management budgets for subsystems (e.g., power usage clients) of a computer system. A power budget allocation subsystem may include a plurality of feedback branches having different associated time constants. Power usage clients with slower power response times may be provided power budgets based on a feedback branch having an associated longer time constant, while power usage clients with faster power response times may be provided with power budgets based on a feedback branch having an associated shorter time constant. The power budgets may be determined in the feedback branches based on power budgeting policies weighting the power budget of each subsystem relative to total power mitigation.
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公开(公告)号:US20220137692A1
公开(公告)日:2022-05-05
申请号:US17528380
申请日:2021-11-17
Applicant: Apple Inc.
Inventor: Joseph T. DiBene, II , Inder M. Sodhi , Keith Cox , Gerard R. Williams, III
IPC: G06F1/3206 , G06F1/3203 , G06F1/3296
Abstract: In an embodiment, a system includes multiple power management mechanism operating in different time domains (e.g., with different bandwidths) and control circuitry that is configured to coordinate operation of the mechanisms. If one mechanism is adding energy to the system, for example, the control circuitry may inform another mechanism that the energy is coming so that the other mechanism may not take as drastic an action as it would if no energy were coming. If a light workload is detected by circuitry near the load, and there is plenty of energy in the system, the control circuitry may cause the power management unit (PMU) to generate less energy or even temporarily turn off. A variety of mechanisms for the coordinated, coherent use of power are described.
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公开(公告)号:US11204636B2
公开(公告)日:2021-12-21
申请号:US16519347
申请日:2019-07-23
Applicant: Apple Inc.
Inventor: Joseph T. DiBene, II , Inder M. Sodhi , Keith Cox , Gerard R. Williams, III
IPC: G06F1/3206 , G06F1/3203 , G06F1/3296
Abstract: In an embodiment, a system includes multiple power management mechanism operating in different time domains (e.g. with different bandwidths) and control circuitry that is configured to coordinate operation of the mechanisms. If one mechanism is adding energy to the system, for example, the control circuitry may inform another mechanism that the energy is coming so that the other mechanism may not take as drastic an action as it would if no energy were coming. If a light workload is detected by circuitry near the load, and there is plenty of energy in the system, the control circuitry may cause the power management unit (PMU) to generate less energy or even temporarily turn off. A variety of mechanisms for the coordinated, coherent use of power are described.
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公开(公告)号:US10423209B2
公开(公告)日:2019-09-24
申请号:US15430699
申请日:2017-02-13
Applicant: Apple Inc.
Inventor: Joseph T. DiBene, II , Inder M. Sodhi , Keith Cox , Gerard R. Williams, III
IPC: G06F9/00 , G06F1/3206 , G06F1/3296 , G06F1/3203
Abstract: In an embodiment, a system includes multiple power management mechanism operating in different time domains (e.g. with different bandwidths) and control circuitry that is configured to coordinate operation of the mechanisms. If one mechanism is adding energy to the system, for example, the control circuitry may inform another mechanism that the energy is coming so that the other mechanism may not take as drastic an action as it would if no energy were coming. If a light workload is detected by circuitry near the load, and there is plenty of energy in the system, the control circuitry may cause the power management unit (PMU) to generate less energy or even temporarily turn off. A variety of mechanisms for the coordinated, coherent use of power are described.
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公开(公告)号:US10067483B1
公开(公告)日:2018-09-04
申请号:US14471164
申请日:2014-08-28
Applicant: Apple Inc.
Inventor: Ching E. Ho , Antonietta Oliva , James S. Ismail , John G. Dorsey , Keith Cox , Norman J. Rohrer
IPC: G06Q10/06 , G06F17/18 , G05B19/4065 , G05B13/02 , G05B23/02
Abstract: In an embodiment, a lifetime controller is configured to monitor operating conditions for a device, and to control operating conditions based on the previous conditions to improve the reliability characteristics of the device while permitting strenuous use as available. For example, the lifetime controller may permit strenuous use when the device is first powered on. Once a specified amount of strenuous use has occurred, the controller may cause the operating conditions to be reduced to reduce the wear on the device, and thus help to extend the lifetime of the device. Similarly, if a device is used in less strenuous conditions, the controller may accumulate credit which may be expended by permitting the device to operate in more strenuous conditions for a period of time.
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公开(公告)号:US10014733B2
公开(公告)日:2018-07-03
申请号:US14837965
申请日:2015-08-27
Applicant: Apple Inc.
Inventor: Amaury J. Heresztyn , Keith Cox , Eric S. Jol , Jeffrey M. Alves , Jim C. Hwang , Jeffrey J. Terlizzi , John M. Ananny , Nagarajan Kalyanasundaram , Robert S. Parnell , Steven G. Herbst , Todd K. Moyer , Albert J. Golko , Frank Liang
Abstract: Various techniques for temperature management during inductive energy transfer are disclosed. A transmitter device and/or a receiver device can be turned off during energy transfer based on the temperature of the transmitter device and/or of the receiver device.
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公开(公告)号:US20170330528A1
公开(公告)日:2017-11-16
申请号:US15471553
申请日:2017-03-28
Applicant: Apple Inc.
Inventor: John G. Dorsey , James S. Ismail , Keith Cox , Gaurav Kapoor
CPC classification number: G09G5/003 , G06F1/20 , G06F1/26 , G06F1/324 , G06F1/3296 , G06T1/20 , G06T1/60 , G06T13/80 , G06T2200/28 , G09G5/18 , G09G2354/00 , G09G2360/08 , G09G2360/127 , Y02D10/126 , Y02D10/172
Abstract: The invention provides a technique for targeted scaling of the voltage and/or frequency of a processor included in a computing device. One embodiment involves scaling the voltage/frequency of the processor based on the number of frames per second being input to a frame buffer in order to reduce or eliminate choppiness in animations shown on a display of the computing device. Another embodiment of the invention involves scaling the voltage/frequency of the processor based on a utilization rate of the GPU in order to reduce or eliminate any bottleneck caused by slow issuance of instructions from the CPU to the GPU. Yet another embodiment of the invention involves scaling the voltage/frequency of the CPU based on specific types of instructions being executed by the CPU. Further embodiments include scaling the voltage and/or frequency of a CPU when the CPU executes workloads that have characteristics of traditional desktop/laptop computer applications.
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公开(公告)号:US09766684B2
公开(公告)日:2017-09-19
申请号:US14336377
申请日:2014-07-21
Applicant: Apple Inc.
Inventor: Parin Patel , Keith Cox
IPC: G06F1/32
CPC classification number: G06F1/3234 , G06F1/3206
Abstract: Power and thermal management that uses trigger circuits to activate power telemetry. A power consumption level of a subsystem is monitored using a trigger circuit while power telemetry mode for the subsystem is inactive. When the monitored power consumption level exceeds a threshold, the trigger circuit activates the power telemetry mode of operation in which telemetry information of the subsystem is provided to a controller. Power consumption of the subsystem is then managed by the controller based on telemetry information obtained under the power telemetry mode. The controller can determine whether a power consumption level of the subsystem has dropped below a threshold, based on telemetry information obtained under the power telemetry mode. The controller may terminate the power telemetry mode when the power consumption level has dropped below the threshold. Other embodiments are also described and claimed.
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