公开(公告)号：US20060063352A1

公开(公告)日：2006-03-23

申请号：US11225883

申请日：2005-09-13

申请人： Gabriele Barlocchi ,  Flavio Villa

发明人： Gabriele Barlocchi ,  Flavio Villa

IPC分类号： H01L21/30 ,  H01L21/20

CPC分类号： H01L21/3247 ,  H01L21/3043 ,  H01L21/76251 ,  H01L21/76259

摘要： A process manufactures a wafer using semiconductor processing techniques. A bonding layer is formed on a top surface of a first wafer; a deep trench is dug in a substrate of semiconductor material belonging to a second wafer. A top layer of semiconductor material is formed on top of the substrate so as to close the deep trench at the top and form at least one buried cavity. The top layer of the second wafer is bonded to the first wafer through the bonding layer. The two wafers are subjected to a thermal treatment that causes bonding of at least one portion of the top layer to the first wafer and widening of the buried cavity. In this way, the portion of the top layer bonded to the first wafer is separated from the rest of the second wafer, to form a composite wafer.

摘要翻译： 一种工艺使用半导体处理技术制造晶片。 在第一晶片的顶表面上形成接合层; 在属于第二晶片的半导体材料的衬底中挖出深沟槽。 半导体材料的顶层形成在衬底的顶部上，以封闭顶部的深沟槽并形成至少一个埋入空腔。 第二晶片的顶层通过结合层结合到第一晶片。 对这两个晶片进行热处理，其导致顶层的至少一部分与第一晶片的接合和掩埋腔的加宽。 以这种方式，将结合到第一晶片的顶层的部分与第二晶片的其余部分分离，以形成复合晶片。

公开(公告)号：US20060017131A9

公开(公告)日：2006-01-26

申请号：US10327702

申请日：2002-12-20

申请人： Flavio Villa ,  Gabriele Barlocchi ,  Pietro Corona

发明人： Flavio Villa ,  Gabriele Barlocchi ,  Pietro Corona

IPC分类号： H01L29/00

CPC分类号： H01L21/76283 ,  H01L21/3003 ,  H01L21/3247 ,  H01L21/76289 ,  H01L21/764 ,  H01L29/0649 ,  Y10S438/967

摘要： A process for manufacturing an SOI wafer, including the steps of: forming, in a wafer of semiconductor material, cavities delimiting structures of semiconductor material; thinning out the structures through a thermal process; and completely oxidizing the structures.

公开(公告)号：US06974693B2

公开(公告)日：2005-12-13

申请号：US10874902

申请日：2004-06-23

申请人： Gabriele Barlocchi ,  Flavio Villa

发明人： Gabriele Barlocchi ,  Flavio Villa

IPC分类号： B01L3/00 ,  B01L7/00 ,  C12M1/34

CPC分类号： B01L7/52 ,  B01L3/502707 ,  B01L2200/12 ,  B01L2300/0645 ,  B01L2300/0825 ,  B01L2300/1827 ,  B01L2300/1883

摘要： Integrated microreactor, formed in a monolithic body and including a semiconductor material region and an insulating layer; a buried channel extending in the semiconductor material region; a first and a second access trench extending in the semiconductor material region and in the insulating layer, and in communication with the buried channel; a first and a second reservoir formed on top of the insulating layer and in communication with the first and the second access trench; a suspended diaphragm formed by the insulating layer, laterally to the buried channel; and a detection electrode, supported by the suspended diaphragm, above the insulating layer, and inside the second reservoir.

公开(公告)号：US06929968B2

公开(公告)日：2005-08-16

申请号：US10874905

申请日：2004-06-23

申请人： Gabriele Barlocchi ,  Flavio Villa

发明人： Gabriele Barlocchi ,  Flavio Villa

IPC分类号： B01L3/00 ,  B01L7/00 ,  H01L21/00

CPC分类号： B01L7/52 ,  B01L3/502707 ,  B01L2200/12 ,  B01L2300/0645 ,  B01L2300/0825 ,  B01L2300/1827 ,  B01L2300/1883

摘要： Integrated microreactor, formed in a monolithic body and including a semiconductor material region and an insulating layer; a buried channel extending in the semiconductor material region; a first and a second access trench extending in the semiconductor material region and in the insulating layer, and in communication with the buried channel; a first and a second reservoir formed on top of the insulating layer and in communication with the first and the second access trench; a suspended diaphragm formed by the insulating layer, laterally to the buried channel; and a detection electrode, supported by the suspended diaphragm, above the insulating layer, and inside the second reservoir.

摘要翻译： 集成的微反应器，形成在一体的整体中并且包括半导体材料区域和绝缘层; 在半导体材料区域中延伸的掩埋沟道; 在所述半导体材料区域和所述绝缘层中延伸并与所述掩埋沟道连通的第一和第二访问沟槽; 第一和第二储存器，其形成在所述绝缘层的顶部上并且与所述第一和第二接入沟槽连通; 由绝缘层形成的悬浮膜，横向于埋设通道; 以及由悬挂隔膜支撑的检测电极，在绝缘层上方和第二储存器内部。

公开(公告)号：US20050176037A1

公开(公告)日：2005-08-11

申请号：US11009171

申请日：2004-12-10

申请人： Ubaldo Mastromatteo ,  Flavio Villa ,  Gabriele Barlocchi

发明人： Ubaldo Mastromatteo ,  Flavio Villa ,  Gabriele Barlocchi

IPC分类号： B01J19/00 ,  B01L3/00 ,  B01L7/00 ,  B81B1/00 ,  G01N21/64 ,  C12Q1/68 ,  C12M1/34 ,  H01L21/00

CPC分类号： G01N21/6428 ,  B01J19/0093 ,  B01J2219/0097 ,  B01L3/502707 ,  B01L3/502715 ,  B01L7/52 ,  B01L2200/12 ,  B01L2300/0654 ,  B01L2300/0816 ,  G01N21/6454

摘要： An integrated semiconductor chemical microreactor for real-time polymerase chain reaction (PCR) monitoring, has a monolithic body of semiconductor material; a number of buried channels formed in the monolithic body; an inlet trench and an outlet trench for each buried channel; and a monitoring trench for each buried channel, extending between the inlet and outlet trenches thereof from the top surface of the monolithic body to the respective buried channel. Real-time PCR monitoring is carried out by channeling light beams into the buried channels, possibly through one of the inlet or outlet trenches, whereby the light beams impinge on the fluid therein and collecting the emergent light coming out from the monitoring trench.

摘要翻译： 一种用于实时聚合酶链反应（PCR）监测的集成半导体化学微反应器，具有半导体材料的整体; 形成在整体式主体中的多个埋入通道; 用于每个掩埋通道的入口沟槽和出口沟槽; 以及用于每个掩埋通道的监测沟槽，其在其入口和出口沟槽之间从单体主体的顶表面延伸到相应的掩埋通道。 通过将光束通过入口或出口沟槽中的一个引入到掩埋通道中，从而使光束照射在其中的流体并收集从监测沟槽出来的出射光，从而进行实时PCR监测。

公开(公告)号：US06759132B2

公开(公告)日：2004-07-06

申请号：US10295767

申请日：2002-11-14

申请人： Ubaldo Mastromatteo ,  Pietro Corona ,  Flavio Villa ,  Gabriele Barlocchi

发明人： Ubaldo Mastromatteo ,  Pietro Corona ,  Flavio Villa ,  Gabriele Barlocchi

IPC分类号： B32B900

CPC分类号： G11B7/1362 ,  G02B5/08 ,  G02B6/4214 ,  G11B7/123 ,  Y10T428/12528

摘要： Method for manufacturing electromagnetic radiation reflecting devices, said method comprising the steps of: a) providing a silicon substrate defined by at least one first free surface, b) forming on said first surface a layer of protective material provided with an opening which exposes a region of the first free surface, and c)etching the region of the free surface by means of an anisotropic agent to remove at least one portion of the substrate and define a second free surface of the substrate inclined in relation to said first surface. Furthermore, said first free surface is parallel to the crystalline planes {110} of silicon substrate and said step (c) comprises a progressing step of the anisotropic agent such that the second free surface resulting from the etching step is parallel to the planes {100} of said substrate.

摘要翻译： 用于制造电磁辐射反射装置的方法，所述方法包括以下步骤：a）提供由至少一个第一自由表面限定的硅衬底，b）在所述第一表面上形成一层保护材料，所述保护材料层具有暴露区域 的第一自由表面，以及c）借助于各向异性剂蚀刻所述自由表面的区域以去除所述衬底的至少一部分并且限定所述衬底相对于所述第一表面倾斜的第二自由表面。 此外，所述第一自由表面平行于硅衬底的晶面{110}，并且所述步骤（c）包括各向异性剂的进行步骤，使得由蚀刻步骤产生的第二自由表面平行于平面{100 }。

公开(公告)号：US06670257B1

公开(公告)日：2003-12-30

申请号：US09545260

申请日：2000-04-07

申请人： Gabriele Barlocchi ,  Flavio Villa

发明人： Gabriele Barlocchi ,  Flavio Villa

IPC分类号： H01L2176

CPC分类号： H01L21/2007 ,  H01L21/30608 ,  H01L21/3086 ,  H01L21/76251 ,  H01L21/76262 ,  H01L21/764

摘要： A method of forming buried cavities in a wafer of monocrystalline semiconductor material with at least one cavity formed in a substrate of monocrystalline semiconductor material by timed TMAH etching silicon; covering the cavity with a material inhibiting epitaxial growth; and growing a monocrystalline epitaxial layer above the substrate and the cavities. Thereby, the cavity is completely surrounded by monocrystalline material. Starting from this wafer, it is possible to form a thin membrane. The original wafer must have a plurality of elongate cavities or channels, parallel and adjacent to one another. Trenches are then excavated in the epitaxial layer as far as the channels, and the dividers between the channels are removed by timed TMAH etching.

摘要翻译： 在单晶半导体材料的晶片中形成掩埋空穴的方法，其中至少一个腔通过定时的TMAH蚀刻硅在单晶半导体材料的衬底中形成; 用抑制外延生长的材料覆盖空腔; 以及在衬底和空腔上生长单晶外延层。 因此，腔体被单晶材料完全包围。 从该晶片开始，可以形成薄膜。 原始晶片必须具有彼此平行并相邻的多个细长空腔或通道。 然后在外延层中挖沟直到沟道，并且通过定时TMAH蚀刻去除沟道之间的分隔线。

公开(公告)号：US5530345A

公开(公告)日：1996-06-25

申请号：US129842

申请日：1993-09-30

申请人： Bruno Murari ,  Sandro Storti ,  Flavio Villa

发明人： Bruno Murari ,  Sandro Storti ,  Flavio Villa

IPC分类号： H01L27/22 ,  G01D5/14 ,  H01L43/06 ,  G01R33/06

CPC分类号： G01D5/145 ,  H01L43/065

摘要： For detecting the position of a magnetic element having a field component zeroing in at least one point in space, typically in a plane, a plurality of elementary Hall-effect sensors are integrated side by side and aligned in a direction perpendicular to the zeroing field component and to the current flowing through the elementary sensors. The elementary sensor generating a zero output voltage therefore indicates the zero position of the field component and consequently the position of the magnetic element with respect to the position sensor, so that The outputs of the elementary sensors provide a quantized numeric code indicating the position of the magnetic element.

摘要翻译： 为了检测在空间中的至少一个点（通常在平面中）具有场分量归零的磁性元件的位置，多个基本的霍尔效应传感器被并排并排并且在垂直于零点分量 以及流经基本传感器的电流。 因此，产生零输出电压的基本传感器指示场分量的零位，并因此表示磁元件相对于位置传感器的位置，使得基本传感器的输出提供表示位置传感器的位置的量化数字代码 磁性元件。

公开(公告)号：US4672235A

公开(公告)日：1987-06-09

申请号：US736810

申请日：1985-05-21

申请人： Flavio Villa ,  Bruno Murari ,  Carlo Cini ,  Franco Bertotti

发明人： Flavio Villa ,  Bruno Murari ,  Carlo Cini ,  Franco Bertotti

IPC分类号： H01L29/73 ,  H01L21/331 ,  H03F3/21 ,  H03K17/60

CPC分类号： H03F3/211

摘要： A power transistor comprising a plurality of elementary transistors coupled in parallel and an identical number of current generators, each of which has a terminal coupled individually to the base of an elementary transistor is described. High power levels may be achieved with a transistor of this type without forward secondary breakdown taking place.

摘要翻译： 描述了并联耦合的多个基本晶体管和相同数量的电流发生器的功率晶体管，每个电流发生器具有分别耦合到基本晶体管的基极的端子。 这种类型的晶体管可以实现高功率电平，而不会发生正向二次击穿。

公开(公告)号：US07705416B2

公开(公告)日：2010-04-27

申请号：US10667113

申请日：2003-09-18

申请人： Gabriele Barlocchi ,  Flavio Villa

发明人： Gabriele Barlocchi ,  Flavio Villa

IPC分类号： H01L29/00

CPC分类号： H01L21/2007 ,  H01L21/30608 ,  H01L21/3086 ,  H01L21/76251 ,  H01L21/76262 ,  H01L21/764

摘要： A method of forming buried cavities in a wafer of monocrystalline semiconductor material with at least one cavity formed in a substrate of monocrystalline semiconductor material by timed TMAH etching silicon; covering the cavity with a material inhibiting epitaxial growth; and growing a monocrystalline epitaxial layer above the substrate and the cavities. Thereby, the cavity is completely surrounded by monocrystalline material. Starting from this wafer, it is possible to form a thin membrane. The original wafer must have a plurality of elongate cavities or channels, parallel and adjacent to one another. Trenches are then excavated in the epitaxial layer as far as the channels, and the dividers between the channels are removed by timed TMAH etching.

摘要翻译： 在单晶半导体材料的晶片中形成掩埋空穴的方法，其中至少一个腔通过定时的TMAH蚀刻硅在单晶半导体材料的衬底中形成; 用抑制外延生长的材料覆盖空腔; 以及在衬底和空腔上生长单晶外延层。 因此，腔体被单晶材料完全包围。 从该晶片开始，可以形成薄膜。 原始晶片必须具有彼此平行并相邻的多个细长空腔或通道。 然后在外延层中挖沟直到沟道，并且通过定时TMAH蚀刻去除沟道之间的分隔线。