公开(公告)号：US20140055690A1

公开(公告)日：2014-02-27

申请号：US13995945

申请日：2013-02-17

Applicant: BOE Technology Group Co., Ltd.

Inventor： Youngsuk Song ,  Seungjin Choi ,  Seongyeol Yoo

IPC: G02F1/1333

CPC classification number: G02F1/13338 ,  G02F1/13394 ,  G02F1/136209 ,  G02F2001/136222 ,  G02F2201/40 ,  G06F3/0412 ,  G06F2203/04103

Abstract: Disclosed are a touch liquid crystal display device, a liquid crystal display panel, and an upper substrate. The liquid crystal display panel comprises an upper substrate (10′) and an array substrate as a lower substrate (20′), the array substrate includes a thin film transistor (201′), a black matrix (204′), a color resin layer (205′), a pixel electrode (202′) and a spacer (30′), and the upper substrate (10′) includes a base substrate (102′), a touch sensor (101′) formed on one side of the base substrate and a common electrode (104′) formed on the other side of the base substrate. The upper substrate (10′) has a simplified structure, and therefore it is possible that production costs can be decreased, and the upper substrate can be avoided from being damages during manufacture.

Abstract translation: 公开了一种触摸液晶显示装置，液晶显示面板和上基板。 液晶显示面板包括上基板（10'）和作为下基板（20'）的阵列基板，阵列基板包括薄膜晶体管（201'），黑矩阵（204'），彩色树脂 层（205'），像素电极（202'）和间隔物（30'），上基板（10'）包括基底基板（102'），触摸传感器（101' 所述基底基板和形成在所述基底基板的另一侧上的公共电极（104'）。 上基板（10'）具有简化的结构，因此可以降低生产成本，并且可以避免上基板在制造过程中损坏。

公开(公告)号：US20140054702A1

公开(公告)日：2014-02-27

申请号：US13883858

申请日：2012-12-06

Applicant: BOE Technology Group Co., Ltd.

Inventor： Seungjin Choi ,  Seongyeol Yoo ,  Youngsuk Song

IPC: H01L27/12 ,  G03F1/22

CPC classification number: H01L27/1288 ,  G03F1/22 ,  H01L27/1214 ,  H01L29/41733 ,  H01L29/78696

Abstract: Embodiments of the invention relate to a TFT, a mask for manufacturing the TFT, an array substrate and a display device. A channel of the TFT is formed by using a single slit mask. The channel of the TFT has a bent portion and extension portions provided on both sides of the bent portion, and a channel width of the bent portion is larger than a channel width of the extension portion.

Abstract translation: 本发明的实施例涉及TFT，用于制造TFT的掩模，阵列基板和显示装置。 通过使用单个狭缝掩模形成TFT的沟道。 TFT的通道具有弯曲部分和设置在弯曲部分两侧的延伸部分，并且弯曲部分的通道宽度大于延伸部分的通道宽度。

公开(公告)号：US10403651B2

公开(公告)日：2019-09-03

申请号：US14429501

申请日：2014-05-29

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Heecheol Kim ,  Youngsuk Song ,  Seongyeol Yoo ,  Seungjin Choi

IPC: H01L27/12 ,  H01L23/31 ,  H01L23/00 ,  H01L29/66 ,  H01L23/528 ,  H01L21/56 ,  H01L21/441 ,  H01L29/24 ,  H01L23/522 ,  H01L29/786 ,  H01L29/417 ,  H01L29/423 ,  H01L21/768

Abstract: An array substrate, a method for fabricating the same and a display device are disclosed. The array substrate includes: a gate electrode of a TFT and a gate insulation layer sequentially formed on a base substrate; a semiconductor active layer, an etch stop layer and a source electrode and a drain electrode of the TFT sequentially formed on a part of the gate insulation layer that corresponds to the gate electrode of the TFT, the source and drain electrodes of the TFT are respectively in contact with the semiconductor active layer by way of via holes. The array substrate further includes: a first insulation layer formed between the gate electrode of the TFT and the gate insulation layer and the gate electrode is in contact with the gate insulation layer at a channel region of the TFT between the source electrode and the drain electrode of the TFT.

公开(公告)号：US10276400B2

公开(公告)日：2019-04-30

申请号：US15022283

申请日：2015-09-18

Applicant: Boe Technology Group Co., Ltd.

Inventor： Seongyeol Yoo ,  Seungjin Choi ,  Youngsuk Song

IPC: H01L21/44 ,  H01L27/12 ,  H01L29/45 ,  H01L29/66 ,  H01L29/786

Abstract: The invention relates to a method for fabricating an array substrate, an array substrate and a display device. The method for fabricating an array substrate may comprise: forming a pattern including a source electrode, a drain electrode and a data line; forming a non-crystalline semiconductor thin film layer; and performing annealing, so as to convert only the non-crystalline semiconductor thin film layer on the source electrode, drain electrode and data line to a metal semiconductor compound. By converting only the non-crystalline semiconductor thin film layer on the source electrode, drain electrode and data line into a metal semiconductor compound, the resulting metal semiconductor compound may prevent oxidative-corrosion of the metal thin film layer, such as a low-resistance metal (e.g., Cu or Ti) layer, in the subsequent procedures, which is favorable for the fabrication of a metal oxide thin film transistor using Cu or Ti.

公开(公告)号：US10134786B2

公开(公告)日：2018-11-20

申请号：US14421947

申请日：2014-04-21

Applicant: BOE Technology Group Co., Ltd.

Inventor： Seongyeol Yoo ,  Seungjin Choi ,  Heecheol Kim ,  Youngsuk Song

IPC: H01L29/04 ,  H01L27/12

Abstract: Disclosed is an array substrate, a method of manufacturing the same, and a display device. The method of manufacturing an array substrate includes: forming a pattern comprising an active layer, a source, a drain, a data line and a pixel electrode on a base substrate through a single patterning process; forming a pattern of an insulating layer; forming a pattern comprising a gate and a gate line through a single patterning process. In the array substrate, the method of manufacturing the same, and the display device of the present invention, only two patterning processes are required to achieve the fabrication of the array substrate, which has less and simple process steps, thereby reduces the manufacturing complexity and manufacturing cost, and increasing the production efficiency and the economic benefit.

公开(公告)号：US09806108B2

公开(公告)日：2017-10-31

申请号：US14430019

申请日：2014-05-29

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Seongyeol Yoo ,  Seungjin Choi ,  Heecheol Kim ,  Youngsuk Song

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/66 ,  G02F1/1362 ,  G02F1/1368 ,  H01L29/24

CPC classification number: H01L27/1288 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136295 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/127 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869

Abstract: A manufacturing method of a thin film transistor, a manufacturing method of an array substrate and an array substrate are provided. The manufacturing method of the thin film transistor comprises: forming an active layer, a source electrode and a drain electrode on a substrate by one patterning process, the active layer, the source electrode and the drain electrode being located in a same layer. The manufacturing method of the thin film transistor can effectively reduce the number of patterning processes, so as to enhance the capacity in mass production, and reduce the cost.

公开(公告)号：US09741751B2

公开(公告)日：2017-08-22

申请号：US14778257

申请日：2015-04-16

Applicant: Boe Technology Group Co., Ltd.

Inventor： Ke Wang ,  Seongyeol Yoo

IPC: H01L27/12 ,  G02F1/1343 ,  G02F1/1362 ,  H01L29/786 ,  G02F1/1368

CPC classification number: H01L27/1288 ,  G02F1/13439 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136295 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/127 ,  H01L29/66969 ,  H01L29/7869

Abstract: The present invention provides an array substrate fabricating method. The array substrate fabricating method comprises the steps of: forming a semiconductor material layer and a first photoresist layer on a substrate successively, forming a pattern of an active layer comprising thin film transistors by using the semiconductor material layer and the first photoresist layer through photoetching technology, and reserving the first photoresist layer at least on conductive areas of the active layer when the thin film transistors are turned on; and forming a first material layer on the substrate on which the active layer is formed and the first photoresist layer is reserved on the active layer, and forming a pattern comprising first structures by using the first material layer through the photoetching technology. The method is adapted for fabricating an array substrate using metal oxide thin film transistors.

公开(公告)号：US09690146B2

公开(公告)日：2017-06-27

申请号：US14388699

申请日：2013-12-18

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Seungjin Choi ,  Heecheol Kim ,  Youngsuk Song ,  Seongyeol Yoo

IPC: H01L27/12 ,  G02F1/1343 ,  H01L21/77 ,  H01L29/78 ,  G02F1/1362 ,  G02F1/1368

CPC classification number: G02F1/134309 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/134372 ,  G02F2001/13685 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1288

Abstract: An embodiment of the present invention provides an array substrate, its manufacturing method and a display device. The method for manufacturing the array substrate comprises forming a common electrode with a slit structure on a substrate, and a pixel electrode with a slit structure not overlapping the common electrode. According to the present invention, it is able to reduce storage capacitance between the common electrode and the pixel electrode, thereby to ensure the image quality.

公开(公告)号：US09678263B2

公开(公告)日：2017-06-13

申请号：US14422048

申请日：2014-06-05

Applicant: Boe Technology Group Co., Ltd.

Inventor： Heecheol Kim ,  Youngsuk Song ,  Seongyeol Yoo ,  Seungjin Choi

IPC: F21V8/00 ,  G02B26/10 ,  G02F1/1335 ,  G02B6/00

CPC classification number: G02B6/0018 ,  G02B6/0023 ,  G02B6/0066 ,  G02B26/108 ,  G02B2006/0098 ,  G02F1/1336 ,  G09G2310/024

Abstract: The embodiments of the invention disclose a scanning type backlight module and a display device. Since a laser light source with good collimation is applied, during a display time of a frame, with the modulation of the optical path regulator, the laser emitted from the laser light source performs a progressive scanning for a region corresponding to at least one row of pixel units in a light guide plate or a display panel. Therefore, the problem of dynamic picture ghosting can be solved effectively; moreover, since the progressive scanning for the entire light guide plate can be realized by changing the light propagation path of the laser emitted from the laser light source with the optical path regulator, the number of the laser light sources can be reduced and the production cost can be decreased.

公开(公告)号：US09620524B2

公开(公告)日：2017-04-11

申请号：US14407514

申请日：2014-05-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Heecheol Kim ,  Youngsuk Song ,  Seongyeol Yoo ,  Seungjin Choi

IPC: H01L27/12 ,  G02F1/1333 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/1368 ,  H01L29/417 ,  H01L29/423 ,  H01L29/45 ,  H01L29/66 ,  H01L29/786 ,  G02F1/136

CPC classification number: H01L27/1225 ,  G02F1/133345 ,  G02F1/13439 ,  G02F1/136277 ,  G02F1/1368 ,  G02F2001/134372 ,  G02F2001/13606 ,  G02F2001/136218 ,  H01L27/1259 ,  H01L29/41733 ,  H01L29/41758 ,  H01L29/42356 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/78633 ,  H01L29/7869

Abstract: An array substrate and a manufacturing method thereof as well as a display device are disclosed. The array substrate includes a gate (21) and a gate insulating layers (22) of TFT formed in this order on a surface of a base substrate (20); a semiconductor active layer (23), an etching stop layer (24), and a source (251)/drain (252) of the TFT formed in this order on a surface of the gate insulating layer (22) corresponding to the gate (21) of the TFT. The source (251) and drain (252) of the TFT contact the semiconductor active layer (23) through respective vias. The array substrate further includes: a shielding electrode (26) formed between the gate (21) of the TFT and the base substrate (20); and an insulating layer (27) formed between the gate (21) of the TFT and the shielding electrode (26). In a region where the gate (21) faces the source (251), the area of the gate (210) is smaller than that of the source (251); and/or in a region where the gate (21) faces the drain (252), the area of the gate (210) is smaller than that of the drain (252). The array substrate according to embodiments of the present invention reduces the parasitic capacitance between the source/drain and the gate of the TFT and improves the quality of a display device.