利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

163 条记录 (耗时 0.036 秒)

    Semitubular metal-oxide-semiconductor field effect transistor
    41.
    发明授权
    Semitubular metal-oxide-semiconductor field effect transistor 有权
    半金属氧化物半导体场效应晶体管

    公开(公告)号：US07868374B2

    公开(公告)日：2011-01-11

    申请号：US12034899

    申请日：2008-02-21

    申请人： Kangguo Cheng ,  Lawrence A. Clevenger ,  Timothy J. Dalton ,  Louis L. Hsu ,  Jack A. Mandelman

    发明人： Kangguo Cheng ,  Lawrence A. Clevenger ,  Timothy J. Dalton ,  Louis L. Hsu ,  Jack A. Mandelman

    IPC分类号： H01L29/788

    CPC分类号： H01L27/108 ,  H01L27/10802 ,  H01L27/10826 ,  H01L29/66795 ,  H01L29/7841 ,  H01L29/7853

    摘要： An epitaxial semiconductor layer or a stack of a silicon germanium alloy layer and an epitaxial strained silicon layer is formed on outer sidewalls of a porous silicon portion on a substrate. The porous silicon portion and any silicon germanium alloy material are removed and a semitubular epitaxial semiconductor structure in a three-walled configuration is formed. A semitubular field effect transistor comprising inner and outer gate dielectric layers, an inner gate electrode, an outer gate electrode, and source and drain regions is formed on the semitubular epitaxial semiconductor structure. The semitubular field effect transistor may operate as an SOI transistor with a tighter channel control through the inner and outer gate electrodes, or as a memory device storing electrical charges in the body region within the semitubular epitaxial semiconductor structure.

    摘要翻译： 在衬底上的多孔硅部分的外侧壁上形成硅锗合金层和外延应变硅层的外延半导体层或叠层。 去除多孔硅部分和任何硅锗合金材料，并形成三壁结构的半管状外延半导体结构。 在半管外延半导体结构上形成包括内栅电介质层和外栅电介质层，内栅电极，外栅电极以及源极和漏极区的半管场效应晶体管。 半管场效应晶体管可以作为具有通过内部和外部栅极电极的更严格的沟道控制的SOI晶体管，或作为在半管外延半导体结构内的体区中存储电荷的存储器件。

    FLASH MEMORY GATE STRUCTURE FOR WIDENED LITHOGRAPHY WINDOW
    42.
    发明申请
    FLASH MEMORY GATE STRUCTURE FOR WIDENED LITHOGRAPHY WINDOW 失效
    闪存光栅窗口的闪存存储器门结构

    公开(公告)号：US20100052034A1

    公开(公告)日：2010-03-04

    申请号：US12198345

    申请日：2008-08-26

    申请人： Kangguo Cheng ,  Lawrence A. Clevenger ,  Timothy J. Dalton ,  Louis L. Hsu

    发明人： Kangguo Cheng ,  Lawrence A. Clevenger ,  Timothy J. Dalton ,  Louis L. Hsu

    IPC分类号： H01L21/336 ,  H01L29/788

    CPC分类号： H01L29/7881 ,  H01L29/66825

    摘要： A first portion of a semiconductor substrate belonging to a flash memory device region is recessed to a recess depth to form a recessed region, while a second portion of the semiconductor substrate belonging to a logic device region is protected with a masking layer. A first gate dielectric layer and a first gate conductor layer formed within the recessed region such that the first gate conductive layer is substantially coplanar with the top surfaces of the shallow trench isolation structures. A second gate dielectric layer, a second gate conductor layer, and a gate cap hard mask layer, each having a planar top surface, is subsequently patterned. The pattern of the gate structure in the flash memory device region is transferred into the first gate conductor layer and the first gate dielectric layer to form a floating gate and a first gate dielectric, respectively.

    摘要翻译： 属于闪存器件区域的半导体衬底的第一部分凹陷到凹陷深度以形成凹陷区域，而属于逻辑器件区域的半导体衬底的第二部分被掩蔽层保护。 形成在凹陷区域内的第一栅介质层和第一栅极导体层，使得第一栅极导电层与浅沟槽隔离结构的顶表面基本共面。 随后对第二栅介质层，第二栅极导体层和栅帽硬掩模层进行构图，每个具有平坦的顶表面。 闪存器件区域中的栅极结构的图案被转移到第一栅极导体层和第一栅极介电层中，以分别形成浮置栅极和第一栅极电介质。

    SEMITUBULAR METAL-OXIDE-SEMICONDUCTOR FIELD EFFECT TRANSISTOR
    47.
    发明申请
    SEMITUBULAR METAL-OXIDE-SEMICONDUCTOR FIELD EFFECT TRANSISTOR 有权
    半导体金属氧化物半导体场效应晶体管

    公开(公告)号：US20090212341A1

    公开(公告)日：2009-08-27

    申请号：US12034899

    申请日：2008-02-21

    申请人： Kangguo Cheng ,  Lawrence A. Clevenger ,  Timothy J. Dalton ,  Louis L. Hsu ,  Jack A. Mandelman

    发明人： Kangguo Cheng ,  Lawrence A. Clevenger ,  Timothy J. Dalton ,  Louis L. Hsu ,  Jack A. Mandelman

    IPC分类号： H01L29/788 ,  H01L21/336

    CPC分类号： H01L27/108 ,  H01L27/10802 ,  H01L27/10826 ,  H01L29/66795 ,  H01L29/7841 ,  H01L29/7853

    摘要： An epitaxial semiconductor layer or a stack of a silicon germanium alloy layer and an epitaxial strained silicon layer is formed on outer sidewalls of a porous silicon portion on a substrate. The porous silicon portion and any silicon germanium alloy material are removed and a semitubular epitaxial semiconductor structure in a three-walled configuration is formed. A semitubular field effect transistor comprising inner and outer gate dielectric layers, an inner gate electrode, an outer gate electrode, and source and drain regions is formed on the semitubular epitaxial semiconductor structure. The semitubular field effect transistor may operate as an SOI transistor with a tighter channel control through the inner and outer gate electrodes, or as a memory device storing electrical charges in the body region within the semitubular epitaxial semiconductor structure.

    摘要翻译： 在衬底上的多孔硅部分的外侧壁上形成硅锗合金层和外延应变硅层的外延半导体层或叠层。 去除多孔硅部分和任何硅锗合金材料，并形成三壁结构的半管状外延半导体结构。 在半管外延半导体结构上形成包括内栅电介质层和外栅电介质层，内栅电极，外栅电极以及源极和漏极区的半管场效应晶体管。 半管场效应晶体管可以作为具有通过内部和外部栅极电极的更严格的沟道控制的SOI晶体管，或作为在半管外延半导体结构内的体区中存储电荷的存储器件。