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    Method of fabricating a wafer with strained channel layers for increased electron and hole mobility for improving device performance
    47.
    发明授权
    Method of fabricating a wafer with strained channel layers for increased electron and hole mobility for improving device performance 有权
    制造具有应变通道层的晶片以提高电子和空穴迁移率以提高器件性能的方法

    公开(公告)号：US07312136B2

    公开(公告)日：2007-12-25

    申请号：US10899270

    申请日：2004-07-26

    申请人： Chien-Chao Huang ,  Yee-Chia Yeo ,  Kuo-Nan Yang ,  Chun-Chieh Lin ,  Chenming Hu

    发明人： Chien-Chao Huang ,  Yee-Chia Yeo ,  Kuo-Nan Yang ,  Chun-Chieh Lin ,  Chenming Hu

    IPC分类号： H01L21/20

    CPC分类号： H01L21/3247 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/02658 ,  H01L21/02664 ,  H01L21/324 ,  H01L21/76259 ,  H01L29/1054

    摘要： A method for making a SOI wafer with a strained silicon layer for increased electron and hole mobility is achieved. The method forms a porous silicon layer on a seed wafer. A H2 anneal is used to form a smooth surface on the porous silicon. A strain free (relaxed) epitaxial SixGe1-x layer is deposited and a bonding layer is formed. The seed wafer is then bonded to a handle wafer having an insulator on the surface. A spray etch is used to etch the porous Si layer resulting in a SOI handle wafer having portions of the porous Si layer on the relaxed SixGe1-x. The handle wafer is then annealed in H2 to convert the porous Si to a smooth strained Si layer on the relaxed SiGe layer of the SOI wafer.

    摘要翻译： 实现了制造具有用于增加电子和空穴迁移率的应变硅层的SOI晶片的方法。 该方法在种子晶片上形成多孔硅层。 使用H 2 H 2退火在多孔硅上形成光滑表面。 沉积无应变的（松弛的）外延的Si 1 x 1-x层，并形成结合层。 然后将种子晶片结合到在表面上具有绝缘体的手柄晶片。 使用喷涂蚀刻来蚀刻多孔Si层，导致SOI处理晶片，其具有在松弛的Si 1 x 1-x x上的多孔Si层的部分。 然后将手柄晶片在H 2 2中退火以将多孔Si转化为SOI晶片的松弛SiGe层上的平滑应变Si层。

    Strain balanced structure with a tensile strained silicon channel and a compressive strained silicon-germanium channel for CMOS performance enhancement
    50.
    发明授权
    Strain balanced structure with a tensile strained silicon channel and a compressive strained silicon-germanium channel for CMOS performance enhancement 有权
    应变平衡结构具有拉伸应变硅通道和压缩应变硅 - 锗通道，用于CMOS性能提升

    公开(公告)号：US07238989B2

    公开(公告)日：2007-07-03

    申请号：US11201990

    申请日：2005-08-11

    申请人： Yee-Chia Yeo ,  Chun-Chieh Lin ,  Fu-Liang Yang ,  Mong-Song Liang ,  Chenming Hu

    发明人： Yee-Chia Yeo ,  Chun-Chieh Lin ,  Fu-Liang Yang ,  Mong-Song Liang ,  Chenming Hu

    IPC分类号： H01L27/01

    CPC分类号： H01L29/1054 ,  H01L21/84 ,  H01L27/1203

    摘要： A method of fabricating a CMOS device wherein mobility enhancement of both the NMOS and PMOS elements is realized via strain induced band structure modification, has been developed. The NMOS element is formed featuring a silicon channel region under biaxial strain while the PMOS element is simultaneously formed featuring a SiGe channel region under biaxial compressive strain. A novel process sequence allowing formation of a thicker silicon layer overlying a SiGe layer, allows the NMOS channel region to exist in the silicon layer overlying a SiGe layer, allows the NMOS channel region to exist in the silicon layer which is under biaxial tensile strain enhancing electron mobility. The same novel process sequence results in the presence of a thinner silicon layer, overlying the same SiGe layer in the PMOS region, allowing the PMOS channel region to exist in the biaxial compressively strained SiGe layer, resulting in hole mobility enhancement.

    摘要翻译： 已经开发了通过应变诱导带结构修改来实现NMOS和PMOS元件的迁移率增强的CMOS器件的制造方法。 NMOS元件形成为具有双轴应变下的硅沟道区，同时形成在双轴压缩应变下具有SiGe沟道区的PMOS元件。 允许形成覆盖SiGe层的较厚硅层的新颖工艺顺序允许NMOS沟道区存在于覆盖SiGe层的硅层中，允许NMOS沟道区存在于双层拉伸应变增强下的硅层中 电子迁移率。 相同的新工艺序列导致存在较薄的硅层，覆盖PMOS区域中相同的SiGe层，允许PMOS沟道区存在于双轴压缩应变SiGe层中，导致空穴迁移率增强。