摘要:
Unit cells of metal oxide semiconductor (MOS) transistors are provided having an integrated circuit substrate and a MOS transistor on the integrated circuit substrate. The MOS transistor includes a source region, a drain region and a gate. The gate is between the source region and the drain region. A channel region is provided between the source and drain regions. The channel region has a recessed region that is lower than bottom surfaces of the source and drain regions. Related methods of fabricating transistors are also provided.
摘要:
A semiconductor device includes a semiconductor substrate having a recess therein. A gate insulator is disposed on the substrate in the recess. The device further includes a gate electrode including a first portion on the gate insulator in the recess and a second reduced-width portion extending from the first portion. A source/drain region is disposed in the substrate adjacent the recess. The recess may have a curved shape, e.g., may have hemispherical or ellipsoid shape. The source/drain region may include a lighter-doped portion adjoining the recess. Relate fabrication methods are also discussed.
摘要:
A self-aligned contact structure and a method of forming the same include selected neighboring gate electrodes with adjacent sidewalls that are configured to angle toward each other. The angled surfaces of the gate electrodes can be protected using a liner layer that can extend the length of the contact window to define the sidewalls of the contact window.
摘要:
Integrated circuit field effect transistor devices include a substrate having a surface and an active channel pattern on the surface. The active channel pattern includes channels that are stacked upon one another and are spaced apart from one another to define at least one tunnel between adjacent channels. A gate electrode surrounds the channels and extends through the at least one tunnel. A pair of source/drain regions also is provided. Integrated circuit field effect transistors are manufactured, by forming a pre-active pattern on a surface of a substrate. The pre-active pattern includes a series of interchannel layers and channel layers stacked alternately upon each other. Source/drain regions are formed on the substrate at opposite ends of the pre-active pattern. The interchannel layers are selectively removed to form tunnels. A gate electrode is formed in the tunnels and surrounding the channels.
摘要:
A recess gate-type semiconductor device includes a gate electrode having a recessed portion at least partially covering a recess trench in an active region, and source/drain regions disposed in the active region that are separated by the gate electrode. The recess trench is separated from sidewalls of a device isolation region in a first direction and contacts sidewalls of the device isolation region in a second direction. The width of the recess trench of the active region in the second direction may be greater than the width of the source/drain regions in the second direction, and the recessed portion of the gate electrode may have tabs protruding in the first direction at its corners. Therefore, the semiconductor device has excellent junction leakage current and excellent refresh characteristics.
摘要:
Integrated circuit field effect transistor devices include a substrate having a surface and an active channel pattern on the surface. The active channel pattern includes channels that are stacked upon one another and are spaced apart from one another to define at least one tunnel between adjacent channels. A gate electrode surrounds the channels and extends through the at least one tunnel. A pair of source/drain regions also is provided. Integrated circuit field effect transistors are manufactured, by forming a pre-active pattern on a surface of a substrate. The pre-active pattern includes a series of interchannel layers and channel layers stacked alternately upon each other. Source/drain regions are formed on the substrate at opposite ends of the pre-active pattern. The interchannel layers are selectively removed to form tunnels. A gate electrode is formed in the tunnels and surrounding the channels.
摘要:
In the present invention, an apparatus of testing a leakage protection reliability of an integrated circuit interconnection. The apparatus has at least one comb-like pattern, a serpentine-like pattern and means of applying a bias to the patterns and forms a maximum field region at an interconnection formed around a via, i.e., at the end of a tooth portion composing the comb-like pattern. In one structure of the present invention, the comb-like pattern is formed at one level, and the serpentine-like pattern has a plurality of unit parts corresponding to the tooth portions, respectively, and connection parts connecting the neighboring two unit parts. Each of the unit parts is formed at the same level with the comb-like pattern and spaced apart from the tooth portion by a minimum design length according to a design rule. The unit part has vias formed through an interlayer dielectric layer at the both ends of a tooth parallel part, two tooth parallel parts connected with the vias, respectively, and a length parallel part electrically connecting two tooth parallel parts.
摘要:
In the present invention, an apparatus of testing leakage current protection reliability of an integrated circuit interconnection. The apparatus has at least one comb-like pattern composed of a length portion, multiple tooth portions which are connected orthogonally to the length portion, and vias which are formed vertically from the ends of the tooth portions, respectively, through an interlayer dielectric layer. Additionally the apparatus has a serpentine-like pattern including a length parallel part or a connection part which is running parallel to the length portion, a tooth parallel part which is parallel to the tooth portion and formed at a level different from the level of the connection part or the length parallel part, and vias connecting them. The via of the comb-like pattern is located at the central position between the neighboring two vias of the serpentine-like pattern. The apparatus also has pads for applying a defined bias voltage to the comb-like pattern and the serpentine-like pattern to generate a potential difference between the two patterns. Thus, as multiple weak field regions are formed at the region where the vias are positioned, it is possible to find a failed spot such as a leakage or a short through the apparatus easily and effectively.
摘要:
The present invention provides an integrated printer driver including a plurality of printer drivers which are produced in various types to satisfy various computer environments. The integrated printer driver automatically changes printer drivers when printing error occurs. The method for automatically changing the printer drivers comprises steps of determining the type of a printing error on occurrence, changing a preset printer driver to another appropriate printer driver of a plurality of printer drivers in a stored integrated printer driver in order to overcome the error corresponding to the determination, and setting the changed printer driver in order to enable the printer to recognize the printer driver.