公开(公告)号：US20160162624A1

公开(公告)日：2016-06-09

申请号：US14685701

申请日：2015-04-14

Applicant: GLOBALFOUNDRIES, Inc.

Inventor： Lei Sun ,  Wenhui Wang ,  Ryan Ryoung-Han Kim

IPC: G06F17/50 ,  G03F1/22 ,  G03F1/70 ,  H01L21/027

CPC classification number: G03F1/22 ,  G03F1/36 ,  G03F7/2045 ,  G06F17/5081 ,  H01L21/0274

Abstract: A method of optical proximity correction (OPC) in extreme ultraviolet lithography (EUV) lithography includes providing a patterned layout design including first and second design polygons that correspond with the pre-pattern opening, wherein the first and second design polygons are separated by a separation distance, and correcting the patterned layout design using OPC by generating (1) a third polygon that has dimensions corresponding to a combination of the first and second design polygons and the separation distance and (2) and filled polygon within the third polygon, thereby generating an OPC-corrected patterned layout design. EUV photomasks may be manufactured from the OPC-corrected patterned layout design, and integrated circuits may be fabricated using such EUV photomasks.

Abstract translation: 在极紫外光刻（EUV）光刻中的光学邻近校正（OPC）的方法包括提供图案化布局设计，其包括与预图案开口对应的第一和第二设计多边形，其中第一和第二设计多边形通过分离 距离，并且通过生成（1）具有对应于第一和第二设计多边形和分离距离的组合的尺寸的第三多边形以及（2）和第三多边形内的填充多边形来校正图案化布局设计，从而生成 OPC校正图案布局设计。 EUV光掩模可以由OPC校正的图案化布局设计制造，并且可以使用这种EUV光掩模来制造集成电路。

公开(公告)号：US09298081B2

公开(公告)日：2016-03-29

申请号：US13790727

申请日：2013-03-08

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Lei Sun ,  Obert Reeves Wood, II

IPC: G03F1/24 ,  G02B5/20 ,  G02B5/22 ,  G02B5/02

CPC classification number: G03F1/24 ,  G02B5/0242 ,  G02B5/208 ,  G02B5/22

Abstract: A scattering enhanced thin absorber for a EUV reticle and a method of making thereof is disclosed. Embodiments include forming a multilayer on the upper surface of a substrate, forming a capping layer over the multilayer, forming one or more diffuse scattering layers over the capping layer, and etching the diffuse scattering layers to form a stack.

Abstract translation: 公开了一种用于EUV掩模版的散射增强型薄吸收体及其制造方法。 实施例包括在衬底的上表面上形成多层，在多层上形成覆盖层，在覆盖层上形成一个或多个漫散射层，并蚀刻扩散散射层以形成叠层。

公开(公告)号：US09140975B2

公开(公告)日：2015-09-22

申请号：US14106219

申请日：2013-12-13

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Lei Sun ,  Chanro Park ,  Wenhui Wang ,  Hui Zang

IPC: G03F1/62 ,  G03F1/64 ,  G03F1/00 ,  G03F1/22

CPC classification number: G03F1/142 ,  G03F1/22 ,  G03F1/62 ,  G03F1/64

Abstract: A method of forming an improved EUV mask and pellicle with airflow between the area enclosed by the mask and pellicle and the area outside the mask and pellicle and the resulting device are disclosed. Embodiments include forming a frame around a patterned area on an EUV mask; forming a membrane over the frame; and forming holes in the frame.

Abstract translation: 公开了一种在由掩模和防护薄膜组成的区域与掩模和防护薄膜之间的区域以及所得到的装置之间形成改进的EUV掩模和防护薄膜组件的方法。 实施例包括在EUV掩模上的图案化区域周围形成框架; 在框架上形成膜; 并在框架中形成孔。

公开(公告)号：US20190278166A1

公开(公告)日：2019-09-12

申请号：US15915280

申请日：2018-03-08

Applicant: GLOBALFOUNDRIES INC.

Inventor： Lei Sun ,  Guoxiang Ning ,  Lloyd C. Litt

IPC: G03F1/58 ,  H01L21/027 ,  G03F1/64 ,  G03F7/20 ,  G03F1/22

Abstract: Disclosed is a reticle with multiple different sets of redundant mask patterns. Each set allows for patterning of a layer at a specific level of an integrated circuit (IC) chip design on a target region of a wafer using a vote-taking technique to avoid defects. The different sets further allow the same reticle to be used to pattern layers at different levels in the same IC chip design or to pattern layers at the same level or at different levels in different IC chip designs. Each mask pattern is individually framed with alignment marks to facilitate alignment minimize overlay errors. Optionally, redundant mask patterns in the same set are distributed across the reticle (as opposed to being located within the same general area) in order to minimize reticle overheating during patterning using the vote-taking technique. Also disclosed are a photolithography system and a photolithography method that employ such a reticle.

公开(公告)号：US10283505B2

公开(公告)日：2019-05-07

申请号：US15418996

申请日：2017-01-30

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Wenhui Wang ,  Ryan Ryoung-han Kim ,  Linus Jang ,  Jason Cantone ,  Lei Sun ,  Seowoo Nam

IPC: H01L23/52 ,  H01L27/092 ,  H01L21/8238 ,  H01L29/66 ,  H01L29/06 ,  H01L23/528 ,  H01L21/02 ,  H01L21/321 ,  H01L27/02 ,  H01L29/49

Abstract: Process of using a dummy gate as an interconnection and a method of manufacturing the same are disclosed. Embodiments include forming on a semiconductor substrate dummy gate structures at cell boundaries, each dummy gate structure including a set of sidewall spacers and a cap disposed between the sidewall spacers; removing a first sidewall spacer or at least a portion of a first cap on a first side of a first dummy gate structure and forming a first gate contact trench over the first dummy gate structure; and filling the first gate contact trench with a metal to form a first gate contact.

公开(公告)号：US10236215B1

公开(公告)日：2019-03-19

申请号：US15791711

申请日：2017-10-24

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ruilong Xie ,  Youngtag Woo ,  Daniel Chanemougame ,  Bipul C. Paul ,  Lars W. Liebmann ,  Heimanu Niebojewski ,  Xuelian Zhu ,  Lei Sun ,  Hui Zang

IPC: H01L21/8234 ,  H01L21/768 ,  H01L23/522 ,  H01L27/088 ,  H01L23/528

Abstract: One illustrative method disclosed includes, among other things, forming an initial gate-to-source/drain (GSD) contact structure and an initial CB gate contact structure, wherein an upper surface of each of these contact structures are positioned at a first level. In one example, this method also includes forming a masking layer that covers the initial CB gate contact structure and exposes the initial GSD contact structure and, with the masking layer in position, performing a recess etching process on the initial GSD contact structure so as to form a recessed GSD contact structure, wherein a recessed upper surface of the recessed GSD contact structure is positioned at a second level that is below the first level.

公开(公告)号：US09435921B2

公开(公告)日：2016-09-06

申请号：US13958190

申请日：2013-08-02

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Lei Sun ,  Obert Reeves Wood, II

IPC: G02B5/20 ,  G02B1/12

CPC classification number: G02B5/20 ,  G02B1/12 ,  G02B5/203

Abstract: A novel blazed grating spectral filter disclosed herein includes a multilayer stack of materials that is formed on a wedge-shaped substrate wherein the upper surface of the substrate is oriented at an angle relative the bottom surface of the substrate and wherein the angle corresponds to the blaze angle of the blazed grating filter. Various methods of forming such a filter are also disclosed such as, for example, performing a planarization process in a CMP tool to define the wedge-shaped substrate, thereafter forming the multilayer stack of materials above the upper planarized surface of the substrate and etching recesses into the multilayer stack.

Abstract translation: 本文公开的新型闪耀光栅光谱滤波器包括形成在楔形衬底上的多层材料堆叠，其中衬底的上表面相对于衬底的底表面以一定角度取向，并且其中该角度对应于火焰 闪光光栅滤光片的角度。 还公开了形成这种滤光器的各种方法，例如，在CMP工具中执行平坦化处理以限定楔形基板，之后在基板的上平面化表面上方形成多层堆叠的材料，并且蚀刻凹槽 进入多层堆叠。