公开(公告)号：US08030994B2

公开(公告)日：2011-10-04

申请号：US12093793

申请日：2006-11-08

申请人： Gian Hoogzaad

发明人： Gian Hoogzaad

IPC分类号： H03F3/38 ,  H03K3/00

CPC分类号： H02M7/53871 ,  G11B19/20 ,  G11B19/2009 ,  H02M2003/1555 ,  H02M2007/53878 ,  H02P25/034

摘要： A driver supplies an output voltage to an inductive load. The driver includes an input to receive a pulse width modulated control signal having a controllable duty cycle within a predetermined range. A first switch circuit receives a first switch signal to supply a first voltage, a second switch circuit receives a second switch signal to supply a second voltage, and the output voltage is the difference between the first voltage and the second voltage. An inverter and delay circuit receives the control signal to supply the first switch signal and the second switch signal being inverted and delayed with respect to each other. The delay of the delay circuit is selected to obtain an output voltage having a single polarity for each one of the controllable duty cycles within the predetermined range.

摘要翻译： 驱动器向感性负载提供输出电压。 驱动器包括用于接收在预定范围内具有可控占空比的脉宽调制控制信号的输入。 第一开关电路接收第一开关信号以提供第一电压，第二开关电路接收第二开关信号以提供第二电压，并且输出电压是第一电压和第二电压之间的差。 反相器和延迟电路接收控制信号以提供第一开关信号并且第二开关信号相对于彼此反相和延迟。 选择延迟电路的延迟以获得在预定范围内的每个可控占空比的单个极性的输出电压。

公开(公告)号：US20110031816A1

公开(公告)日：2011-02-10

申请号：US12846697

申请日：2010-07-29

申请人： Henricus Cornelis Johannes Buthker ,  Klaas de Waal ,  Hendrik Johannes Bergveld ,  Gian Hoogzaad ,  Franciscus A. C. M. Schoofs

发明人： Henricus Cornelis Johannes Buthker ,  Klaas de Waal ,  Hendrik Johannes Bergveld ,  Gian Hoogzaad ,  Franciscus A. C. M. Schoofs

IPC分类号： H02J1/00

CPC分类号： H02J7/35 ,  H01L31/02021 ,  Y02E10/566 ,  Y10T307/707

摘要： A photovoltaic unit is disclosed comprising a plurality of sub-units connected in series, each sub-unit having a main input and a main output, which main output is connected to the respective main input of a neighbouring sub-unit, each sub-unit further comprising a segment comprising one or more series-connected solar cells, and a supplementary power unit, wherein the supplementary power unit is configured to at least one of receive power from or supply power to the neighbouring sub-unit. The supplementary power unit is preferably a DC-DC converter, and arranged to exchange energy between neighbouring segments, without requiring a high-voltage connection across the complete string (of more than 2 segments). The converter may be inductive or capacitive.A DC-DC converter configured for use in such a unit is also disclosed, as is a method of controlling such a photovoltaic unit.

摘要翻译： 公开了包括串联连接的多个子单元的光电单元，每个子单元具有主输入和主输出，主输出连接到相邻子单元的相应主输入，每个子单元 还包括包括一个或多个串联连接的太阳能电池的区段和辅助功率单元，其中所述辅助功率单元被配置为从所述相邻子单元接收功率或向相邻子单元供电。 附加功率单元优选地是DC-DC转换器，并且被布置成在相邻段之间交换能量，而不需要跨整个串（超过2个段）的高压连接。 转换器可以是电感的或电容的。 还公开了一种配置用于这种单元的DC-DC转换器，以及控制这种光伏单元的方法。

公开(公告)号：US20090315490A1

公开(公告)日：2009-12-24

申请号：US12307283

申请日：2007-07-03

申请人： Gian Hoogzaad

发明人： Gian Hoogzaad

IPC分类号： H02P3/14

CPC分类号： H02P23/20

摘要： The invention is directed to a method for controlling a deceleration process of a DC motor (20), wherein the DC motor (20) is driven by a bridge driver (18) coupled to a power supply (12) intended to provide a supply voltage VDD at a power supply output (14), the method comprising the following steps: applying a deceleration PWM signal to the bridge driver (18) for decelerating the DC motor (20), and controlling the bridge driver (18) such that a motor-induced back current is reduced, if the voltage at the power supply output (14) exceeds a voltage threshold which is higher than VDD. In accordance with the invention the step of controlling the bridge driver (18) such that a motor-induced back current is reduced, if the voltage at the power supply output (14) exceeds a voltage threshold which is higher than VDD comprises: if the voltage at the power supply output exceeds the voltage threshold, changing stepwise the pulse width of the deceleration PWM signal in a first direction until the voltage at the power supply (14) output reaches or falls below the voltage threshold, and then, if the voltage at the power supply output (14) has fallen below the voltage threshold, changing stepwise the pulse width of the deceleration PWM signal in a second direction opposite to the first direction until the voltage at the power supply output (14) again reaches or exceeds the voltage threshold. The invention is also directed to a controller suitable to carry out the above method.

摘要翻译： 本发明涉及一种用于控制直流电动机（20）的减速过程的方法，其中直流电动机（20）由连接到电源（12）的桥式驱动器（18）驱动，所述电源驱动器（18）旨在提供电源电压 VDD处于电源输出端（14），该方法包括以下步骤：向桥式驱动器（18）施加减速PWM信号，以减速直流电动机（20），并控制桥式驱动器（18），使电动机 如果电源输出（14）的电压超过VDD的电压阈值，则降低反向电流。 如果电源输出（14）处的电压超过高于VDD的电压阈值，则根据本发明，控制电桥驱动器（18）的步骤使得电机引起的反向电流降低，如果 电源输出端的电压超过电压阈值，逐步改变减速PWM信号的脉冲宽度，直到电源（14）输出端的电压达到或低于电压阈值，然后如果电压 在电源输出（14）下降到低于电压阈值的情况下，在与第一方向相反的第二方向上逐步改变减速PWM信号的脉冲宽度，直到电源输出（14）的电压再次达到或超过 电压阈值。 本发明还涉及一种适用于执行上述方法的控制器。

公开(公告)号：US20090045764A1

公开(公告)日：2009-02-19

申请号：US12093793

申请日：2006-11-08

申请人： Gian Hoogzaad

发明人： Gian Hoogzaad

IPC分类号： H03K3/00 ,  H02P7/06

CPC分类号： H02M7/53871 ,  G11B19/20 ,  G11B19/2009 ,  H02M2003/1555 ,  H02M2007/53878 ,  H02P25/034

摘要： A driver (1) supplies an output voltage (VL) to an inductive load (30). The driver comprises an input to receive a pulse width modulated control signal (CS) having a controllable duty cycle within a predetermined range. A first switch circuit (10) receives a first switch signal (CS; ICS) to supply a first voltage (V1), a second switch circuit (13) receives a second switch signal (DCS; CSD) to supply a second voltage (V2), and the output voltage (VL) is the difference between the first voltage (V1) and the second voltage (V2). An inverter (11; 15) and delay circuit (12; 16) receives the control signal (CS) to supply the first switch signal (CS; ICS) and the second switch signal (DCS; CSD) being inverted and delayed with respect to each other. The delay (dT) of the delay circuit (12; 16) is selected to obtain an output voltage having a single polarity for each one of said controllable duty cycles within the predetermined range.

摘要翻译： 驱动器（1）向感性负载（30）提供输出电压（VL）。 驱动器包括用于接收在预定范围内具有可控占空比的脉宽调制控制信号（CS）的输入。 第一开关电路（10）接收第一开关信号（CS; ICS）以提供第一电压（V1），第二开关电路（13）接收第二开关信号（DCS; CSD）以提供第二电压（V2 ），并且输出电压（VL）是第一电压（V1）和第二电压（V2）之间的差。 逆变器（11; 15）和延迟电路（12; 16）接收控制信号（CS）以提供第一开关信号（CS; ICS）和第二开关信号（DCS; CSD）相对于 彼此。 选择延迟电路（12; 16）的延迟（dT）以在预定范围内获得对于所述可控占空比中的每一个具有单个极性的输出电压。

公开(公告)号：US20080198498A1

公开(公告)日：2008-08-21

申请号：US11915634

申请日：2006-05-17

申请人： Joop Van Bijnen ,  Gian Hoogzaad

发明人： Joop Van Bijnen ,  Gian Hoogzaad

IPC分类号： G11B15/18

CPC分类号： G11B19/26

摘要： Method and apparatus for controlling the rotation velocity of an optical disc in a wide range of velocities, including low velocities. In a first range of velocities, a first sensor, for example an EMF sensor, is used to control the commutation moments of a turntable motor. For velocities outside the first range, a periodic control signal based on a periodic second signal generated by a second sensor and a mapping between the first and second periodic signal are used. The method and the apparatus are suitable for LightScribe™ applications.

摘要翻译： 用于在宽的速度范围内控制光盘的旋转速度的方法和装置，包括低速度。 在第一速度范围内，使用第一传感器（例如EMF传感器）来控制转盘马达的换向力矩。 对于超出第一范围的速度，使用基于由第二传感器产生的周期性第二信号的周期性控制信号和第一和第二周期信号之间的映射。 该方法和设备适用于LightScribe（TM）应用。

公开(公告)号：US07236594B2

公开(公告)日：2007-06-26

申请号：US10188139

申请日：2002-07-02

申请人： Robert Henrikus Margaretha Van Veldhoven ,  Gian Hoogzaad

发明人： Robert Henrikus Margaretha Van Veldhoven ,  Gian Hoogzaad

IPC分类号： H04L9/00

CPC分类号： H03K3/84

摘要： A pseudo random generator comprising a shift register comprising a first flip flop (F0) and n further flip-flops (F1 . . . Fn) each flip-flop (F0) having a D input, a non-inverting output, an inverting output, and a common clock (fclk) input and the first flip-flop (F0) having a set input, each of the non-inverting outputs being connected via a NOR gate (10) to the set input of the first flip-flop (F0) and each of the non-inverting outputs of the flip-flops (F0 . . . Fn) being connected to the input of the first flip-flop (F0) via an XOR gate (11), characterised in that the generator comprises at least one additional logic gate (13, 14, 15; 17, 18, 19) including at least one additional flip-flop (14;18).The extra logic gates may comprise gated to toggle between the inverting end and the non-inverting outputs, or to generate an extra ‘0’ at the output or to chop, preferably randomly, the input signal.

摘要翻译： 一种伪随机生成器，包括：移位寄存器，包括具有D输入的每个触发器（F 0）和非反相输出的第一触发器（F0）和n个另外的触发器（F 1 ... Fn） 反相输出和公共时钟（fclk）输入和具有设定输入的第一触发器（F0），每个非反相输出端经由或非门（10）连接到第一 触发器（F 0）和触发器的每个非反相输出（F0 ... Fn）经由异或门（11）连接到第一触发器（F 0）的输入端， 其特征在于，所述发生器包括至少一个包括至少一个附加触发器（14; 18）的附加逻辑门（13,14,15,17,18,19）。 额外的逻辑门可以包括门控以在反相端和非反相输出之间切换，或者在输出处产生额外的“0”或者优选地随机输入输入信号。

公开(公告)号：US09263955B2

公开(公告)日：2016-02-16

申请号：US14342724

申请日：2012-09-03

申请人： Markus Schmid ,  Johann Baptist Daniel Kuebrich ,  Thomas Antonius Duerbaum ,  Hans Halberstadt ,  Gian Hoogzaad ,  Frans Pansier

发明人： Markus Schmid ,  Johann Baptist Daniel Kuebrich ,  Thomas Antonius Duerbaum ,  Hans Halberstadt ,  Gian Hoogzaad ,  Frans Pansier

IPC分类号： H02M3/156 ,  H02M3/335 ,  H02M1/08 ,  H02M1/00

CPC分类号： H02M3/33507 ,  H02M1/08 ,  H02M3/33523 ,  H02M2001/0032 ,  H02M2001/0035 ,  H02M2001/0054 ,  H02M2001/0058 ,  Y02B70/1491 ,  Y02B70/16

摘要： A method is disclosed of controlling a switched mode converter comprising a switch and for providing power to device having a load, comprising: in response to the load exceeding a first threshold, operating in a first mode, being a CCM; in response to the load exceeding a second threshold and not exceeding the first threshold, operating in second mode, being a BCM without valley skipping wherein the switching frequency increases with decreasing load; in response to the load exceeding a third threshold and not exceeding the second threshold, operating in a third mode, being a BCM with valley skipping, wherein the switching frequency depends on the load and the number of valleys skipped and is between a fixed upper and a lower switching frequency limit; and in response to the load not exceeding the third threshold, operating in a fourth mode, being a BCM with valley skipping, wherein the switching frequency depends on at least the load, and is between an upper and a lower switching frequency limit wherein the upper switching frequency limit decreases with decreasing load. A switched mode converter controlled by such a method is also disclosed.

摘要翻译： 公开了一种控制包括开关并用于向具有负载的装置提供电力的开关模式转换器的方法，包括：响应于所述负载超过第一阈值，以第一模式操作，为CCM; 响应于所述负载超过第二阈值且不超过所述第一阈值，在第二模式下操作，所述BCM不具有谷跳跃，其中所述开关频率随负载减小而增加; 响应于超过第三阈值并且不超过第二阈值的负载，以第三模式操作，作为具有谷跳跃的BCM，其中开关频率取决于跳过的负载和谷数，并且在固定的上限和 低开关频率限制; 并且响应于不超过第三阈值的负载，以第四模式操作，作为具有谷跳跃的BCM，其中开关频率至少取决于负载，并且处于上和下开关频率极限之间，其中上部 开关频率限制随负载减小而减小。 还公开了通过这种方法控制的开关模式转换器。

公开(公告)号：US20130175929A1

公开(公告)日：2013-07-11

申请号：US13544854

申请日：2012-07-09

申请人： Gian Hoogzaad

发明人： Gian Hoogzaad

IPC分类号： H05B37/02

CPC分类号： H05B37/02 ,  H05B33/0818 ,  H05B33/083 ,  Y02B20/347

摘要： Consistent with an example embodiment there is a method for regulating a LED current (ILED) flowing through a LED circuit arrangement at a mean LED current level. The method includes establishing an oscillating converter current (IL), establishing a first and a second current control indicator representative of a flow of a converter current (IL); regulating a peak and valley current level of the converter current in dependence on the first current control indicator; controlling a converter current period (T) of an oscillation of the converter current in dependence on the second current control indicator to be within a period control range (Tref) and feeding at least part of the converter current to the LED circuit arrangement.

摘要翻译： 与示例性实施例一致，存在一种用于调节以平均LED电流水平流过LED电路装置的LED电流（ILED）的方法。 该方法包括建立振荡转换器电流（IL），建立表示转换器电流（IL）的流动的第一和第二电流控制指示符; 根据第一电流控制指示器调节转换器电流的峰谷电流电平; 根据第二电流控制指示器将转换器电流的振荡的转换器电流周期（T）控制在周期控制范围（Tref）内，并将至少部分转换器电流馈送到LED电路装置。

公开(公告)号：US08471637B2

公开(公告)日：2013-06-25

申请号：US13368372

申请日：2012-02-08

申请人： Gian Hoogzaad

发明人： Gian Hoogzaad

IPC分类号： H03G3/10

CPC分类号： H03G1/0088 ,  H03F1/22 ,  H03F3/19 ,  H03F3/50 ,  H03F2200/144 ,  H03F2200/211 ,  H03F2200/405 ,  H03F2200/411 ,  H03F2203/5018

摘要： The invention relates to a variable gain amplifier comprising a first attenuator (1) for receiving an input signal (rf_in) and for transmitting a first attenuated input signal to a first amplifier (2) for amplifying the first attenuated input signal and for generating a first amplified signal to a second attenuator (3) for attenuating the first amplified signal and for transmitting a second attenuated signal to a second amplifier (4) for amplifying the second attenuated signal and for generating an output signal (rf_out). The first attenuator (1) is supplied from a first supply voltage source (10). The second attenuator (3) is supplied from a second supply voltage source (30). The first amplifier (2) is supplied from a third supply voltage source (20), and the second amplifier (4) is supplied from a fourth supply voltage source (40).

摘要翻译： 本发明涉及一种可变增益放大器，包括用于接收输入信号（rf_in）的第一衰减器（1）和用于将第一衰减输入信号发送到第一放大器（2），用于放大第一衰减输入信号并产生第一衰减输入信号 放大信号到第二衰减器（3），用于衰减第一放大信号并将第二衰减信号发送到第二放大器（4），用于放大第二衰减信号并产生输出信号（rf_out）。 第一衰减器（1）由第一电源电压源（10）提供。 第二衰减器（3）由第二电源电压源（30）提供。 第一放大器（2）由第三电源电压源（20）提供，第二放大器（4）由第四电源电压源（40）提供。

公开(公告)号：US08441237B2

公开(公告)日：2013-05-14

申请号：US12981142

申请日：2010-12-29

申请人： Markus Schmid ,  Johann Baptist Daniel Kuebrich ,  Thomas Antonius Duerbaum ,  Gian Hoogzaad ,  Peter Laro ,  Frans Pansier

发明人： Markus Schmid ,  Johann Baptist Daniel Kuebrich ,  Thomas Antonius Duerbaum ,  Gian Hoogzaad ,  Peter Laro ,  Frans Pansier

IPC分类号： G05F1/652 ,  G05F1/656

CPC分类号： H02M1/4208 ,  Y02B70/126

摘要： Consistent with an example embodiment, a circuit comprises a power factor correction stage having a DC input, a ground input, a DC output and a ground output. The circuit further includes a capacitor; a diode; and a discharge circuit. A first terminal of the diode is connected to an input of the power factor correction stage, a second terminal of the diode is connected to the first plate of the capacitor; and the second plate of the capacitor is connected to the other input of the PFC stage. The discharge circuit is connected to the capacitor and is configured to discharge the capacitor such that it contributes to the output of the PFC stage when the level of a signal at the input of the PFC stage falls below a threshold value.

摘要翻译： 与示例实施例一致，电路包括具有DC输入，接地输入，DC输出和接地输出的功率因数校正级。 电路还包括电容器; 二极管 和放电电路。 二极管的第一端子连接到功率因数校正级的输入端，二极管的第二端子连接到电容器的第一板; 并且电容器的第二板连接到PFC级的另一个输入端。 放电电路连接到电容器，并且被配置为放电电容器，使得当PFC级的输入端的信号电平低于阈值时，它有助于PFC级的输出。