Abstract:
A method for producing a semiconductor device is provided. The method includes providing a wafer including a main surface and a silicon layer arranged at the main surface and having a nitrogen concentration of at least about 3*1014 cm−3, and partially out-diffusing nitrogen to reduce the nitrogen concentration at least close to the main surface. Further, a semiconductor device is provided.
Abstract translation:提供一种半导体器件的制造方法。 该方法包括提供包括主表面和布置在主表面上并且具有至少约3×10 14 cm -3的氮浓度的硅层的晶片,并且部分地扩散氮以将氮浓度降低至少接近 主表面。 此外,提供了一种半导体器件。
Abstract:
A method of manufacturing a semiconductor body includes forming a pattern at a first side of a substrate, forming a semiconductor layer on the first side of the substrate, attaching the substrate and the semiconductor layer to a carrier via a surface of the semiconductor layer, and removing the substrate from a second side opposite to the first side.
Abstract:
In accordance with an embodiment, a gas sensor includes a substrate having a cavity for providing an optical interaction path; a thermal emitter configured to emit broadband IR radiation; a wavelength selective structure configured to filter the broadband IR radiation emitted by the thermal emitter; and an IR detector configured to provide a detector output signal based on a strength of the filtered IR radiation having traversed the optical interaction path.
Abstract:
A transistor device may include a semiconductor body, a plurality of cell regions each comprising a plurality of transistor cells that are at least partially integrated in the semiconductor body and that each comprise a respective gate electrode, a plurality of routing channels each arranged between two or more of the cell regions, a gate pad arranged above a first surface of the semiconductor body, and a plurality of gate runners each coupled to the gate pad and each arranged in one of the plurality of routing channels. Each of the plurality of gate runners may be associated with one of the plurality of cell regions such that the gate electrodes in each of the plurality of cell regions are connected to an associated gate runner, and each of the plurality of routing channels comprises two or more gate runners that are routed in parallel and spaced apart.
Abstract:
A transistor device may include a semiconductor body, a plurality of cell regions each comprising a plurality of transistor cells that are at least partially integrated in the semiconductor body and that each comprise a respective gate electrode, a plurality of routing channels each arranged between two or more of the cell regions, a gate pad arranged above a first surface of the semiconductor body, and a plurality of gate runners each coupled to the gate pad and each arranged in one of the plurality of routing channels. Each of the plurality of gate runners may be associated with one of the plurality of cell regions such that the gate electrodes in each of the plurality of cell regions are connected to an associated gate runner, and each of the plurality of routing channels comprises two or more gate runners that are routed in parallel and spaced apart.
Abstract:
In accordance with an embodiment, a gas sensor includes a substrate having a cavity for providing an optical interaction path; a thermal emitter configured to emit broadband IR radiation; a wavelength selective structure configured to filter the broadband IR radiation emitted by the thermal emitter; and an IR detector configured to provide a detector output signal based on a strength of the filtered IR radiation having traversed the optical interaction path.
Abstract:
A method of processing a semiconductor device, comprising: providing a semiconductor body having dopants of a first conductivity type; forming at least one trench that extends into the semiconductor body along a vertical direction, the trench being laterally confined by two trench sidewalls and vertically confined by a trench bottom; applying a substance onto at least a section of a trench surface formed by one of the trench sidewalls and/or the trench bottom of the at least one trench, such that applying the substance includes preventing that the substance is applied to the other of the trench sidewalls; and diffusing of the applied substance from the section into the semiconductor body, thereby creating, in the semiconductor body, a semiconductor region having dopants of a second conductivity type and being arranged adjacent to the section.
Abstract:
A semiconductor device includes a semiconductor body includes a first side and a second side opposite to the first side, a first dielectric disposed on the first side, a second dielectric disposed on the second side, one or more FET devices disposed at the first side, a first contact trench extending through the first dielectric at the first side, a first conductive material disposed in the first contact trench and electrically connected to the semiconductor body, a second contact trench extending through the second dielectric and into the semiconductor body at the second side, and a second conductive material disposed in the second contact trench and electrically connected to the semiconductor body at sidewalls of the second contact trench.
Abstract:
A method of processing a semiconductor device, comprising: providing a semiconductor body having dopants of a first conductivity type; forming at least one trench that extends into the semiconductor body along a vertical direction, the trench being laterally confined by two trench sidewalls and vertically confined by a trench bottom; applying a substance onto at least a section of a trench surface formed by one of the trench sidewalls and/or the trench bottom of the at least one trench, such that applying the substance includes preventing that the substance is applied to the other of the trench sidewalls; and diffusing of the applied substance from the section into the semiconductor body, thereby creating, in the semiconductor body, a semiconductor region having dopants of a second conductivity type and being arranged adjacent to the section.
Abstract:
A semiconductor substrate arrangement includes a carrier wafer and a plurality of semiconductor substrate pieces fixed to the carrier wafer and distributed laterally over the carrier wafer. The semiconductor substrate pieces of the plurality of semiconductor substrate pieces comprise a hexagonal shape.