摘要:
Nano-oxide based current-perpendicular-to-plane (CPP) magnetoresistive (MR) sensor stacks are provided, together with methods for forming such stacks. Such stacks have increased resistance and enhanced magnetoresistive properties relative to CPP stacks made entirely of metallic layers. Said enhanced properties are provided by the insertion of magnetic nano-oxide layers between ferromagnetic layers and non-magnetic spacer layers, whereby said nano-oxide layers increase resistance and exhibit spin filtering properties. CPP sensor stacks of various types are provided, all having nano-oxide layers formed therein, including the spin-valve type and the synthetic antiferromagnetic pinned layer spin-valve type. Said stacks can also be formed upon each other to provide laminated stacks of different types.
摘要:
The problem of increased edge sensitivity associated with the reduction of the spacing between bias magnets in a CPP head has been solved by limiting the width of the bias cancellation layer and by adding an extra layer of insulation to ensure that current through the device flows only through its central area, thereby minimizing its edge reading sensitivity.
摘要:
A method for fabricating a current-perpendicular-to-plane (CPP) giant magnetoresistive (GMR) sensor of the synthetic spin valve type is provided, the method including an electron-beam lithographic process employing both primary and secondary electron absorption and first and second self-aligned lift-off processes for patterning the capped ferromagnetic free layer and the conducting, non-magnetic spacer layer. The sensor so fabricated has reduced resistance and increased sensitivity.
摘要:
A major problem in Lead Overlay design for GMR structures is that the magnetic read track width is wider than the physical read track width. This is due to high interfacial resistance between the leads and the GMR layer which is an unavoidable side effect of prior art methods. The present invention uses electroplating preceded by a wet etch to fabricate the leads. This approach requires only a thin protection layer over the GMR layer to ensure that interface resistance is minimal. Using wet surface cleaning avoids sputtering defects and plating is compatible with this so the cleaned surface is preserved Only a single lithography step is needed to define the track since there is no re-deposition involved.
摘要:
A major problem in Lead Overlay design for GMR structures is that the magnetic read track width is wider than the physical read track width. This is due to high interfacial resistance between the leads and the GMR layer which is an unavoidable side effect of prior art methods. The present invention uses electroplating preceded by a wet etch to fabricate the leads. This approach requires only a thin protection layer over the GMR layer to ensure that interface resistance is minimal. Using wet surface cleaning avoids sputtering defects and plating is compatible with this so the cleaned surface is preserved Only a single lithography step is needed to define the track since there is no re-deposition involved.
摘要:
An improved process for manufacturing a spin valve structure that has buried leads is disclosed. A key feature is the inclusion in the process of a temporary protective layer over the seed layer on which the spin valve structure will be grown. This protective layer is in place at the time that photoresist (used to define the location of the spin valve relative to the buried leads and longitudinal bias layers) is removed. The protective layer is later removed as a natural byproduct of surface cleanup just prior to the formation of the spin valve itself.
摘要:
An improved process for manufacturing a spin valve structure that has buried leads is disclosed. A key feature is the inclusion in the process of a temporary protective layer over the seed layer on which the spin valve structure will be grown. This protective layer remains in place while the buried leads as well as longitudinal bias means are formed. Processing includes use of photoresist liftoff. The protective layer is removed as a natural byproduct of surface cleanup just prior the formation of the spin valve.
摘要:
It has been observed that plated structures grown inside molds for small objects, such as a gap structure in a magnetic read head, often have curved rather than planar surfaces. This problem has been overcome as follows. Prior to laying down photoresist for the mold, a layer of copper is deposited on the substrate on which the head structure is to be grown (normally the shared pole). After the photoresist is patterned to form the mold, all exposed copper is selectively removed from the substrate a key feature being that the copper is over-etched so that some undercutting of the photoresist occurs. Then, when the layers making up the gap structure are electrodeposited inside the mold they grow away from the substrate as planar surfaces.
摘要:
The problem of increased edge sensitivity associated with the reduction of the spacing between bias magnets in a CPP head has been solved by limiting the width of the bias cancellation layer and by adding an extra layer of insulation to ensure that current through the device flows only through its central area, thereby minimizing its edge reading sensitivity.
摘要:
A “toggling” type of magnetic random access memory (MRAM) has memory stacks arranged in the X-Y plane on the MRAM substrate with each memory stack having a plurality of toggle memory cells stacked along the Z axis. Each stack is located at an intersection region between the two orthogonal write lines. The cells are stacked in pairs, with the cells in each pair having their easy axes of magnetization aligned substantially parallel to one another and nonparallel with the X and Y axes. The cells in each pair have their free layers magnetically biased in opposite directions. Because the free layer of each cell in a pair is biased in a direction opposite to the bias direction of the free layer of the other cell, one cell in a pair can be toggle written without toggle writing the other cell in the pair. The bias fields on the free layers reduces the required switching field for each cell, which results in less write current and a lower-power toggling MRAM.