公开(公告)号：US09082860B2

公开(公告)日：2015-07-14

申请号：US13425448

申请日：2012-03-21

申请人： Tadashi Nakano ,  Mai Sugikawa ,  Kosei Noda

发明人： Tadashi Nakano ,  Mai Sugikawa ,  Kosei Noda

IPC分类号： H01L29/786 ,  H01L29/49

CPC分类号： H01L29/7869 ,  H01L29/0684 ,  H01L29/24 ,  H01L29/42364 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/78603 ,  H01L29/78606

摘要： A semiconductor device of stable electrical characteristics, whose oxygen vacancies in a metal oxide is reduced, is provided. The semiconductor device includes a gate electrode, a gate insulating film over the gate electrode, a first metal oxide film over the gate insulating film, a source electrode and a drain electrode which are in contact with the first metal oxide film, and a passivation film over the source electrode and the drain electrode. A first insulating film, a second metal oxide film, and a second insulating film are stacked sequentially in the passivation film.

摘要翻译： 提供了一种其金属氧化物中的氧空位减小的具有稳定的电特性的半导体器件。 半导体器件包括栅电极，栅电极上的栅极绝缘膜，栅极绝缘膜上的第一金属氧化物膜，与第一金属氧化物膜接触的源电极和漏极，以及钝化膜 在源电极和漏电极上。 第一绝缘膜，第二金属氧化物膜和第二绝缘膜依次层叠在钝化膜中。

公开(公告)号：US09082858B2

公开(公告)日：2015-07-14

申请号：US13026511

申请日：2011-02-14

申请人： Masashi Tsubuku ,  Kosei Noda

发明人： Masashi Tsubuku ,  Kosei Noda

IPC分类号： H01L29/12 ,  H01L27/15 ,  H01L29/786 ,  H01L27/12

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L27/156

摘要： The band tail state and defects in the band gap are reduced as much as possible, whereby optical absorption of energy which is in the vicinity of the band gap or less than or equal to the band gap is reduced. In that case, not by merely optimizing conditions of manufacturing an oxide semiconductor film, but by making an oxide semiconductor to be a substantially intrinsic semiconductor or extremely close to an intrinsic semiconductor, defects on which irradiation light acts are reduced and the effect of light irradiation is reduced essentially. That is, even in the case where light with a wavelength of 350 nm is delivered at 1×1013 photons/cm2·sec, a channel region of a transistor is formed using an oxide semiconductor, in which the absolute value of the amount of the variation in the threshold voltage is less than or equal to 0.65 V.

摘要翻译： 频带尾部状态和带隙中的缺陷尽可能地减小，由此减小了在带隙附近或小于或等于带隙的能量的光吸收。 在这种情况下，不是仅通过优化氧化物半导体膜的制造条件，而是通过使氧化物半导体成为本质上的本征半导体，或者非常接近本征半导体，减少照射光的作用的缺陷和光照射 基本上减少了。 也就是说，即使在以1×1013个光子/ cm 2·sec传递波长为350nm的光的情况下，也可以使用氧化物半导体形成晶体管的沟道区域，其中， 阈值电压的变化小于或等于0.65 V.

公开(公告)号：US08815662B2

公开(公告)日：2014-08-26

申请号：US12949283

申请日：2010-11-18

申请人： Kosei Noda ,  Toshihiko Takeuchi ,  Makoto Ishikawa

发明人： Kosei Noda ,  Toshihiko Takeuchi ,  Makoto Ishikawa

IPC分类号： H01L21/00

CPC分类号： H01L21/76254 ,  H01L21/02532 ,  H01L21/02667 ,  H01L21/268 ,  H01L21/84 ,  H01L29/0696 ,  H01L29/456 ,  H01L29/66681 ,  H01L29/7824 ,  H01L31/022425 ,  H01L31/02245 ,  H01L31/0747 ,  H01L31/075 ,  H01L31/1804 ,  H01L31/1892 ,  Y02E10/547 ,  Y02E10/548 ,  Y02P70/521

摘要： An amorphous semiconductor layer is formed over a first single crystal semiconductor layer provided over a glass substrate or a plastic substrate with an insulating layer therebetween. The amorphous semiconductor layer is formed by a CVD method at a deposition temperature of higher than or equal to 100° C. and lower than or equal to 275° C. with use of a silane-based gas not diluted. Heat treatment is performed so that the amorphous semiconductor layer solid-phase epitaxially grows. In such a manner, an SOI substrate including a thick single crystal semiconductor layer is manufactured.

摘要翻译： 在设置在玻璃基板上的第一单晶半导体层或其间具有绝缘层的塑料基板上形成非晶半导体层。 使用未稀释的硅烷类气体，通过CVD法在高于或等于100℃且低于或等于275℃的沉积温度下形成非晶半导体层。 进行热处理，使得非晶半导体层固相外延生长。 以这种方式制造包括厚单晶半导体层的SOI衬底。

公开(公告)号：US08785923B2

公开(公告)日：2014-07-22

申请号：US13448609

申请日：2012-04-17

申请人： Kosei Noda

发明人： Kosei Noda

IPC分类号： H01L29/10

CPC分类号： H01L27/0688 ,  H01L21/823807 ,  H01L21/8258 ,  H01L29/4236 ,  H01L29/42384 ,  H01L29/66621 ,  H01L29/78 ,  H01L29/7869 ,  H01L29/78696

摘要： The semiconductor device includes transistors which are stacked. The transistors include a semiconductor substrate having a groove portion and a pair of low-resistance regions between which the groove portion is provided, a first gate insulating film over the semiconductor substrate, a gate electrode overlapping with the groove portion with the first gate insulating film interposed therebetween, a second gate insulating film covering the gate electrode, a pair of electrodes provided over the second gate insulating film so that the groove portion is sandwiched between the pair of electrodes, and a semiconductor film in contact with the pair of electrodes. One of the pair of low-resistance region is electrically connected to one of the pair of electrodes. One of the transistors includes an n-type semiconductor and the other includes a p-type semiconductor, so that a complementary MOS circuit is formed.

摘要翻译： 半导体器件包括堆叠的晶体管。 晶体管包括具有沟槽部分和一对低电阻区域的半导体衬底，在该半导体衬底之间设置有沟槽部分，半导体衬底上的第一栅极绝缘膜，与沟槽部分重叠的栅电极与第一栅极绝缘膜 介于其间的第二栅极绝缘膜，覆盖所述栅电极的第二栅极绝缘膜，设置在所述第二栅极绝缘膜上的一对电极，使得所述沟槽部分夹在所述一对电极之间，以及与所述一对电极接触的半导体膜。 一对低电阻区域中的一个电连接到该对电极中的一个。 晶体管中的一个包括n型半导体，另一个包括p型半导体，从而形成互补MOS电路。

公开(公告)号：US08748224B2

公开(公告)日：2014-06-10

申请号：US13197825

申请日：2011-08-04

申请人： Kosei Noda ,  Toshinari Sasaki

发明人： Kosei Noda ,  Toshinari Sasaki

IPC分类号： H01L21/00 ,  H01L29/10 ,  H01L29/04

CPC分类号： H01L29/66969 ,  H01L21/02164 ,  H01L21/465 ,  H01L21/477 ,  H01L22/10 ,  H01L29/401 ,  H01L29/4908 ,  H01L29/78603 ,  H01L29/7869

摘要： A transistor with superior electric characteristics is manufactured. An oxide insulating film is formed over a substrate, an oxide semiconductor film is formed over the oxide insulating film, heat treatment is then conducted at a temperature at which hydrogen contained in the oxide semiconductor film is desorbed and part of oxygen contained in the oxide insulating film is desorbed, then the heated oxide semiconductor film is etched into a predetermined shape to form an island-shaped oxide semiconductor film, a pair of electrodes is formed over the island-shaped oxide semiconductor film, a gate insulating film is formed over the pair of electrodes and the island-shaped oxide semiconductor film, and a gate electrode is formed over the gate insulating film.

摘要翻译： 制造出具有优异电特性的晶体管。 在衬底上形成氧化物绝缘膜，在氧化物绝缘膜上形成氧化物半导体膜，然后在氧化物半导体膜中所含的氢被解吸的温度和氧化物绝缘中包含的部分氧进行热处理 膜被解吸，然后将加热的氧化物半导体膜蚀刻成预定形状以形成岛状氧化物半导体膜，在岛状氧化物半导体膜上形成一对电极，在该对上形成栅极绝缘膜 的电极和岛状氧化物半导体膜，并且栅极电极形成在栅极绝缘膜上。

公开(公告)号：US08643007B2

公开(公告)日：2014-02-04

申请号：US13397838

申请日：2012-02-16

申请人： Masumi Nomura ,  Kosei Noda

发明人： Masumi Nomura ,  Kosei Noda

IPC分类号： H01L29/786

CPC分类号： H01L29/7869 ,  H01L29/42384 ,  H01L29/78624

摘要： It is an object to reduce concentration of an electric field on an end of a drain electrode of a semiconductor device. A semiconductor device includes an oxide semiconductor film including a first region and a second region; a pair of electrodes which is partly in contact with the oxide semiconductor film; a gate insulating film over the oxide semiconductor film; and a gate electrode that overlaps with part of one of the pair of electrodes and the first region with the gate insulating film provided therebetween. At least part of the first region and part of the second region are between the pair of electrodes. The gate electrode does not overlap with the other of the pair of electrodes.

摘要翻译： 本发明的目的是减少半导体器件的漏电极端部的电场浓度。 半导体器件包括包括第一区域和第二区域的氧化物半导体膜; 一部分与氧化物半导体膜接触的电极; 氧化物半导体膜上的栅极绝缘膜; 以及栅极电极，其与所述一对电极中的一个电极的一部分和所述第一区域重叠，并且所述栅极绝缘膜设置在所述第一区域之间。 第一区域的至少一部分和第二区域的一部分位于该对电极之间。 栅极电极不与另一对电极重叠。

公开(公告)号：US08519509B2

公开(公告)日：2013-08-27

申请号：US13082468

申请日：2011-04-08

申请人： Kosei Noda ,  Seiji Yasumoto ,  Kensuke Yoshizumi ,  Toshiyuki Miyamoto

发明人： Kosei Noda ,  Seiji Yasumoto ,  Kensuke Yoshizumi ,  Toshiyuki Miyamoto

IPC分类号： H01L29/00 ,  H01L29/04 ,  H01L31/036 ,  H01L27/10

CPC分类号： H01L27/1214 ,  G11C17/16 ,  H01L23/5252 ,  H01L23/5388 ,  H01L23/60 ,  H01L23/642 ,  H01L23/66 ,  H01L27/10 ,  H01L27/1021 ,  H01L27/105 ,  H01L27/112 ,  H01L27/11206 ,  H01L27/11286 ,  H01L27/1203 ,  H01L2223/6677 ,  H01L2924/0002 ,  H01L2924/00

摘要： An object of one embodiment of the present invention is to provide an antifuse which has low writing voltage. The antifuse is used for a memory element for a read only memory device. The antifuse includes a first conductive layer, an insulating layer, a semiconductor layer, and a second conductive layer. The insulating layer included in the antifuse is a silicon oxynitride layer formed by adding ammonia to a source gas. When hydrogen is contained in the layer at greater than or equal to 1.2×1021 atoms/cm3 and less than or equal to 3.4×1021 atoms/cm3 or nitrogen is contained in the layer at greater than or equal to 3.2×1020 atoms/cm3 and less than or equal to 2.2×1021 atoms/cm3, writing can be performed at low voltage.

摘要翻译： 本发明的一个实施例的目的是提供一种具有低写入电压的反熔丝。 反熔丝用于只读存储器件的存储元件。 反熔丝包括第一导电层，绝缘层，半导体层和第二导电层。 包含在反熔丝中的绝缘层是通过向源气体添加氨形成的氧氮化硅层。 当层中含有大于或等于1.2×1021原子/ cm3且小于或等于3.4×1021原子/ cm3的氢时，或层中含氮大于或等于3.2×1020原子/ cm3 小于或等于2.2×1021原子/ cm3，可以在低电压下进行写入。

公开(公告)号：US08461630B2

公开(公告)日：2013-06-11

申请号：US13299644

申请日：2011-11-18

申请人： Yuta Endo ,  Kosei Noda

发明人： Yuta Endo ,  Kosei Noda

IPC分类号： H01L29/66

CPC分类号： H01L27/1288 ,  H01L27/1225

摘要： A conductive film to be a gate electrode, a first insulating film to be a gate insulating film, a semiconductor film in which a channel region is formed, and a second insulating film to be a channel protective film are successively formed. With the use of a resist mask formed by performing light exposure with the use of a photomask which is a multi-tone mask and development, i) in a region without the resist mask, the second insulating film, the semiconductor film, the first insulating film, and the conductive film are successively etched, ii) the resist mask is made to recede by ashing or the like and only the region of the resist mask with small thickness is removed, so that part of the second insulating film is exposed, and iii) the exposed part of the second insulating film is etched, so that a pair of opening portions is formed.

摘要翻译： 依次形成作为栅电极的导电膜，作为栅绝缘膜的第一绝缘膜，形成沟道区的半导体膜和作为沟道保护膜的第二绝缘膜。 通过使用通过使用作为多色调掩模和显影的光掩模进行曝光而形成的抗蚀剂掩模，i）在没有抗蚀剂掩模的区域中，第二绝缘膜，半导体膜，第一绝缘体 膜和导电膜依次蚀刻，ii）通过灰化等使抗蚀剂掩模后退，并且仅去除厚度小的抗蚀剂掩模的区域，使第二绝缘膜的一部分露出，并且 iii）蚀刻第二绝缘膜的暴露部分，从而形成一对开口部。

公开(公告)号：US08431926B2

公开(公告)日：2013-04-30

申请号：US12872823

申请日：2010-08-31

申请人： Shunpei Yamazaki ,  Junichiro Sakata ,  Kosei Noda ,  Masayuki Sakakura ,  Yoshiaki Oikawa ,  Hotaka Maruyama

发明人： Shunpei Yamazaki ,  Junichiro Sakata ,  Kosei Noda ,  Masayuki Sakakura ,  Yoshiaki Oikawa ,  Hotaka Maruyama

IPC分类号： H01L29/12 ,  H01L29/786

摘要： It is an object to manufacture a highly reliable semiconductor device including a thin film transistor whose electric characteristics are stable. An insulating layer which covers an oxide semiconductor layer of the thin film transistor contains a boron element or an aluminum element. The insulating layer containing a boron element or an aluminum element is formed by a sputtering method using a silicon target or a silicon oxide target containing a boron element or an aluminum element. Alternatively, an insulating layer containing an antimony (Sb) element or a phosphorus (P) element instead of a boron element covers the oxide semiconductor layer of the thin film transistor.

公开(公告)号：US08400187B2

公开(公告)日：2013-03-19

申请号：US12901057

申请日：2010-10-08

申请人： Shunpei Yamazaki ,  Jun Koyama ,  Masashi Tsubuku ,  Kosei Noda

发明人： Shunpei Yamazaki ,  Jun Koyama ,  Masashi Tsubuku ,  Kosei Noda

IPC分类号： H01L25/00 ,  H03K19/094 ,  H03B1/00

CPC分类号： H01L29/7869 ,  H01L22/34 ,  H01L27/0207 ,  H01L27/1225 ,  H01L29/78696 ,  H01L2924/0002 ,  H01L2924/00

摘要： A logic circuit includes a thin film transistor having a channel formation region formed using an oxide semiconductor, and a capacitor having terminals one of which is brought into a floating state by turning off the thin film transistor. The oxide semiconductor has a hydrogen concentration of 5×1019 (atoms/cm3) or less and thus substantially serves as an insulator in a state where an electric field is not generated. Therefore, off-state current of a thin film transistor can be reduced, leading to suppressing the leakage of electric charge stored in a capacitor, through the thin film transistor. Accordingly, a malfunction of the logic circuit can be prevented. Further, the excessive amount of current which flows in the logic circuit can be reduced through the reduction of off-state current of the thin film transistor, resulting in low power consumption of the logic circuit.

摘要翻译： 逻辑电路包括具有使用氧化物半导体形成的沟道形成区域的薄膜晶体管，以及通过关闭薄膜晶体管而使端子中的一个成为浮置状态的电容器。 氧化物半导体的氢浓度为5×1019（原子/ cm3）以下，因此在不产生电场的状态下基本上用作绝缘体。 因此，可以减小薄膜晶体管的截止电流，从而通过薄膜晶体管抑制存储在电容器中的电荷的泄漏。 因此，可以防止逻辑电路的故障。 此外，可以通过减小薄膜晶体管的截止电流来降低在逻辑电路中流动的过量的电流，导致逻辑电路的低功耗。