公开(公告)号：US07972897B2

公开(公告)日：2011-07-05

申请号：US11702966

申请日：2007-02-05

Applicant: Nitin Kumar ,  Chi-I Lang ,  Tony Chiang ,  Zhi-wen Sun ,  Jinhong Tong

Inventor： Nitin Kumar ,  Chi-I Lang ,  Tony Chiang ,  Zhi-wen Sun ,  Jinhong Tong

IPC: H01L21/00

CPC classification number: H01L45/145 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146 ,  H01L45/1633

Abstract: Resistive switching memory elements are provided that may contain electroless metal electrodes and metal oxides formed from electroless metal. The resistive switching memory elements may exhibit bistability and may be used in high-density multi-layer memory integrated circuits. Electroless conductive materials such as nickel-based materials may be selectively deposited on a conductor on a silicon wafer or other suitable substrate. The electroless conductive materials can be oxidized to form a metal oxide for a resistive switching memory element. Multiple layers of conductive materials can be deposited each of which has a different oxidation rate. The differential oxidization rates of the conductive layers can be exploited to ensure that metal oxide layers of desired thicknesses are formed during fabrication.

Abstract translation: 提供电阻式开关存储器元件，其可以包含由无电金属形成的化学金属电极和金属氧化物。 电阻式开关存储器元件可以表现出双稳态，并且可以用于高密度多层存储器集成电路中。 诸如镍基材料的无电导电材料可以选择性地沉积在硅晶片或其它合适的衬底上的导体上。 无电导电材料可以被氧化以形成用于电阻式开关存储元件的金属氧化物。 可以沉积多层导电材料，每层具有不同的氧化速率。 可以利用导电层的差异氧化速率来确保在制造期间形成所需厚度的金属氧化物层。

公开(公告)号：US20110151105A1

公开(公告)日：2011-06-23

申请号：US12970638

申请日：2010-12-16

Applicant: Nikhil D. Kalyankar ,  Nitin Kumar ,  Zhi-Wen Sun ,  Kenneth A. Williams

Inventor： Nikhil D. Kalyankar ,  Nitin Kumar ,  Zhi-Wen Sun ,  Kenneth A. Williams

IPC: C23C16/52 ,  B05C11/00

CPC classification number: C23C18/1254 ,  B01J19/0046 ,  B01J2219/0036 ,  B01J2219/00443 ,  B01J2219/00691 ,  B01J2219/00702 ,  B01J2219/00756 ,  C40B30/00 ,  C40B60/12 ,  Y10T428/2991

Abstract: Embodiments of the current invention describe a high performance combinatorial method and apparatus for the combinatorial development of coatings by a dip-coating process. The dip-coating process may be used for multiple applications, including forming coatings from varied sol-gel formulations, coating substrates uniformly with particles to combinatorially test particle removal formulations, and the dipping of substrates into texturing formulations to combinatorially develop the texturing formulations.

Abstract translation: 本发明的实施例描述了通过浸涂工艺组合开发涂层的高性能组合方法和装置。 浸涂方法可用于多种应用，包括由不同溶胶 - 凝胶制剂形成涂层，用颗粒均匀地涂覆底物以组合测试颗粒去除配方，以及将基材浸渍到变形配方中以组合开发变形配方。

公开(公告)号：US07785172B2

公开(公告)日：2010-08-31

申请号：US11838653

申请日：2007-08-14

Applicant: Peter Satitpunwaycha ,  Richard Endo ,  Zachary Fresco ,  Nitin Kumar

Inventor： Peter Satitpunwaycha ,  Richard Endo ,  Zachary Fresco ,  Nitin Kumar

IPC: B24B49/00 ,  B24B1/00

CPC classification number: H01L21/67046 ,  B24B37/00 ,  C25D17/00 ,  C25D21/12 ,  H01L21/67051 ,  H01L21/68764 ,  H01L21/68785

Abstract: Combinatorial processing including rotation and movement within a region is described, including defining multiple regions of at least one substrate, processing the multiple regions of the at least one substrate in a combinatorial manner, rotating a head in one of the multiple regions to perform the processing, and repositioning the head relative to the one of the multiple regions while rotating the head during the processing.

Abstract translation: 描述包括区域内的旋转和移动的组合处理，包括限定至少一个基板的多个区域，以组合的方式处理至少一个基板的多个区域，在多个区域中的一个区域中旋转头部以执行处理 并且在处理期间旋转头部时，相对于多个区域中的一个重新定位头部。

公开(公告)号：US07680117B1

公开(公告)日：2010-03-16

申请号：US11694738

申请日：2007-03-30

Applicant: Nitin Kumar ,  Fritz Budiyanto

Inventor： Nitin Kumar ,  Fritz Budiyanto

IPC: H04L12/28 ,  H04L12/56

CPC classification number: H04L45/00 ,  H04L45/38 ,  H04L45/54

Abstract: A method may include receiving a packet associated with a flow of packets, the packet including a destination address; selecting one of a plurality of memory banks, the selected memory bank being associated with the flow of packets, wherein each of the plurality of memory banks stores the same next-hop information for forwarding the packet to the destination address; accessing, in the selected memory bank, the next-hop information for forwarding the packet to the destination address; and forwarding the packet to the destination address based on the next-hop information.

Abstract translation: 方法可以包括接收与分组流相关联的分组，所述分组包括目的地地址; 选择多个存储体之一，所选择的存储体与分组流相关联，其中多个存储体中的每一个存储用于将分组转发到目的地地址的相同的下一跳信息; 在所选择的存储体中访问用于将分组转发到目的地地址的下一跳信息; 并根据下一跳信息将报文转发到目的地址。

公开(公告)号：US07629198B2

公开(公告)日：2009-12-08

申请号：US11714334

申请日：2007-03-05

Applicant: Nitin Kumar ,  Jinhong Tong ,  Chi-I Lang ,  Tony Chiang ,  Prashant B. Phatak

Inventor： Nitin Kumar ,  Jinhong Tong ,  Chi-I Lang ,  Tony Chiang ,  Prashant B. Phatak

IPC: H01L21/00 ,  H01L21/16

CPC classification number: H01L45/04 ,  H01L27/2463 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146 ,  H01L45/1608

Abstract: Nonvolatile memory elements are provided that have resistive switching metal oxides. The nonvolatile memory elements may be formed by depositing a metal-containing material on a silicon-containing material. The metal-containing material may be oxidized to form a resistive-switching metal oxide. The silicon in the silicon-containing material reacts with the metal in the metal-containing material when heat is applied. This forms a metal silicide lower electrode for the nonvolatile memory element. An upper electrode may be deposited on top of the metal oxide. Because the silicon in the silicon-containing layer reacts with some of the metal in the metal-containing layer, the resistive-switching metal oxide that is formed is metal deficient when compared to a stoichiometric metal oxide formed from the same metal.

Abstract translation: 提供具有电阻开关金属氧化物的非易失性存储元件。 非易失性存储元件可以通过将含金属的材料沉积在含硅材料上而形成。 含金属材料可以被氧化以形成电阻式开关金属氧化物。 当施加热量时，含硅材料中的硅与含金属材料中的金属反应。 这形成用于非易失性存储元件的金属硅化物下电极。 上部电极可以沉积在金属氧化物的顶部。 由于含硅层中的硅与含金属层中的一些金属反应，与由相同金属形成的化学计量的金属氧化物相比，形成的电阻 - 开关金属氧化物是金属缺陷的。

公开(公告)号：US20090115340A1

公开(公告)日：2009-05-07

申请号：US11934943

申请日：2007-11-05

Applicant: Timothy Chen ,  Hailiang Miao ,  Nitin Kumar

Inventor： Timothy Chen ,  Hailiang Miao ,  Nitin Kumar

IPC: H05B41/24

CPC classification number: H05B41/2856 ,  H05B41/2827

Abstract: A system and method is provided that eliminates DC bias on at least one of a first electrolytic capacitor and a second electrolytic capacitor of a bipolar junction transistor (BJT) based inverter ballast having a shutdown control circuit in association with only one of at least two BJT switches. A duty cycle dependent capacitor is connected in a series with a bus of the ballast, and a resonant circuit, including primary winding of the output transformer and a resonant capacitor. A balancing/charging resistor is connected at one end between the first electrolytic capacitor and the second electrolytic capacitor, and at another end to the duty cycle dependent capacitor and the resonant circuit.

Abstract translation: 提供了一种系统和方法，其消除了具有关闭控制电路的双极结型晶体管（BJT）型逆变器镇流器的第一电解电容器和第二电解电容器中的至少一个上的DC偏压，仅与至少两个BJT 开关。 与占空比相关的电容器与镇流器的总线串联连接，并且包括谐振电路，包括输出变压器的初级绕组和谐振电容器。 平衡/充电电阻器一端连接在第一电解电容器和第二电解电容器之间，另一端连接到占空比相关电容器和谐振电路。

公开(公告)号：US10117316B1

公开(公告)日：2018-10-30

申请号：US15783237

申请日：2017-10-13

Applicant: Barry Stout ,  Reiner Windisch ,  Nitin Kumar ,  Claus Diener ,  Klaus Ziemssen

Inventor： Barry Stout ,  Reiner Windisch ,  Nitin Kumar ,  Claus Diener ,  Klaus Ziemssen

IPC: H04B10/00 ,  H05B37/02 ,  H04B10/116

Abstract: Various embodiments disclosed herein include a light-based communication system. The system includes a plurality of luminaires, in which each of the plurality of luminaires is configured to transmit light-based communication (LCom) signals, and a server communicatively coupled to the plurality of luminaires. The server is configured to assign an identifier to each of the plurality of luminaires, transmit the assigned identifier to each of the plurality of luminaires, in which each of the plurality of luminaires transmits the assigned identifier via LCom signals, rotate, in response to receiving a trigger signal, the assigned identifier for each of the plurality of luminaires, and transmit the rotated identifier to each of the plurality of luminaires, in which each of the plurality of luminaires transmits the rotated identifier via LCom signals.

公开(公告)号：US20170303355A1

公开(公告)日：2017-10-19

申请号：US15641318

申请日：2017-07-04

Applicant: Nitin Kumar ,  Markus Ziegler ,  Naveen Tumula ,  Thomas Schalton

Inventor： Nitin Kumar ,  Markus Ziegler ,  Naveen Tumula ,  Thomas Schalton

IPC: H05B33/08 ,  H02M3/24 ,  H02M3/335 ,  H02M1/00

CPC classification number: H05B33/0815 ,  H02M3/24 ,  H02M3/33507 ,  H02M2001/0025 ,  H05B33/08 ,  Y02B20/348

Abstract: A driver port that provides selectable output currents based on connections thereto, and a driver including the same, is provided. A plurality of shunt resistors are connected in series between a negative output of a driver and a ground. A driver port having a plurality of connection points is provided, each respective connection point connected to a different connection between two of the plurality of shunt resistors. A load including one or more solid state light sources is capable of being connected between one of the connection points of the driver port and a positive output of the driver.

公开(公告)号：US09084322B2

公开(公告)日：2015-07-14

申请号：US14312919

申请日：2014-06-24

Applicant: Nitin Kumar ,  Markus Ziegler

Inventor： Nitin Kumar ,  Markus Ziegler

IPC: H05B33/08 ,  H02M3/24

CPC classification number: H05B33/0815 ,  H02M3/24 ,  H02M3/33507 ,  H02M2001/0025 ,  H05B33/08 ,  Y02B20/348

Abstract: A bi-level current configurable driver is provided. The driver includes a feedback circuit, a driver circuit providing a driver signal to a half bridge inverter, and a step-dim interface coupled to a first alternating current input line, a second alternating current input line, and a neutral line, providing voltage to the driver circuit. The driver also includes a first feedforward circuit coupled to the step-dim interface, where the first feedforward circuit receives a first signal from the step-dim interface based on the states of the first alternating current input line, the second alternating current input line, and the neutral line. In a first state, the driver provides full current to a load, and in a second state, the driver provides less than full current to the load.

Abstract translation: 提供双电平电流可配置驱动器。 驱动器包括反馈电路，向半桥逆变器提供驱动器信号的驱动器电路，以及耦合到第一交流输入线，第二交流输入线和中性线的阶梯形接口，提供电压到 驱动电路。 所述驱动器还包括耦合到所述渐变接口的第一前馈电路，其中所述第一前馈电路基于所述第一交流电输入线，所述第二交流输入线，所述第二交流输入线， 和中性线。 在第一状态下，驱动器向负载提供全电流，而在第二状态下，驱动器向负载提供小于满电流。

公开(公告)号：US20150043246A1

公开(公告)日：2015-02-12

申请号：US14312951

申请日：2014-06-24

Applicant: Nitin Kumar ,  Markus Ziegler

Inventor： Nitin Kumar ,  Markus Ziegler

IPC: H02M1/32 ,  H02M3/335

Abstract: A no load detection and shutdown circuit in an isolated driver is provided. A no load condition is detected by primary side evaluation of a reflected voltage. If a determination is made that a no load condition is present, the no load detection circuit signals a half bridge driver of the driver to cease oscillations, shutting down the driver.

Abstract translation: 提供了隔离驱动器中的空载检测和关断电路。 通过反射电压的初级侧评估来检测无负载状态。 如果确定存在空载条件，则空载检测电路向驾驶员的半桥驱动器发出信号以停止振荡，关闭驾驶员。