公开(公告)号：US09175382B2

公开(公告)日：2015-11-03

申请号：US13281316

申请日：2011-10-25

申请人： Hong Sheng Yang ,  Tony P. Chiang ,  Kent Riley Child ,  Chi-I Lang ,  ShouQian Shao

发明人： Hong Sheng Yang ,  Tony P. Chiang ,  Kent Riley Child ,  Chi-I Lang ,  ShouQian Shao

IPC分类号： C23C14/34 ,  H01J37/34 ,  C23C14/35

CPC分类号： C23C14/345 ,  C23C14/3485 ,  C23C14/352 ,  H01J37/3402 ,  H01J37/3405 ,  H01J37/3458 ,  H01J37/3467

摘要： In one aspect of the invention, a process chamber is provided. The chamber includes a plurality of sputter guns with a target affixed to one end of each of the sputter guns. Each of the plurality of sputter guns is coupled to a first power source. The first power source is operable to provide a pulsed power supply to each of the plurality of sputter guns. The pulsed power supply has a duty cycle that is less than 30%. A substrate support disposed at a distance from the plurality of sputter guns is included. The substrate support is coupled to a second power source. The second power source is operable to bias a substrate disposed on the substrate support, wherein the duty cycle of the second power source is synchronized with a duty cycle of the first power source. A method of performing a deposition process is also included.

摘要翻译： 在本发明的一个方面，提供一种处理室。 该腔室包括多个溅射枪，其中目标物固定在每个溅射枪的一端。 多个溅射枪中的每一个耦合到第一电源。 第一电源可操作以向多个溅射枪中的每一个提供脉冲电源。 脉冲电源的占空比小于30％。 包括设置在距离多个溅射枪一定距离的衬底支撑件。 衬底支撑件耦合到第二电源。 第二电源可操作以偏置设置在衬底支撑件上的衬底，其中第二电源的占空比与第一电源的占空比同步。 还包括执行沉积工艺的方法。

公开(公告)号：US08726838B2

公开(公告)日：2014-05-20

申请号：US12963995

申请日：2010-12-09

申请人： Sunil Shanker ,  Tony P. Chiang ,  Chi-I Lang

发明人： Sunil Shanker ,  Tony P. Chiang ,  Chi-I Lang

IPC分类号： C23C16/50 ,  C23C16/509 ,  H01L21/3065 ,  C23C16/455 ,  C23C16/02 ,  C23C16/458 ,  H01L21/67 ,  H01J37/32

CPC分类号： H01L21/02274 ,  C23C16/0227 ,  C23C16/44 ,  C23C16/45523 ,  C23C16/45525 ,  C23C16/45536 ,  C23C16/45548 ,  C23C16/45565 ,  C23C16/45574 ,  C23C16/4586 ,  C23C16/509 ,  C23C16/5096 ,  H01J37/32091 ,  H01J37/3244 ,  H01J37/32532 ,  H01J37/32541 ,  H01J37/32568 ,  H01J37/32715 ,  H01J37/32779 ,  H01L21/3065 ,  H01L21/67069

摘要： According to various embodiments of the disclosure, an apparatus and method for enhanced deposition and etch techniques is described, including a pedestal, the pedestal having at least two electrodes embedded in the pedestal, a showerhead above the pedestal, a plasma gas source connected to the showerhead, wherein the showerhead is configured to deliver plasma gas to a processing region between the showerhead and the substrate and a power source operably connected to the showerhead and the at least two electrodes with plasma being substantially contained in an area which corresponds with one electrode of the at least two electrodes.

摘要翻译： 根据本公开的各种实施例，描述了一种用于增强沉积和蚀刻技术的装置和方法，包括基座，具有至少两个嵌入基座的电极的基座，基座上方的喷头，连接到基座的等离子体气体源 淋浴头，其中所述喷头被构造成将等离子体气体输送到所述喷头和所述基板之间的处理区域，以及电源，其可操作地连接到所述喷头和所述至少两个电极，其中等离子体基本上包含在对应于 所述至少两个电极。

公开(公告)号：US08614787B2

公开(公告)日：2013-12-24

申请号：US12952855

申请日：2010-11-23

申请人： Yun Wang ,  Tony P. Chiang ,  Chi-I Lang

发明人： Yun Wang ,  Tony P. Chiang ,  Chi-I Lang

IPC分类号： G01N21/00

CPC分类号： G01R31/26 ,  G01N21/55 ,  G01R31/2607 ,  H02S50/10

摘要： Simultaneous measurement of an internal quantum efficiency and an external quantum efficiency of a solar cell using an emitter that emits light; a three-way beam splitter that splits the light into solar cell light and reference light, wherein the solar cell light strikes the solar cell; a reference detector that detects the reference light; a reflectance detector that detects reflectance light, wherein the reflectance light comprises a portion of the solar cell light reflected off the solar cell; a source meter operatively coupled to the solar cell; a multiplexer operatively coupled to the solar cell, the reference detector, and the reflectance detector; and a computing device that simultaneously computes the internal quantum efficiency and the external quantum efficiency of the solar cell.

公开(公告)号：US08580344B2

公开(公告)日：2013-11-12

申请号：US12405218

申请日：2009-03-16

申请人： Nikhil D. Kalyankar ,  Zachary Fresco ,  Chi-I Lang

发明人： Nikhil D. Kalyankar ,  Zachary Fresco ,  Chi-I Lang

IPC分类号： G01N31/00 ,  G01N31/20 ,  G01N31/22 ,  B01L3/00

CPC分类号： C40B60/08 ,  B01J19/0046 ,  B01J2219/00317 ,  B01J2219/00364 ,  B01J2219/00376 ,  B01J2219/00382 ,  B01J2219/00427 ,  B01J2219/00527 ,  B01J2219/00585 ,  B01J2219/00596 ,  B01J2219/00605 ,  B01J2219/00659 ,  B01J2219/00702 ,  C40B50/18

摘要： This disclosure provides methods, devices and systems for using a stamp to enhance selectivity between surface layers of a substrate, and to facilitate functionalizing selected layers. An array of flat stamps may be used to concurrently stamp multiple regions of a substrate to transfer one or more substances to the topmost layer or layers of the substrate. If desired, the affected regions of the substrate may be isolated from each other through the use of a reactor plate that, when clamped to the substrate's surface, forms reaction wells in the area of stamping. The stamp area can, if desired, be configured for stamping the substrate after the reactor plate has been fitted, with the individual stamps sized and arranged in a manner that permits stamping within each reaction well. If applied in a combinatorial process, a robotic process may be used to transfer multiple combinations of contact substances and processing chemicals to each reaction well to perform many concurrent processes upon a single substrate (e.g., a single coupon). The methods, devices and systems provided facilitate semiconductor design, optimization and qualification, and may be adapted to production manufacturing.

摘要翻译： 本公开提供了使用印模来增强基底的表面层之间的选择性并促进官能化所选择的层的方法，装置和系统。 可以使用平面阵列阵列来同时印刷衬底的多个区域以将一种或多种物质转移到衬底的最上层或多层。 如果需要，可以通过使用反应器板将基材的受影响区域彼此隔离，当将其夹在基材表面上时，在冲压区域中形成反应孔。 如果需要，邮票区域可以被配置用于在安装反应器板之后冲压衬底，各个邮票的大小和布置方式允许在每个反应井内冲压。 如果应用于组合过程中，机器人过程可用于将接触物质和加工化学品的多种组合转移到每个反应井，以在单个底物（例如，单一试样）上进行许多并行处理。 提供的方法，设备和系统有助于半导体设计，优化和鉴定，并可适用于生产制造。

公开(公告)号：US08535972B2

公开(公告)日：2013-09-17

申请号：US12172110

申请日：2008-07-11

申请人： Zachary M. Fresco ,  Chi-I Lang ,  Jinhong Tong ,  Anh Duong ,  Nitin Kumar ,  Anna Tsimelzon ,  Tony Chiang

发明人： Zachary M. Fresco ,  Chi-I Lang ,  Jinhong Tong ,  Anh Duong ,  Nitin Kumar ,  Anna Tsimelzon ,  Tony Chiang

IPC分类号： H01L51/40

CPC分类号： H01L23/5329 ,  C09D129/04 ,  H01L21/02063 ,  H01L21/02074 ,  H01L21/3105 ,  H01L21/31058 ,  H01L21/76814 ,  H01L21/7682 ,  H01L21/76826 ,  H01L21/76829 ,  H01L2221/1063 ,  H01L2924/0002 ,  H01L2924/00

摘要： Methods of modifying a patterned semiconductor substrate are presented including: providing a patterned semiconductor substrate surface including a dielectric region and a conductive region; and applying an amphiphilic surface modifier to the dielectric region to modify the dielectric region. In some embodiments, modifying the dielectric region includes modifying a wetting angle of the dielectric region. In some embodiments, modifying the wetting angle includes making a surface of the dielectric region hydrophilic. In some embodiments, methods further include applying an aqueous solution to the patterned semiconductor substrate surface. In some embodiments, the conductive region is selectively enhanced by the aqueous solution. In some embodiments, methods further include providing the dielectric region formed of a low-k dielectric material. In some embodiments, applying the amphiphilic surface modifier modifies an interaction of the low-k dielectric region with a subsequent process.

公开(公告)号：US20130146442A1

公开(公告)日：2013-06-13

申请号：US13315490

申请日：2011-12-09

申请人： HONG SHENG YANG ,  CHI-I LANG

发明人： HONG SHENG YANG ,  CHI-I LANG

IPC分类号： C23C14/35

CPC分类号： C23C14/35 ,  H01J37/3405 ,  H01J37/3417 ,  H01J37/3426 ,  H01J37/3452

摘要： In one aspect of the invention, a sputter source is provided. The sputter source includes a target source affixed to a bottom plate of the sputter source. A plurality of magnets spaced apart from each other is included. The plurality of magnets is disposed above a surface of the bottom plate, wherein a surface of the target source is profiled such that the target source has a minimum thickness aligned with an axis of each of the plurality of magnets and a maximum thickness aligned with an axis of a gap defined between each of the plurality of magnets. A method of processing a substrate is also included.

摘要翻译： 在本发明的一个方面，提供一种溅射源。 溅射源包括固定到溅射源的底板的靶源。 包括彼此间隔开的多个磁体。 所述多个磁体设置在所述底板的表面之上，其中所述目标源的表面被成型为使得所述目标源具有与所述多个磁体中的每一个的轴线对齐的最小厚度， 在所述多个磁体中的每一个之间限定的间隙的轴线。 还包括处理衬底的方法。

公开(公告)号：US20130101750A1

公开(公告)日：2013-04-25

申请号：US13281316

申请日：2011-10-25

申请人： Hong Sheng Yang ,  Tony P. Chiang ,  Kent Riley Child ,  Chi-I Lang ,  ShouQian Shao

发明人： Hong Sheng Yang ,  Tony P. Chiang ,  Kent Riley Child ,  Chi-I Lang ,  ShouQian Shao

IPC分类号： C23C14/34

CPC分类号： C23C14/345 ,  C23C14/3485 ,  C23C14/352 ,  H01J37/3402 ,  H01J37/3405 ,  H01J37/3458 ,  H01J37/3467

摘要： In one aspect of the invention, a process chamber is provided. The chamber includes a plurality of sputter guns with a target affixed to one end of each of the sputter guns. Each of the plurality of sputter guns is coupled to a first power source. The first power source is operable to provide a pulsed power supply to each of the plurality of sputter guns. The pulsed power supply has a duty cycle that is less than 30%. A substrate support disposed at a distance from the plurality of sputter guns is included. The substrate support is coupled to a second power source. The second power source is operable to bias a substrate disposed on the substrate support, wherein the duty cycle of the second power source is synchronized with a duty cycle of the first power source. A method of performing a deposition process is also included.

摘要翻译： 在本发明的一个方面，提供一种处理室。 该腔室包括多个溅射枪，其中目标物固定在每个溅射枪的一端。 多个溅射枪中的每一个耦合到第一电源。 第一电源可操作以向多个溅射枪中的每一个提供脉冲电源。 脉冲电源的占空比小于30％。 包括设置在距离多个溅射枪一定距离的衬底支撑件。 衬底支撑件耦合到第二电源。 第二电源可操作以偏置设置在衬底支撑件上的衬底，其中第二电源的占空比与第一电源的占空比同步。 还包括执行沉积工艺的方法。

公开(公告)号：US08344375B2

公开(公告)日：2013-01-01

申请号：US13312061

申请日：2011-12-06

申请人： Nitin Kumar ,  Tony Chiang ,  Chi-I Lang ,  Prashant B Phatak ,  Jinhong Tong

发明人： Nitin Kumar ,  Tony Chiang ,  Chi-I Lang ,  Prashant B Phatak ,  Jinhong Tong

IPC分类号： H01L29/12 ,  H01L29/02

CPC分类号： G11C13/0007 ,  G11C2213/32 ,  G11C2213/52 ,  G11C2213/72 ,  G11C2213/73 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146 ,  H01L45/1608

摘要： Nonvolatile memory elements are provided that have resistive switching metal oxides. The nonvolatile memory elements may be formed by depositing a metal-containing material on a silicon-containing material. The metal-containing material may be oxidized to form a resistive-switching metal oxide. The silicon in the silicon-containing material reacts with the metal in the metal-containing material when heat is applied. This forms a metal silicide lower electrode for the nonvolatile memory element. An upper electrode may be deposited on top of the metal oxide. Because the silicon in the silicon-containing layer reacts with some of the metal in the metal-containing layer, the resistive-switching metal oxide that is formed is metal deficient when compared to a stoichiometric metal oxide formed from the same metal.

摘要翻译： 提供具有电阻开关金属氧化物的非易失性存储元件。 非易失性存储元件可以通过将含金属的材料沉积在含硅材料上而形成。 含金属材料可以被氧化以形成电阻式开关金属氧化物。 当施加热量时，含硅材料中的硅与含金属材料中的金属反应。 这形成用于非易失性存储元件的金属硅化物下电极。 上部电极可以沉积在金属氧化物的顶部。 由于含硅层中的硅与含金属层中的一些金属反应，与由相同金属形成的化学计量的金属氧化物相比，形成的电阻 - 开关金属氧化物是金属缺陷的。

公开(公告)号：US20120325109A1

公开(公告)日：2012-12-27

申请号：US13335011

申请日：2011-12-22

申请人： Bob Kong ,  Zhi-Wen Sun ,  Chi-I Lang ,  Jinhong Tong ,  Tony Chiang

发明人： Bob Kong ,  Zhi-Wen Sun ,  Chi-I Lang ,  Jinhong Tong ,  Tony Chiang

IPC分类号： C09D1/00

CPC分类号： H01L21/02068 ,  C23C18/1651 ,  C23C18/54 ,  H01L21/288 ,  H01L21/76852 ,  H01L21/76874

摘要： Embodiments of the current invention describe methods of processing a semiconductor substrate that include applying a zincating solution to the semiconductor substrate to form a zinc passivation layer on the titanium-containing layer, the zincating solution comprising a zinc salt, FeCl3, and a pH adjuster.

摘要翻译： 本发明的实施方案描述了处理半导体衬底的方法，其包括将锌化溶液施加到半导体衬底上以在含钛层上形成锌钝化层，所述锌化溶液包含锌盐FeCl 3和pH调节剂。

公开(公告)号：US08334015B2

公开(公告)日：2012-12-18

申请号：US12013759

申请日：2008-01-14

申请人： Tony P. Chiang ,  Sunil Shanker ,  Chi-I Lang

发明人： Tony P. Chiang ,  Sunil Shanker ,  Chi-I Lang

IPC分类号： C23C16/04

CPC分类号： C23C16/45574 ,  C23C16/45544 ,  C23C16/45548

摘要： A combinatorial processing chamber and method are provided. In the method a fluid volume flows over a surface of a substrate with differing portions of the fluid volume having different constituent components to concurrently expose segregated regions of the substrate to a mixture of the constituent components that differ from constituent components to which adjacent regions are exposed. Differently processed segregated regions are generated through the multiple flowings.

摘要翻译： 提供组合处理室和方法。 在该方法中，流体体积在衬底的表面上流动，具有不同部分的流体体积具有不同构成组分，以同时将衬底的偏析区域暴露于与构成组分的混合物中，所述构成组分与相邻区域暴露于其中的构成组分不同 。 通过多个流动产生不同处理的分离区域。