Defocus-invariant exposure for regular patterns
    42.
    发明授权
    Defocus-invariant exposure for regular patterns 失效
    定焦模式的散焦不变曝光

    公开(公告)号:US06991895B1

    公开(公告)日:2006-01-31

    申请号:US10224186

    申请日:2002-08-20

    IPC分类号: G03F7/00

    摘要: For a 2-dimensional periodic array of contact holes or islands, a depth-of-focus-enhancement lithographic scheme based on a combination of alternating phase-shifting mask and off-axis illumination is revealed. The scheme is achieved by choosing appropriate off-axis illumination and smaller numerical aperture such that only two diffraction orders, which are of equal distance from the pupil center, are collected in the first exposure. The image of the 2-dimensional periodic array can be formed by superposing a second exposure on the first. In the second exposure, another appropriate off-axis illumination and smaller numerical aperture is chosen such that another two diffraction orders, which are also of equal distance from the pupil center, are collected.

    摘要翻译: 对于接触孔或岛的2维周期性阵列,揭示了基于交替移相掩模和离轴照明的组合的聚焦深度增强光刻方案。 该方案通过选择适当的离轴照明和较小的数值孔径来实现,使得在第一次曝光中仅收集与瞳孔中心相等距离的两个衍射级。 可以通过在第一曝光上叠加第二曝光来形成二维周期性阵列的图像。 在第二曝光中,选择另一适当的离轴照明和较小的数值孔径,以便收集距离瞳孔中心距离相等的另外两个衍射级。

    Photolithography system to increase overlay accuracy
    43.
    发明授权
    Photolithography system to increase overlay accuracy 有权
    光刻系统提高叠加精度

    公开(公告)号:US06768538B2

    公开(公告)日:2004-07-27

    申请号:US10000933

    申请日:2001-11-02

    IPC分类号: G03B2742

    CPC分类号: H01L21/67225

    摘要: A semiconductor photolithography system to improve overlay accuracy is disclosed. Such a system can include an exposure tool, at least one track, and a number of photoresist modules. The exposure tool performs functionality related to both at least a front-end and a back-end wafer. Each track has one or more paths to and from the exposure tool. The photoresist modules each perform functionality related to photoresist, on only either the front-end wafer or the back-end wafer, not both. Each module is located on one of the tracks. More specifically, a two-track system is disclosed, where each track has a path to and from the exposure tool, and a single-track system is disclosed having two paths to and from the exposure tool.

    摘要翻译: 公开了一种提高覆盖精度的半导体光刻系统。 这样的系统可以包括曝光工具,至少一个轨道和多个光致抗蚀剂模块。 曝光工具执行与至少前端和后端晶片相关的功能。 每个轨道都有一条或多条通往和来自曝光工具的路径。 光致抗蚀剂模块各自执行与光致抗蚀剂相关的功能,仅在前端晶片或后端晶片上,而不是两者。 每个模块位于其中一个轨道上。 更具体地,公开了一种双轨系统,其中每个轨道具有到达和来自曝光工具的路径,并且公开了具有到曝光工具和从曝光工具的两条路径的单轨道系统。

    Use of PE-SiON or PE-Oxide for contact or via photo and for defect reduction with oxide and w chemical-mechanical polish
    44.
    发明授权
    Use of PE-SiON or PE-Oxide for contact or via photo and for defect reduction with oxide and w chemical-mechanical polish 有权
    使用PE-SiON或PE氧化物进行接触或通过照相和氧化物和化学机械抛光剂进行缺陷还原

    公开(公告)号:US06458689B2

    公开(公告)日:2002-10-01

    申请号:US09818714

    申请日:2001-03-28

    IPC分类号: H01L214763

    摘要: A method forming a protective (SiON or PE-Ox) dielectric anti-reflective coating (DARC) over a dielectric layer after a chemical-mechanical polish dielectric layer planarization process and before a chemical-mechanical polish of a conductive layer used in a contact or via plug formation. A dielectric layer is chemical-mechanical polished thereby creating microscratches in the dielectric layer. The invention's protective SiON or PE-OX DARC layer is formed over the dielectric layer whereby the protective SiON or PE-OX DARC layer fills in the microscratches. A first opening is etched in he protective layer and the dielectric layer. A conductive layer is formed over the protective layer and fills the first opening. The conductive layer is chemical-mechanical polished to remove the conductive layer from over the protective layer and to form an interconnect filling the first opening. The protective SiON or PE-OX DARC layer is used as a CMP stop thereby preventing microscratches in the dielectric layer.

    摘要翻译: 在化学机械抛光介质层平坦化工艺之后和用于接触的导电层的化学机械抛光之前,在电介质层上形成保护性(SiON或PE-Ox)电介质抗反射涂层(DARC)的方法或 通过插塞形成。 电介质层被化学机械抛光,从而在电介质层中形成微细结构。 本发明的保护性SiON或PE-OX DARC层形成在电介质层上,由此保护性SiON或PE-OX DARC层填充在微细凹槽中。 在其保护层和电介质层中蚀刻第一开口。 导电层形成在保护层上并填充第一开口。 导电层被化学机械抛光以从保护层上方移除导电层并形成填充第一开口的互连。 使用保护性SiON或PE-OX DARC层作为CMP阻挡层,从而防止电介质层中的微细纹。

    Optical illumination system and associated exposure apparatus
    45.
    发明授权
    Optical illumination system and associated exposure apparatus 失效
    光学照明系统及相关曝光装置

    公开(公告)号:US06233039B1

    公开(公告)日:2001-05-15

    申请号:US09085970

    申请日:1998-05-27

    IPC分类号: G03B2742

    摘要: An embodiment of the instant invention is an optical illumination system for illuminating the mask of an exposure apparatus for transferring the image of the pattern on the mask onto the semiconductor wafer, the optical illumination system comprising: illumination means (illumination means 45 of FIG. 3) comprised of a plurality of light sources for emitting light beams along beam paths; and a lens system (lenses 55 and 57 of FIG. 3) for focusing the light beams to the wafer, the lens system comprising at least one lens element positioned in the beams paths. Preferably, the light sources are individually addressable point like sources, and the optical illumination system further comprising a light control means for operating each of the light sources independently of the others. The plurality of light sources is, preferably, comprised of a matrix addressable array of electro-optic modulators (preferably comprised of LCD modulators); an array of semiconductor lasers (preferably an array of Vertical Cavity Surface Emitting Lasers); or an array of bonded edge emitting DFB lasers.

    摘要翻译: 本发明的实施例是一种用于照射曝光装置的掩模以将掩模上的图案的图像转印到半导体晶片上的光学照明系统,该光学照明系统包括:照明装置(图3的照明装置45 ),包括用于沿光束路径发射光束的多个光源; 以及用于将光束聚焦到晶片的透镜系统(图3的透镜55和57),透镜系统包括位于光束路径中的至少一个透镜元件。 优选地,光源是可单独寻址的点状源,并且光学照明系统还包括用于独立于其它光源操作每个光源的光控制装置。 多个光源优选地由电光调制器的矩阵可寻址阵列(优选地由LCD调制器组成)组成; 半导体激光器阵列(优选地是垂直空腔表面发射激光器阵列); 或键合边缘发射DFB激光器的阵列。

    Reducing photoresist shrinkage via plasma treatment
    46.
    发明授权
    Reducing photoresist shrinkage via plasma treatment 失效
    通过等离子体处理减少光致抗蚀剂的收缩

    公开(公告)号:US06774044B2

    公开(公告)日:2004-08-10

    申请号:US10047266

    申请日:2002-01-14

    IPC分类号: H01L21302

    摘要: Reducing photoresist shrinkage by plasma treatment is disclosed. A semiconductor wafer having one or more photoresist layers is plasma treated, such as plasma curing, plasma etching, and/or high-density plasma etching the wafer. After plasma treating, one or more critical dimensions on the photoresist layers is measured using an electron beam, such as by using a scanning electron microscope (SEM). The plasma treating of the wafer prior to measuring the critical dimensions using the electron beam decreases shrinkage of the photoresist layer when using the electron beam.

    摘要翻译: 公开了通过等离子体处理降低光刻胶的收缩率。 具有一个或多个光致抗蚀剂层的半导体晶片被等离子体处理,例如等离子体固化,等离子体蚀刻和/或高密度等离子体蚀刻晶片。 在等离子体处理之后,使用电子束,例如通过使用扫描电子显微镜(SEM)测量光致抗蚀剂层上的一个或多个临界尺寸。 在使用电子束测量临界尺寸之前对晶片的等离子体处理降低了当使用电子束时光致抗蚀剂层的收缩。

    Process flow and pellicle type for 157 nm mask making
    47.
    发明授权
    Process flow and pellicle type for 157 nm mask making 失效
    157 nm掩模制作的工艺流程和防护薄膜

    公开(公告)号:US06720116B1

    公开(公告)日:2004-04-13

    申请号:US10339186

    申请日:2003-01-09

    IPC分类号: G03F900

    摘要: A method for forming a photomask and pellicle suitable for use in photolithography with incident electromagnetic radiation in a wavelength range from above 250 nm to below 150 nm. The opaque regions of the photomask are formed directly within a transparent F-doped quartz layer by either gallium ion staining using a focused ion beam (FIB) or by deposition of carbon atoms within trenches formed in the transparent layer, said carbon atom deposition being a result of the interaction of a FIB with styrene molecules. An alignment boundary formed on the resulting mask allows a hard pellicle to be fit directly over it so as to avoid warping.

    摘要翻译: 一种用于形成适用于光刻中的光掩模和防护薄膜的方法,其中入射电磁辐射的波长范围为250nm至150nm以下。 光掩模的不透明区域通过使用聚焦离子束(FIB)的镓离子染色或通过在形成在透明层中的沟槽内沉积碳原子而直接在透明的F掺杂的石英层内形成,所述碳原子沉积为 FIB与苯乙烯分子相互作用的结果。 形成在所得到的掩模上的对准边界允许硬防护薄膜直接配合在其上,以避免翘曲。

    Method and system for improved optical imaging in microlithography
    48.
    发明授权
    Method and system for improved optical imaging in microlithography 有权
    在微光刻中改进光学成像的方法和系统

    公开(公告)号:US06151103A

    公开(公告)日:2000-11-21

    申请号:US281530

    申请日:1999-03-30

    摘要: An improved microlithographic imaging system (100) is disclosed. The system comprises a filter (183) substantially aligned with a first image plane, adjacent to an aperture (185). The filter is formed in response to an image projected by a light source (110) through a reticle (160) onto the first image plane. The improved microlithographic imaging system has higher resolution and depth of focus than prior art imaging systems, due to the additional filtering performed by the filter (183). A filter in accordance with the invention can be fabricated easily and inexpensively, using conventional microlithography techniques. A filter in accordance with the invention can also be used to detect or correct flaws in the reticle (160).

    摘要翻译: 公开了一种改进的微光刻成像系统(100)。 该系统包括与第一图像平面基本对齐的滤光器(183),邻近孔(185)。 响应于由光源(110)通过掩模版(160)投影到第一图像平面上的图像而形成滤光器。 由于过滤器(183)执行的附加过滤,改进的微光刻成像系统具有比现有技术的成像系统更高的分辨率和更高的聚焦深度。 根据本发明的过滤器可以使用常规的微光刻技术容易且廉价地制造。 根据本发明的过滤器还可以用于检测或纠正标线(160)中的缺陷。

    Attenuated rim phase shift mask
    49.
    发明授权
    Attenuated rim phase shift mask 有权
    衰减边缘相移掩模

    公开(公告)号:US06593033B1

    公开(公告)日:2003-07-15

    申请号:US09399840

    申请日:1999-09-21

    IPC分类号: G03F900

    CPC分类号: G03F1/32 G03F1/29

    摘要: An embodiment of the instant invention is a mask having a pattern which is transferred to a layer overlying a semiconductor wafer, the mask comprising: a transmissive portion (structure 102 of FIG. 1), the transmissive portion allowing energy which impinges upon the transmission portion to substantially pass through the transmissive portion; a substantially non-transmissive portion (structure 106 of FIG. 1); a semi-transmissive portion (structure 104 of FIG. 1) situated between the transmissive portion and the substantially non-transmissive portion, energy passing through the semi-transmissive portion having a phase; and wherein the phase of energy which passes through the semi-transmissive portion is out of phase with the phase of energy which passes through the transmissive portion. Preferably, the phase of the energy which passes through the semi-transmissive portion is around 180 degrees out of phase with energy which passes through the transmissive portion.

    摘要翻译: 本发明的实施例是具有转移到覆盖半导体晶片的层的图案的掩模,掩模包括:透射部分(图1的结构102),透射部分允许撞击透射部分的能量 以基本上穿过透射部分; 基本上非透射部分(图1的结构106); 位于透射部分和基本上不透射部分之间的半透射部分(图1的结构104),穿过具有相位的半透射部分的能量; 并且其中穿过半透射部分的能量相位与通过透射部分的能量相位异相。 优选地,通过半透射部分的能量的相位与通过透射部分的能量相差大约180度。

    INTEGRATED METHOD OF FABRICATING A MEMORY DEVICE WITH REDUCED PITCH
    50.
    发明申请
    INTEGRATED METHOD OF FABRICATING A MEMORY DEVICE WITH REDUCED PITCH 审中-公开
    一种用减少PITCH制造存储器件的集成方法

    公开(公告)号:US20090035902A1

    公开(公告)日:2009-02-05

    申请号:US11831031

    申请日:2007-07-31

    IPC分类号: H01L21/336

    摘要: Provided is a method of fabricating a memory device. A substrate including an array region and a peripheral region is provided. A first feature and a second feature are formed in the array region. The first feature and the second feature have a first pitch. A plurality of spacers abutting each of the first feature and the second feature are formed. The plurality of spacers have a second pitch. A third feature in the peripheral region and a fourth and fifth feature in the array region are formed concurrently. The forth and fifth feature have the second pitch.

    摘要翻译: 提供一种制造存储器件的方法。 提供了包括阵列区域和外围区域的基板。 第一特征和第二特征形成在阵列区域中。 第一特征和第二特征具有第一音调。 形成邻接第一特征和第二特征的多个间隔件。 多个间隔件具有第二间距。 外围区域的第三特征和阵列区域中的第四和第五特征同时形成。 第四和第五特征具有第二音调。