公开(公告)号：US20230052830A1

公开(公告)日：2023-02-16

申请号：US17817736

申请日：2022-08-05

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Atapol PRAJUCKAMOL ,  Chee Hiong CHEW ,  Olaf ZSCHIESCHANG

IPC: H01L23/492 ,  H01L25/07 ,  H01L23/373 ,  H01L23/498 ,  H01L23/00 ,  H01L21/48

Abstract: A circuit module includes a substrate with a patterned metal surface. The patterned metal surface includes a conductive terminal pad, a first conductive pad, and a second conductive pad that is non-adjacent to the conductive terminal pad. A first circuit portion is assembled on the first conductive pad and a second circuit portion is assembled on the second conductive pad. A conductive bridge electrically couples the conductive terminal pad and the second conductive pad. The conductive bridge includes an elevated span extending above and across the first conductive pad.

公开(公告)号：US20220415767A1

公开(公告)日：2022-12-29

申请号：US17929898

申请日：2022-09-06

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Chee Hiong CHEW ,  Atapol PRAJUCKAMOL ,  Stephen ST. GERMAIN ,  Yusheng LIN

IPC: H01L23/495 ,  H01L23/40 ,  H01L23/00 ,  H01L25/065 ,  H01L23/367

Abstract: Implementations of semiconductor packages may include a first substrate having two or more die coupled to a first side, a clip coupled to each of the two or more die on the first substrate and a second substrate having two or more die coupled to a first side of the second substrate. A clip may be coupled to each of the two or more die on the second substrate. The package may include a lead frame between the first substrate and the second substrate and a molding compound. A second side of each of the first substrate and the second substrate may be exposed through the molding compound. A perimeter of the first substrate and a perimeter of the second substrate may not fully overlap when coupled through the lead frame.

公开(公告)号：US20210050272A1

公开(公告)日：2021-02-18

申请号：US17086932

申请日：2020-11-02

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Yushuang YAO ,  Chee Hiong CHEW ,  Atapol PRAJUCKAMOL

IPC: H01L23/053 ,  H01L23/08 ,  H01L23/18 ,  H01L23/498

Abstract: Implementations of a semiconductor package may include: a substrate, a case coupled to the substrate, and a plurality of press-fit pins. The plurality of press-fit pins may be fixedly coupled with the case. The plurality of press-fit pins may have at least one locking portion that extends from a side of the plurality of press-fit pins into the case and the plurality of press-fit pins may be electrically and mechanically coupled to the substrate.

公开(公告)号：US20190173215A1

公开(公告)日：2019-06-06

申请号：US16249429

申请日：2019-01-16

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Yushuang YAO ,  Chee Hiong CHEW ,  Atapol PRAJUCKAMOL

IPC: H01R13/05 ,  H01R43/16 ,  H01R12/58 ,  H01R12/57 ,  H01R43/02

CPC classification number: H01R13/05 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01R12/57 ,  H01R12/585 ,  H01R43/02 ,  H01R43/16 ,  H01L2924/00014

Abstract: Implementations of pins for semiconductor packages may include: an upper contact portion having a contact surface configured to mechanically and electrically couple with a pin receiver; a lower portion having a vertical stop and at least two curved legs; a horizontal base coupled directly to the at least two curved legs and configured to be soldered to a substrate to mechanically and electrically couple the pin to the substrate, the horizontal base having an upper contact surface, and; a gap between a bottom contact surface of the vertical stop and the upper contact surface of the horizontal base; wherein the at least two curved legs are configured to flex to allow the bottom contact surface of the vertical stop to move toward the upper contact surface of the horizontal base in response to a pressure applied to the pin along a direction collinear with a longest length of the pin toward the upper contact surface, and; wherein the vertical stop is configured to stop movement of the pin when the bottom contact surface contacts the upper contact surface.

公开(公告)号：US20190122963A1

公开(公告)日：2019-04-25

申请号：US16031948

申请日：2018-07-10

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Atapol PRAJUCKAMOL ,  Sw WANG ,  Kai Chat TAN

IPC: H01L23/495 ,  H01L23/498 ,  H01L23/00

Abstract: Implementations of a semiconductor package may include a first side of a die coupled to a first side of an electrically insulative layer, a second side of the electrically insulative layer coupled to a lead frame, and at least one ground stud physically coupled to the lead frame and to the die, the at least one ground stud extending from the second side of the electrically insulative layer into the electrically insulative layer from the lead frame. The die may be wire bonded to the lead frame.

公开(公告)号：US20170170582A1

公开(公告)日：2017-06-15

申请号：US15443671

申请日：2017-02-27

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Yushuang YAO ,  Chee Hiong CHEW ,  Atapol PRAJUCKAMOL

IPC: H01R12/58 ,  H01R43/02 ,  H01R43/16

CPC classification number: H01R13/05 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01R12/57 ,  H01R12/585 ,  H01R43/02 ,  H01R43/16 ,  H01L2924/00014

Abstract: Implementations of pins for semiconductor packages may include: an upper contact portion having a contact surface configured to mechanically and electrically couple with a pin receiver; a lower portion having a vertical stop and at least two curved legs; a horizontal base coupled directly to the at least two curved legs and configured to be soldered to a substrate to mechanically and electrically couple the pin to the substrate, the horizontal base having an upper contact surface, and; a gap between a bottom contact surface of the vertical stop and the upper contact surface of the horizontal base; wherein the at least two curved legs are configured to flex to allow the bottom contact surface of the vertical stop to move toward the upper contact surface of the horizontal base in response to a pressure applied to the pin along a direction collinear with a longest length of the pin toward the upper contact surface, and; wherein the vertical stop is configured to stop movement of the pin when the bottom contact surface contacts the upper contact surface.

公开(公告)号：US20170110843A1

公开(公告)日：2017-04-20

申请号：US15392011

申请日：2016-12-28

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Chee Hiong CHEW ,  Atapol PRAJUCKAMOL ,  Yusheng LIN

IPC: H01R43/16

Abstract: A press-fit pin for a semiconductor package includes a shaft terminating in a head. A pair of arms extends away from a center of the head. Each arm includes a curved shape and the arms together form an s-shape. A length of the s-shape is longer than the shaft diameter. An outer extremity of each arm includes a contact surface configured to electrically couple to and form a friction fit with a pin receiver. In implementations the press-fit pin has only two surfaces configured to contact an inner sidewall of the pin receiver and is configured to contact the inner sidewall at only two locations. The shaft may be a cylinder. The s-shape formed by the pair of arms is visible from a view facing a top of the press-fit pin along a direction parallel with the longest length of the shaft. Versions include a through-hole extending through the head.