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公开(公告)号：US20130262828A1
公开(公告)日：2013-10-03
申请号：US13796063
申请日：2013-03-12
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Seiichi Yoneda
IPC: G06F9/30
CPC classification number: G06F9/30145 , G06F1/32 , G06F1/3287 , G06F9/30083 , G06F9/30141 , G06F11/14 , G11C5/00 , Y02D10/171 , Y02D50/20
Abstract: A low-power processor that does not easily malfunction is provided. Alternatively, a low-power processor having high processing speed is provided. Alternatively, a method for driving the processor is provided. In power gating, the processor performs part of data backup in parallel with arithmetic processing and performs part of data recovery in parallel with arithmetic processing. Such a driving method prevents a sharp increase in power consumption in a data backup period and a data recovery period and generation of instantaneous voltage drops and inhibits increases of the data backup period and the data recovery period.
Abstract translation: 提供了一个不容易发生故障的低功耗处理器。 或者，提供具有高处理速度的低功率处理器。 或者，提供用于驱动处理器的方法。 在电源门控中，处理器与算术处理并行执行部分数据备份，并与算术处理并行执行部分数据恢复。 这种驱动方法防止数据备份期间和数据恢复期间的功率消耗急剧增加，并且产生瞬时电压下降并且阻止数据备份周期和数据恢复期间的增加。
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公开(公告)号：US12294805B2
公开(公告)日：2025-05-06
申请号：US18584020
申请日：2024-02-22
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Seiichi Yoneda , Hiroki Inoue
IPC: H04N25/78 , H04N25/709 , H04N25/77 , H10K39/32
Abstract: An imaging device with low power consumption is provided. A pixel includes a first circuit and a second circuit. The first circuit can generate imaging data and retain difference data that is a difference between the imaging data and data obtained in an initial frame. The second circuit includes a circuit that compares the difference data and a voltage range set arbitrarily. The second circuit supplies a reading signal based on the comparison result. With the use of the structure, reading from the pixel is not performed when it is determined that the difference data is within the set voltage range and reading from the pixel can be performed when it is determined that the difference data is outside the voltage range.
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公开(公告)号：US12238435B2
公开(公告)日：2025-02-25
申请号：US18668606
申请日：2024-05-20
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Takeya Hirose , Seiichi Yoneda , Hiroki Inoue , Takayuki Ikeda , Shunpei Yamazaki
IPC: H04N25/78 , H04N25/705 , H04N25/77
Abstract: An imaging device having a function of processing an image is provided. The imaging device has an additional function such as image processing, can hold analog data obtained by an image capturing operation in a pixel, and can extract data obtained by multiplying the analog data by a predetermined weight coefficient. Difference data between adjacent light-receiving devices can be obtained in a pixel, and data on luminance gradient can be obtained. When the data is taken in a neural network or the like, inference of distance data or the like can be performed. Since enormous volume of image data in the state of analog data can be held in pixels, processing can be performed efficiently.
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公开(公告)号：US12126344B2
公开(公告)日：2024-10-22
申请号：US18008287
申请日：2021-07-12
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Takeya Hirose , Seiichi Yoneda , Yusuke Negoro
IPC: H03K3/356 , H01L29/786
CPC classification number: H03K3/35613 , H01L29/78648 , H01L29/7869
Abstract: A semiconductor device with low power consumption can be provided. The semiconductor device includes a differential circuit and a latch circuit, the differential circuit includes a transistor including an oxide semiconductor in a channel formation region, and the latch circuit includes a transistor including a single semiconductor or a compound semiconductor in a channel formation region. The differential circuit and the latch circuit include an overlap region.
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公开(公告)号：US11991438B2
公开(公告)日：2024-05-21
申请号：US17626566
申请日：2020-07-09
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Seiichi Yoneda , Yusuke Negoro
IPC: H04N23/63 , H01L27/146
CPC classification number: H04N23/631 , H01L27/14605 , H01L27/14607 , H01L27/14616
Abstract: An imaging device capable of executing image processing is provided. An imaging device with low power consumption is provided. A highly reliable imaging device is provided. An imaging device with higher integration degree of pixels is provided. An imaging device manufactured at low cost is provided. The imaging device includes a photoelectric conversion device, a first transistor that is formed in a first layer and includes silicon in a channel formation layer, and a capacitor that is formed in a second layer bonded to the first layer. One of a source and a drain of the first transistor is electrically connected to one of electrodes of the photoelectric conversion device, and the other of the source and the drain of the first transistor is electrically connected to one of electrodes of the capacitor. A pixel having a function of generating first data and a function of multiplying the first data to have a given magnification to generate second data is included. The first data and the second data each have an analog value.
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Patent Agency Ranking
公开(公告)号：US11935899B2
公开(公告)日：2024-03-19
申请号：US17047740
申请日：2019-04-08
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Takahiko Ishizu , Seiichi Yoneda
IPC: H03K19/00 , H01L27/12 , H01L29/24 , H03K19/003 , H03K19/017 , H03K19/094 , H03K19/20
CPC classification number: H01L27/124 , H01L27/1259 , H01L29/24 , H03K19/00315 , H03K19/017 , H03K19/0941 , H03K19/20
Abstract: A semiconductor device capable of stable operation with low power consumption is provided. A logic circuit having a circuit configuration using a transistor including an oxide semiconductor in a channel formation region is included. The logic circuit is a two-input/two-output two-wire logic circuit. Transistors included in the logic circuit each include a gate and a back gate. An input terminal is electrically connected to one of a gate and a back gate of a transistor electrically connected to a wiring for supplying a high power supply potential. An output terminal is connected to the other of the gate and the back gate of the transistor electrically connected to the wiring for supplying a high power supply potential. An output terminal is electrically connected to one of a source and a drain of a transistor electrically connected to a wiring for supplying a low power supply potential. A gate or a back gate of the transistor electrically connected to the wiring for supplying a low power supply potential is electrically connected to an input terminal.
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公开(公告)号：US11917318B2
公开(公告)日：2024-02-27
申请号：US17768972
申请日：2020-10-27
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Seiichi Yoneda , Hiroki Inoue
IPC: H04N25/78 , H04N25/709 , H04N25/77 , H10K39/32
CPC classification number: H04N25/78 , H04N25/709 , H04N25/77 , H10K39/32
Abstract: An imaging device with low power consumption is provided. A pixel includes a first circuit and a second circuit. The first circuit can generate imaging data and retain difference data that is a difference between the imaging data and data obtained in an initial frame. The second circuit includes a circuit that compares the difference data and a voltage range set arbitrarily. The second circuit supplies a reading signal based on the comparison result. With the use of the structure, reading from the pixel is not performed when it is determined that the difference data is within the set voltage range and reading from the pixel can be performed when it is determined that the difference data is outside the voltage range.
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公开(公告)号：US11356089B2
公开(公告)日：2022-06-07
申请号：US17275213
申请日：2019-09-17
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Shunpei Yamazaki , Seiichi Yoneda , Atsushi Miyaguchi , Tatsunori Inoue
Abstract: Provided is a semiconductor device with a novel structure in which the power consumption can be reduced. The semiconductor device includes a sensor, a sample-and-hold circuit to which a sensor signal of the sensor is input, an analog-digital converter circuit to which an output signal of the sample-and-hold circuit is input, a control circuit, a battery, and an antenna. The sample-and-hold circuit includes a first selection circuit, a plurality of signal retention circuits, and a second selection circuit, and the control circuit performs a control so that a potential corresponding to the sensor signal is retained in the plurality of signal retention circuits successively by the first selection circuit in a first period during which power is supplied from the battery, and performs a control so that the output signal based on the potential retained in the plurality of signal retention circuits is output by the second selection circuit in a second period during which power is supplied from outside through the antenna.
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公开(公告)号：US11157360B2
公开(公告)日：2021-10-26
申请号：US16619506
申请日：2018-06-04
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Seiichi Yoneda , Takayuki Ikeda
Abstract: A semiconductor device that conducts error detection and correction on multilevel data is provided. The semiconductor device includes a first gray code converter circuit, a second gray code converter circuit, a gray code inverter circuit, an ECC encoder circuit, an ECC decoder circuit, and a memory portion. When input data is retained in the semiconductor device, the first gray code converter circuit converts the input data to data in a gray code format, and the ECC encoder circuit generates inspection data in accordance with the data. The memory portion retains the input data and the inspection data. When the input data that has been retained is output from the semiconductor device, the second gray code converter circuit converts the input data read out from the memory portion into data in a gray code format, and the ECC decoder circuit conducts error detection and correction on the data and the inspection data read out from the memory portion. After that, the gray code inverter circuit converts the corrected data to have the same format as that of the input data.
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公开(公告)号：US10200573B2
公开(公告)日：2019-02-05
申请号：US15173893
申请日：2016-06-06
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Seiichi Yoneda , Shuhei Maeda
Abstract: The imaging device includes a pixel array and first to seventh circuits. The first and second circuits select a pixel in the pixel array. The third circuit performs difference calculation between imaging data of the first frame and the second frame in the selected pixels. The fourth and the fifth circuits output addresses of the row and column of the pixels which has been subjected to the difference calculation. A row address and a column address for determining a specific region of the pixel array are stored in the sixth circuit. The seventh circuit compares coordinates included in the specific region with coordinates of pixels where a difference is detected. If the coordinates of the pixels where a difference is detected are included in the specific region which has been stored in the sixth circuit, imaging data is obtained again and is output to the external devices.
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