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162 条记录 (耗时 0.03 秒)

    High-speed data sampler for optical interconnect
    42.
    发明授权
    High-speed data sampler for optical interconnect 有权
    用于光互连的高速数据采样器

    公开(公告)号：US07386080B2

    公开(公告)日：2008-06-10

    申请号：US10673218

    申请日：2003-09-30

    申请人： Fabrice Paillet ,  Tanay Karnik ,  Jianping Xu

    发明人： Fabrice Paillet ,  Tanay Karnik ,  Jianping Xu

    IPC分类号： H04L7/00

    CPC分类号： H04L7/0079 ,  H03L7/0812 ,  H04L7/0008

    摘要： A system and method for sampling a data stream generates a number of clock signals having equally spaced phases and then samples a data stream using the clock signals. The clock phases are preferably based on a predetermined fraction of a data rate frequency of the data stream, and sampling is performed based on predetermined combinations of the clock signals. While the system and method is suitable for sampling data transmitted for a wide variety of data rates, the system and method is especially well-suited to sampling at data transmitted at high rates, for example, equal to or greater than 20 Gb/s.

    摘要翻译： 用于对数据流进行采样的系统和方法产生具有相等间隔相位的多个时钟信号，然后使用时钟信号对数据流进行采样。 时钟相位优选地基于数据流的数据速率频率的预定分数，并且基于时钟信号的预定组合来执行采样。 虽然系统和方法适合于为各种数据速率传输的数据采样，但是该系统和方法特别适合于以高速率传输的数据进行采样，例如等于或大于20Gb / s。

    Apparatus and method for multi-phase transformers
    43.
    发明授权
    Apparatus and method for multi-phase transformers 有权
    多相变压器的装置及方法

    公开(公告)号：US07315463B2

    公开(公告)日：2008-01-01

    申请号：US10956192

    申请日：2004-09-30

    申请人： Gerhard Schrom ,  Peter Hazucha ,  Donald S. Gardner ,  Vivek K. De ,  Tanay Karnik

    发明人： Gerhard Schrom ,  Peter Hazucha ,  Donald S. Gardner ,  Vivek K. De ,  Tanay Karnik

    IPC分类号： H02M5/00

    CPC分类号： H02M3/1584 ,  H01F27/38 ,  H01F27/42 ,  H01F37/00 ,  H01F2038/026

    摘要： A method and apparatus for multi-phase transformers are described. In one embodiment, a coupled inductor topology for the multi-phase transformers comprising N primary inductors. In one embodiment, each primary inductor is coupled to one of N input nodes and a common output node. The transformer further includes N−1 secondary inductors coupled in series between one input node and the common output node. In one embodiment, the N−1 secondary inductors are arranged to couple energy from N−1 of the primary inductors to provide a common node voltage as an average of N input node voltages, wherein N is an integer greater than two. Other embodiments are described and claimed.

    摘要翻译： 描述了用于多相变压器的方法和装置。 在一个实施例中，用于包括N个初级电感器的多相变压器的耦合电感器拓扑。 在一个实施例中，每个主电感器耦合到N个输入节点和公共输出节点之一。 变压器还包括串联耦合在一个输入节点和公共输出节点之间的N-1个次级电感器。 在一个实施例中，N-1次级电感器被布置成耦合来自初级电感器的N-1的能量，以提供公共节点电压作为N个输入节点电压的平均值，其中N是大于2的整数。 描述和要求保护其他实施例。

    Voltage regulator
    45.
    发明授权
    Voltage regulator 有权
    电压调节器

    公开(公告)号：US07265607B1

    公开(公告)日：2007-09-04

    申请号：US10930200

    申请日：2004-08-31

    申请人： Saravanan Rajapandian ,  Peter Hazucha ,  Tanay Karnik

    发明人： Saravanan Rajapandian ,  Peter Hazucha ,  Tanay Karnik

    IPC分类号： G05F1/10

    CPC分类号： G05F1/56

    摘要： A device comprises an active-pull-up stage and an active-pull-down stage. The device receives at least one reference voltage and provides an regulated output voltage to at least one load. The active-pull-up and active-pull-down stages are adapted to source or sink a current delivered to or received from the at least one load to regulate the output voltage provided to the at least one load. Other embodiments and methods are also claimed and described.

    摘要翻译： 一种装置包括有源上拉电平和有源下拉电平。 该装置接收至少一个参考电压，并向至少一个负载提供稳定的输出电压。 有源上拉和有源下拉级适于源或者传送传送到或从所述至少一个负载接收的电流以调节提供给所述至少一个负载的输出电压。 还要求和描述其他实施例和方法。

    Manufacturing integrated circuits and testing on-die power supplies using distributed programmable digital current sinks
    46.
    发明授权
    Manufacturing integrated circuits and testing on-die power supplies using distributed programmable digital current sinks 有权
    使用分布式可编程数字电流源制造集成电路和片上电源测试

    公开(公告)号：US07212021B2

    公开(公告)日：2007-05-01

    申请号：US10097136

    申请日：2002-03-12

    申请人： Tanay Karnik ,  Peter Hazucha

    发明人： Tanay Karnik ,  Peter Hazucha

    IPC分类号： G01R31/26

    CPC分类号： G01R31/31721 ,  G01R31/2839

    摘要： A method for designing and testing on-die power supply, power distribution, and noise suppression techniques for integrated circuits such as microprocessors is described. A network of time varying loads is distributed along the power supply grid to facilitate testing of new power supplies and grids and noise suppression techniques before design of the chip is completed. Several programmable current sinks are described for presenting loads according to a preferred test-waveform current. Transient, including droop detection, and static testing is easily performed using the described methods and circuitry.

    摘要翻译： 描述了一种用于集成电路（如微处理器）的片上电源，配电和噪声抑制技术的设计和测试方法。 时变负载网络沿着电源网格分布，以便在芯片设计完成之前便于测试新的电源和网格以及噪声抑制技术。 描述了几个可编程电流吸收器，用于根据优选的测试波形电流呈现负载。 使用所描述的方法和电路容易地执行瞬态，包括下垂检测和静态测试。

    Symmetric and non-stacked XOR circuit
    48.
    发明授权
    Symmetric and non-stacked XOR circuit 有权

    公开(公告)号：US07088138B2

    公开(公告)日：2006-08-08

    申请号：US10929412

    申请日：2004-08-31

    申请人： Jianping Xu ,  Fabrice Paillet ,  Tanay Karnik

    发明人： Jianping Xu ,  Fabrice Paillet ,  Tanay Karnik

    IPC分类号： H03K19/21

    CPC分类号： H03K19/215

    摘要： A CML XOR logic circuit is provided that includes a pair of pull-up transistors, a pair of current source transistors and a logic switch network coupled between the pull-up transistors and the current source transistors. The logic switch network including a plurality of transistors divided into a first branch, a second branch and a third branch. A tail current flows through the first branch, the second branch or the third branch based on at least two input signals to the plurality of transistors.

    Low-swing level shifter
    49.
    发明申请
    Low-swing level shifter 有权
    低摆幅电平转换器

    公开(公告)号：US20060170481A1

    公开(公告)日：2006-08-03

    申请号：US11047442

    申请日：2005-01-31

    申请人： Fabrice Paillet ,  David Rennie ,  Tanay Karnik ,  Jianping Xu

    发明人： Fabrice Paillet ,  David Rennie ,  Tanay Karnik ,  Jianping Xu

    IPC分类号： H03B1/00

    CPC分类号： H03K19/018507

    摘要： In general, in one aspect, the disclosure describes an apparatus for shifting a low swing signal. The apparatus includes a first pair of transistors to receive a first input signal and a second input signal and to generate a first output signal that is a shifted version of the first input signal. The apparatus further includes a second pair of transistors to receive the first input signal and the second input signal and to generate a second output signal that is a shifted version of the second input signal.

    摘要翻译： 通常，在一个方面，本公开描述了一种用于移动低挥杆信号的装置。 该装置包括第一对晶体管，用于接收第一输入信号和第二输入信号，并产生作为第一输入信号的偏移版本的第一输出信号。 该装置还包括第二对晶体管，用于接收第一输入信号和第二输入信号，并产生作为第二输入信号的移位版本的第二输出信号。

    Oscillator delay stage with active inductor
    50.
    发明申请
    Oscillator delay stage with active inductor 失效
    具有有源电感的振荡器延迟级

    公开(公告)号：US20060103479A1

    公开(公告)日：2006-05-18

    申请号：US10991976

    申请日：2004-11-18

    申请人： Fabrice Paillet ,  Tanay Karnik ,  Jianping Xu

    发明人： Fabrice Paillet ,  Tanay Karnik ,  Jianping Xu

    IPC分类号： H03K3/03

    CPC分类号： H03K3/0322 ,  H03K5/133 ,  H03K2005/00208 ,  H03L7/0995

    摘要： According to some embodiments, a circuit includes a ring oscillator delay stage. The delay stage may include a first transistor, a second transistor, and an active inductor. A gate of the first transistor may receive a first input signal, a gate of the second transistor may receive a second input signal, a source of the second transistor may be coupled to a source of the first transistor, and the active inductor may be coupled to a drain of the first transistor.

    摘要翻译： 根据一些实施例，电路包括环形振荡器延迟级。 延迟级可以包括第一晶体管，第二晶体管和有源电感器。 第一晶体管的栅极可以接收第一输入信号，第二晶体管的栅极可以接收第二输入信号，第二晶体管的源极可以耦合到第一晶体管的源极，并且有源电感器可以耦合 到第一晶体管的漏极。