公开(公告)号：US08791465B2

公开(公告)日：2014-07-29

申请号：US13549655

申请日：2012-07-16

申请人： Naoya Okamoto ,  Kozo Makiyama ,  Toshihiro Ohki ,  Yuichi Minoura ,  Shirou Ozaki ,  Toyoo Miyajima

发明人： Naoya Okamoto ,  Kozo Makiyama ,  Toshihiro Ohki ,  Yuichi Minoura ,  Shirou Ozaki ,  Toyoo Miyajima

IPC分类号： H01L21/48 ,  H01L21/285 ,  H01L29/423 ,  H01L29/47 ,  H01L29/872 ,  H01L29/778 ,  H01L29/20 ,  H01L29/43 ,  H01L23/31 ,  H01L23/29

CPC分类号： H01L21/31144 ,  H01L21/28 ,  H01L21/28581 ,  H01L23/291 ,  H01L23/3171 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/42316 ,  H01L29/432 ,  H01L29/475 ,  H01L29/7786 ,  H01L29/7787 ,  H01L29/872 ,  H01L2924/0002 ,  H01L2924/00

摘要： A compound semiconductor device includes a compound semiconductor laminated structure, a passivation film formed on the compound semiconductor laminated structure and having a through-hole, and a gate electrode formed on the passivation film so as to plug the through-hole. A grain boundary between different crystalline orientations is formed in the gate electrode, and a starting point of the grain boundary is located apart from the through-hole on a flat surface of the passivation film.

摘要翻译： 化合物半导体器件包括化合物半导体层叠结构，在化合物半导体层叠结构上形成并具有通孔的钝化膜以及形成在钝化膜上以便堵塞通孔的栅电极。 在栅电极中形成不同结晶取向之间的晶界，并且晶界的起始点与钝化膜的平坦表面上的通孔分开。

公开(公告)号：US08598571B2

公开(公告)日：2013-12-03

申请号：US13008353

申请日：2011-01-18

申请人： Toshihiro Ohki

发明人： Toshihiro Ohki

IPC分类号： H01L29/08

CPC分类号： H01L29/7787 ,  H01L21/28264 ,  H01L29/2003 ,  H01L29/51 ,  H01L29/66462 ,  H01L29/78

摘要： A method of manufacturing a compound semiconductor device, includes: forming a compound semiconductor lamination structure over a substrate; forming a metal film over the compound semiconductor lamination structure; forming a source electrode and a drain electrode over the metal film; forming one of a metal oxide film and a metal nitride film by one of oxidizing and nitriding a part of the metal film; and forming a gate electrode over the metal oxide film or the metal nitride film.

摘要翻译： 一种化合物半导体器件的制造方法，包括：在基板上形成化合物半导体层叠结构体; 在化合物半导体层叠结构上形成金属膜; 在所述金属膜上形成源电极和漏电极; 通过氧化和氮化金属膜的一部分来形成金属氧化物膜和金属氮化物膜之一; 以及在所述金属氧化物膜或所述金属氮化物膜上形成栅电极。

公开(公告)号：US08519441B2

公开(公告)日：2013-08-27

申请号：US13064748

申请日：2011-04-13

申请人： Toshihiro Ohki

发明人： Toshihiro Ohki

IPC分类号： H01L21/302

CPC分类号： H01L29/7787 ,  H01L29/2003 ,  H01L29/66462

摘要： A nitride semiconductor device has: a substrate; a semiconductor lamination formed on the substrate, and including a channel layer of nitride semiconductor; source and drain electrodes formed on the semiconductor lamination in ohmic contact with the channel layer; an insulating layer formed on the semiconductor lamination, and having an opening in a gate electrode contact area, a total thickness portion having a flat surface and a total thickness in an area spaced apart from the opening, and a transient portion with monotonically changing thickness between the opening and the total thickness portion, a sidewall of the insulating layer facing the opening rising steeply to a partial thickness of the total thickness; and a T-shaped gate electrode contacting the semiconductor lamination layer in the opening and extending on the insulating film to portions with increased thickness thicker than the partial thickness.

摘要翻译： 氮化物半导体器件具有：基板; 形成在所述基板上并包括氮化物半导体的沟道层的半导体层叠体; 源极和漏极形成在与沟道层欧姆接触的半导体层叠上; 形成在所述半导体层叠上的绝缘层，并且在栅电极接触区域中具有开口，具有平坦表面的总厚度部分和与所述开口间隔开的区域中的总厚度，以及在所述绝缘层之间具有单调变化的厚度 开口和总厚度部分，绝缘层的面向开口的侧壁急剧上升到总厚度的局部厚度; 以及在开口中与半导体层叠层接触并在绝缘膜上延伸到厚度比部分厚度厚的部分的T形栅电极。

公开(公告)号：US20130105810A1

公开(公告)日：2013-05-02

申请号：US13613158

申请日：2012-09-13

申请人： Masato Nishimori ,  Toshihiro Ohki ,  Toshihide Kikkawa

发明人： Masato Nishimori ,  Toshihiro Ohki ,  Toshihide Kikkawa

IPC分类号： H01L29/20 ,  H01L29/06 ,  H01L21/20

CPC分类号： H01L29/66462 ,  H01L29/0843 ,  H01L29/2003 ,  H01L29/7787 ,  H03F1/3247 ,  H03F3/189 ,  H03F3/245

摘要： A compound semiconductor device includes: a first compound semiconductor layer in which carriers are formed; a second compound semiconductor layer, provided above the first compound semiconductor layer, to supply the carriers; and a third compound semiconductor layer provided above the second compound semiconductor layer, wherein the third compound semiconductor layer includes a area that has a carrier concentration higher than a carrier concentration of the second compound semiconductor layer.

摘要翻译： 化合物半导体器件包括：形成载流子的第一化合物半导体层; 设置在所述第一化合物半导体层上方的第二化合物半导体层，以供应所述载体; 以及设置在所述第二化合物半导体层上方的第三化合物半导体层，其中所述第三化合物半导体层包括载流子浓度高于所述第二化合物半导体层的载流子浓度的区域。

公开(公告)号：US20130082307A1

公开(公告)日：2013-04-04

申请号：US13549655

申请日：2012-07-16

申请人： Naoya OKAMOTO ,  Kozo Makiyama ,  Toshihiro Ohki ,  Yuichi Minoura ,  Shirou Ozaki ,  Toyoo Miyajima

发明人： Naoya OKAMOTO ,  Kozo Makiyama ,  Toshihiro Ohki ,  Yuichi Minoura ,  Shirou Ozaki ,  Toyoo Miyajima

IPC分类号： H01L29/808 ,  H01L21/283

CPC分类号： H01L21/31144 ,  H01L21/28 ,  H01L21/28581 ,  H01L23/291 ,  H01L23/3171 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/42316 ,  H01L29/432 ,  H01L29/475 ,  H01L29/7786 ,  H01L29/7787 ,  H01L29/872 ,  H01L2924/0002 ,  H01L2924/00

摘要： A compound semiconductor device includes a compound semiconductor laminated structure, a passivation film formed on the compound semiconductor laminated structure and having a through-hole, and a gate electrode formed on the passivation film so as to plug the through-hole. A grain boundary between different crystalline orientations is formed in the gate electrode, and a starting point of the grain boundary is located apart from the through-hole on a flat surface of the passivation film.

摘要翻译： 化合物半导体器件包括化合物半导体层叠结构，在化合物半导体层叠结构上形成并具有通孔的钝化膜以及形成在钝化膜上以便堵塞通孔的栅电极。 在栅电极中形成不同结晶取向之间的晶界，并且晶界的起始点与钝化膜的平坦表面上的通孔分开。

公开(公告)号：US20110186859A1

公开(公告)日：2011-08-04

申请号：US13064748

申请日：2011-04-13

申请人： Toshihiro Ohki

发明人： Toshihiro Ohki

IPC分类号： H01L29/20

CPC分类号： H01L29/7787 ,  H01L29/2003 ,  H01L29/66462

摘要： A nitride semiconductor device has: a substrate; a semiconductor lamination formed on the substrate, and including a channel layer of nitride semiconductor; source and drain electrodes formed on the semiconductor lamination in ohmic contact with the channel layer; an insulating layer formed on the semiconductor lamination, and having an opening in a gate electrode contact area, a total thickness portion having a flat surface and a total thickness in an area spaced apart from the opening, and a transient portion with monotonically changing thickness between the opening and the total thickness portion, a sidewall of the insulating layer facing the opening rising steeply to a partial thickness of the total thickness; and a T-shaped gate electrode contacting the semiconductor lamination layer in the opening and extending on the insulating film to portions with increased thickness thicker than the partial thickness.

摘要翻译： 氮化物半导体器件具有：基板; 形成在所述基板上并包括氮化物半导体的沟道层的半导体层叠体; 源极和漏极形成在与沟道层欧姆接触的半导体层叠上; 形成在所述半导体层叠上的绝缘层，并且在栅电极接触区域中具有开口，具有平坦表面的总厚度部分和与所述开口间隔开的区域中的总厚度，以及在所述绝缘层之间具有单调变化的厚度 开口和总厚度部分，绝缘层的面向开口的侧壁急剧上升到总厚度的局部厚度; 以及在开口中与半导体层叠层接触并在绝缘膜上延伸到厚度比部分厚度厚的部分的T形栅电极。

公开(公告)号：US20100163929A1

公开(公告)日：2010-07-01

申请号：US12639546

申请日：2009-12-16

申请人： Toshihiro Ohki

发明人： Toshihiro Ohki

IPC分类号： H01L29/778 ,  H01L21/28

CPC分类号： H01L29/66462 ,  H01L29/2003 ,  H01L29/41758 ,  H01L29/452 ,  H01L29/7787

摘要： A compound semiconductor device includes a carrier transit layer formed over a substrate; a carrier supply layer formed over the carrier transit layer; a first metal film and a second metal film formed over the carrier supply layer; a first Al comprising film formed over the first metal film; a second Al comprising film formed over the second metal film; a first Au comprising film formed over the first metal film and is free of direct contact with the first Al comprising film; a second Au comprising film formed over the second metal film and free of direct contact with the second Al comprising film; and a gate electrode that is located over the carrier supply layer between the first metal film and the second metal film.

摘要翻译： 化合物半导体器件包括形成在衬底上的载流子迁移层; 载体供给层，形成在载体运送层上; 形成在所述载体供给层上的第一金属膜和第二金属膜; 在所述第一金属膜上形成的包含第一Al的膜; 在所述第二金属膜上形成的包含第二Al的膜; 在所述第一金属膜上形成的第一包含Au的膜，并且不与所述第一Al包覆膜直接接触; 第二Au包含膜，形成在所述第二金属膜上并且不与所述第二Al包含膜直接接触; 以及位于第一金属膜和第二金属膜之间的载体供给层上方的栅电极。