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公开(公告)号:US20080136574A1
公开(公告)日:2008-06-12
申请号:US11871896
申请日:2007-10-12
申请人: Uei-Ming Jow , Chang-Sheng Chen , Chin-Sun Shyu
发明人: Uei-Ming Jow , Chang-Sheng Chen , Chin-Sun Shyu
CPC分类号: H01F17/0006 , H01F41/041 , H01F2017/0066 , Y10T29/4902
摘要: Embedded inductor devices and fabrication methods thereof. An embedded inductor device includes a substrate, a conductive coil disposed on the substrate, and a patterned high-permeability (μr>1) magnetic layer on the substrate. The patterned high-permeability (μr>1) magnetic layer physically contacts the conductive coil. The conductive coil and the patterned high-permeability (μr>1) magnetic layer are intersected and substantially perpendicular to each other.
摘要翻译: 嵌入式电感器件及其制造方法。 嵌入式电感器件包括衬底,设置在衬底上的导电线圈和在衬底上的图案化高磁导率(μLr sub> 1)磁性层。 图案化的高磁导率(μLr/ 1)磁性层物理地接触导电线圈。 导电线圈和图案化的高磁导率磁性层彼此相交并基本上垂直。
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42.
公开(公告)号:US07345366B2
公开(公告)日:2008-03-18
申请号:US11131741
申请日:2005-05-18
申请人: Uei-Ming Jow , Min-Lin Lee , Shinn-Juh Lay , Chin-Sun Shyu , Chang-Sheng Chen
发明人: Uei-Ming Jow , Min-Lin Lee , Shinn-Juh Lay , Chin-Sun Shyu , Chang-Sheng Chen
CPC分类号: H05K1/0268 , G01R31/2818 , H05K1/0298 , H05K1/116 , H05K1/162 , H05K1/165 , H05K1/167
摘要: A multi-layered circuit board a built-in component including multiple terminals, at least one signal pad formed on a top surface of the multi-layered circuit board for signal transmission, each of the at least one signal pad corresponding to one of the multiple terminals, and at least one test pad formed on the top surface of the multi-layered circuit board, each of the at least one test pad corresponding to one of the at least one signal pad for testing an electric path extending from the one signal pad through the one terminal to the each of the at least one test pad.
摘要翻译: 一种多层电路板,包括多个端子的内置组件,至少一个形成在用于信号传输的多层电路板的顶表面上的信号焊盘,所述至少一个信号焊盘中的每一个对应于多个 端子和形成在多层电路板的顶表面上的至少一个测试焊盘,所述至少一个测试焊盘中的每一个对应于至少一个信号焊盘中的一个,用于测试从一个信号焊盘延伸的电路径 通过所述一个端子到所述至少一个测试垫中的每一个。
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公开(公告)号:US07308377B2
公开(公告)日:2007-12-11
申请号:US11591381
申请日:2006-11-01
申请人: Uei-Ming Jow , Chin-Sun Shyu , Chang-Sheng Chen , Min-Lin Lee , Shinn-Juh Lai
发明人: Uei-Ming Jow , Chin-Sun Shyu , Chang-Sheng Chen , Min-Lin Lee , Shinn-Juh Lai
IPC分类号: G01V1/00
CPC分类号: G01R31/2818 , G01R31/2805 , G01R31/304
摘要: A test method of an embedded capacitor and test system thereof are provided. The method and system are used to determine an electrical specification of the embedded capacitive component in a circuit board substrate, thereby avoiding executing a follow-up fabricating process for the circuit board substrate not satisfying the desired specification. In the method and system, a geometric size of the embedded capacitor is measured, and a relation value between the electrical parameter and the geometric size and a standard electrical parameter are obtained from a model database, to calculate the electrical parameter of the embedded capacitor. Then, the electrical parameter of the embedded capacitor is compared with the standard electrical parameter, to obtain an error value. Therefore, according to the error value, it may be acquired whether or not the circuit board substrate satisfies set electrical specifications.
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公开(公告)号:US20090183358A1
公开(公告)日:2009-07-23
申请号:US12354724
申请日:2009-01-15
申请人: Uei-Ming Jow , Chang-Sheng Chen , Chin-Sun Shyu
发明人: Uei-Ming Jow , Chang-Sheng Chen , Chin-Sun Shyu
IPC分类号: H01F7/06
CPC分类号: H01F17/0006 , H01F41/041 , H01F2017/0066 , Y10T29/4902
摘要: Embedded inductor devices and fabrication methods thereof. An embedded inductor device includes a substrate, a conductive coil disposed on the substrate, and a patterned high-permeability (μr>1) magnetic layer on the substrate. The patterned high-permeability (μr>1) magnetic layer physically contacts the conductive coil. The conductive coil and the patterned high-permeability (μr>1) magnetic layer are intersected and substantially perpendicular to each other.
摘要翻译: 嵌入式电感器件及其制造方法。 嵌入式电感器件包括衬底,设置在衬底上的导电线圈和衬底上的图案化高磁导率(mur> 1)磁性层。 图案化的高磁导率(mur> 1)磁性层与导电线圈物理接触。 导电线圈和图案化高磁导率(mur> 1)磁性层彼此相交并基本垂直。
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公开(公告)号:US07551052B2
公开(公告)日:2009-06-23
申请号:US11871896
申请日:2007-10-12
申请人: Uei-Ming Jow , Chang-Sheng Chen , Chin-Sun Shyu
发明人: Uei-Ming Jow , Chang-Sheng Chen , Chin-Sun Shyu
IPC分类号: H01F27/36
CPC分类号: H01F17/0006 , H01F41/041 , H01F2017/0066 , Y10T29/4902
摘要: Embedded inductor devices and fabrication methods thereof. An embedded inductor device includes a substrate, a conductive coil disposed on the substrate, and a patterned high-permeability (μr>1) magnetic layer on the substrate. The patterned high-permeability (μr>1) magnetic layer physically contacts the conductive coil. The conductive coil and the patterned high-permeability (μr>1) magnetic layer are intersected and substantially perpendicular to each other.
摘要翻译: 嵌入式电感器件及其制造方法。 嵌入式电感器件包括衬底,设置在衬底上的导电线圈和衬底上的图案化高磁导率(mur> 1)磁性层。 图案化的高磁导率(mur> 1)磁性层与导电线圈物理接触。 导电线圈和图案化高磁导率(mur> 1)磁性层彼此相交并基本垂直。
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公开(公告)号:US20080231402A1
公开(公告)日:2008-09-25
申请号:US12022967
申请日:2008-01-30
申请人: Uei-Ming Jow , Chang-Sheng Chen
发明人: Uei-Ming Jow , Chang-Sheng Chen
CPC分类号: H01F17/0013 , H01F17/0033 , H01F2005/006 , H01F2017/002 , H01F2017/004 , H01F2017/0053 , H01F2017/0073 , H01F2017/0086
摘要: The invention relates to a high frequency inductor device with high quality factor (Q). The inductor device comprises a substrate and a gradually sized conductive coil with a plurality of windings surrounded and disposed on the substrate. The windings comprises a first conductive segment disposed on a first surface of the substrate, a second conductive segment disposed on a second surface of the substrate, a first conductive via hole connecting the first and second conductive segments, and a second conductive via hole connecting the second conductive segment to a first conductive segment of the following winding. The length of the first conductive segment is different than that of the first conductive segment of the following winding
摘要翻译: 本发明涉及一种高品质因数(Q)的高频电感器件。 电感器件包括衬底和逐渐尺寸的导电线圈,其中多个绕组包围并设置在衬底上。 绕组包括设置在基板的第一表面上的第一导电段,设置在基板的第二表面上的第二导电段,连接第一和第二导电段的第一导电通孔,以及连接第 第二导电段连接到以下绕组的第一导电段。 第一导电段的长度不同于以下绕组的第一导电段的长度
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公开(公告)号:US08018397B2
公开(公告)日:2011-09-13
申请号:US12234427
申请日:2008-09-19
申请人: Uei-Ming Jow , Chang-Sheng Chen
发明人: Uei-Ming Jow , Chang-Sheng Chen
CPC分类号: H01Q1/38 , H01Q9/0407 , H01Q9/0485
摘要: A high dielectric antenna substrate includes a first dielectric layer having a first dielectric constant, and a second dielectric layer having a second dielectric constant. The second dielectric layer is formed on one surface of the first dielectric layer. The second dielectric constant is lower than the first dielectric constant. Furthermore, a first metal layer and a second metal layer are optionally formed on the same surface or two surfaces of the first dielectric layer to compose a capacitor.
摘要翻译: 高介电天线基板包括具有第一介电常数的第一电介质层和具有第二介电常数的第二电介质层。 第二电介质层形成在第一电介质层的一个表面上。 第二介电常数低于第一介电常数。 此外,第一金属层和第二金属层可选地形成在第一介电层的相同表面或两个表面上以构成电容器。
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公开(公告)号:US20070168148A1
公开(公告)日:2007-07-19
申请号:US11591381
申请日:2006-11-01
申请人: Uei-Ming Jow , Chin-Sun Shyu , Chang-Sheng Chen , Min-Lin Lee , Shinn-Juh Lai
发明人: Uei-Ming Jow , Chin-Sun Shyu , Chang-Sheng Chen , Min-Lin Lee , Shinn-Juh Lai
CPC分类号: G01R31/2818 , G01R31/2805 , G01R31/304
摘要: A test method of an embedded capacitor and test system thereof are provided. The method and system are used to determine an electrical specification of the embedded capacitive component in a circuit board substrate, thereby avoiding executing a follow-up fabricating process for the circuit board substrate not satisfying the desired specification. In the method and system, a geometric size of the embedded capacitor is measured, and a relation value between the electrical parameter and the geometric size and a standard electrical parameter are obtained from a model database, to calculate the electrical parameter of the embedded capacitor. Then, the electrical parameter of the embedded capacitor is compared with the standard electrical parameter, to obtain an error value. Therefore, according to the error value, it may be acquired whether or not the circuit board substrate satisfies set electrical specifications.
摘要翻译: 提供了一种嵌入式电容器及其测试系统的测试方法。 该方法和系统用于确定电路板基板中的嵌入式电容元件的电气规格,从而避免执行不满足期望规格的电路板基板的后续制造工艺。 在该方法和系统中,测量嵌入式电容器的几何尺寸,并从模型数据库中获得电参数和几何尺寸之间的关系值以及标准电参数,以计算嵌入式电容器的电参数。 然后,将嵌入式电容器的电气参数与标准电气参数进行比较,以获得误差值。 因此,根据误差值,可以获取电路板基板是否满足设定的电气规格。
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49.
公开(公告)号:US20060261482A1
公开(公告)日:2006-11-23
申请号:US11131741
申请日:2005-05-18
申请人: Uei-Ming Jow , Min-Lin Lee , Shinn-Juh Lay , Chin-Sun Shyu , Chang-Sheng Chen
发明人: Uei-Ming Jow , Min-Lin Lee , Shinn-Juh Lay , Chin-Sun Shyu , Chang-Sheng Chen
IPC分类号: H01L23/52
CPC分类号: H05K1/0268 , G01R31/2818 , H05K1/0298 , H05K1/116 , H05K1/162 , H05K1/165 , H05K1/167
摘要: A multi-layered circuit board a built-in component including multiple terminals, at least one signal pad formed on a top surface of the multi-layered circuit board for signal transmission, each of the at least one signal pad corresponding to one of the multiple terminals, and at least one test pad formed on the top surface of the multi-layered circuit board, each of the at least one test pad corresponding to one of the at least one signal pad for testing an electric path extending from the one signal pad through the one terminal to the each of the at least one test pad.
摘要翻译: 一种多层电路板,包括多个端子的内置组件,至少一个形成在用于信号传输的多层电路板的顶表面上的信号焊盘,所述至少一个信号焊盘中的每一个对应于多个 端子和形成在多层电路板的顶表面上的至少一个测试焊盘,所述至少一个测试焊盘中的每一个对应于至少一个信号焊盘中的一个,用于测试从一个信号焊盘延伸的电路径 通过所述一个端子到所述至少一个测试垫中的每一个。
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公开(公告)号:US20060267842A1
公开(公告)日:2006-11-30
申请号:US11261568
申请日:2005-10-31
申请人: Uei-Ming Jow
发明人: Uei-Ming Jow
IPC分类号: H01Q1/38
CPC分类号: H01Q1/36
摘要: A vertical complementary fractal antenna is provided, which includes a first fractal structure and a second fractal structure. The first fractal structure is defined as a superposition over at least one iteration of a motif, while the second fractal structure has a pattern complementary to that of the first fractal structure. Thus, the antenna may effectively increase bandwidth.
摘要翻译: 提供了一种垂直互补分形天线,其包括第一分形结构和第二分形结构。 第一分形结构被定义为在图案的至少一次迭代上的叠加,而第二分形结构具有与第一分形结构的图案互补的图案。 因此,天线可以有效地增加带宽。
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