公开(公告)号：US20190103408A1

公开(公告)日：2019-04-04

申请号：US16207171

申请日：2018-12-02

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： WANXUN HE ,  Su Xing

IPC: H01L27/11 ,  H01L21/8238 ,  H01L29/66 ,  H01L29/78 ,  H01L27/092 ,  H01L27/12 ,  H01L23/535

CPC classification number: H01L27/1104 ,  H01L21/823437 ,  H01L21/823462 ,  H01L21/823828 ,  H01L21/823871 ,  H01L27/092 ,  H01L27/1203 ,  H01L29/66484 ,  H01L29/7831 ,  H01L29/78648

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region and the substrate comprises a semiconductor layer on top of an insulating layer; forming a first front gate on the first region of the substrate and a second front gate on the second region of the substrate; removing part of the insulating layer under the first front gate; forming a first back gate on the insulating layer under the first front gate; and forming a second back gate under the second front gate.

公开(公告)号：US10153342B1

公开(公告)日：2018-12-11

申请号：US15794065

申请日：2017-10-26

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Wan-Xun He ,  Kui Mei ,  Su Xing

IPC: H01L29/06 ,  H01L29/423 ,  H01L29/10 ,  H01L29/49 ,  H01L29/08

Abstract: A semiconductor device includes a substrate; an active layer disposed over the substrate and having a source region and a drain region; a contact region disposed over the substrate; a gate structure disposed over the active layer, wherein the gate structure includes a middle portion and a lateral portion connecting to the middle portion, and the lateral portion has a snake shape.

公开(公告)号：US10062734B2

公开(公告)日：2018-08-28

申请号：US15849563

申请日：2017-12-20

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Wanxun He ,  Su Xing

IPC: H01L21/8234 ,  H01L45/00 ,  H01L27/24 ,  H01L29/786

CPC classification number: H01L21/82345 ,  H01L29/435 ,  H01L29/4908 ,  H01L29/7869

Abstract: A method for fabricating a semiconductor device includes the steps of: forming a channel layer on a substrate; forming a gate dielectric layer on the channel layer; forming a source layer near one side of the gate dielectric layer and a drain layer near another side of the gate dielectric layer; forming a bottom gate on the gate dielectric layer; forming a phase change layer on the bottom gate; and forming a top gate on the phase change layer.

公开(公告)号：US10008614B1

公开(公告)日：2018-06-26

申请号：US15464353

申请日：2017-03-21

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Wanxun He ,  Su Xing

IPC: H01L29/786 ,  H01L29/417 ,  H01L29/45 ,  H01L29/66

CPC classification number: H01L29/78696 ,  H01L27/1225 ,  H01L29/1054 ,  H01L29/41733 ,  H01L29/78648 ,  H01L29/7869

Abstract: A dual channel transistor includes a first gate electrode, a second gate electrode, a first gate insulation layer, a second gate insulation layer, a silicon semiconductor channel layer, and an oxide semiconductor channel layer. The first gate insulation layer is disposed on the first gate electrode. The silicon semiconductor channel layer is disposed on the first gate insulation layer. The oxide semiconductor channel layer is disposed on the silicon semiconductor channel layer. The second gate insulation layer is disposed on the oxide semiconductor channel layer. The second gate electrode is disposed on the second gate insulation layer.

公开(公告)号：US20180102434A1

公开(公告)日：2018-04-12

申请号：US15709450

申请日：2017-09-19

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： WANXUN HE ,  Su Xing

IPC: H01L29/78 ,  H01L29/24 ,  H01L21/467 ,  H01L21/441 ,  H01L29/08 ,  H01L29/10 ,  H01L29/66 ,  H01L29/423

CPC classification number: H01L29/7827 ,  H01L21/441 ,  H01L21/467 ,  H01L29/0847 ,  H01L29/1037 ,  H01L29/24 ,  H01L29/42364 ,  H01L29/42392 ,  H01L29/66969 ,  H01L29/7869

Abstract: A semiconductor device includes: a channel layer surrounded by a source layer; a first dielectric layer around the source layer; a gate layer around the channel layer and on the source layer; a first oxide semiconductor layer between the gate layer and the channel layer; a second oxide semiconductor layer between the gate layer and the drain layer; a second gate dielectric layer between the second oxide semiconductor layer and the drain layer; a drain layer on the gate layer and around the channel layer; and a second dielectric layer around the drain layer.

公开(公告)号：US09893066B2

公开(公告)日：2018-02-13

申请号：US15432165

申请日：2017-02-14

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Zhi-Biao Zhou ,  Shao-Hui Wu ,  Chi-Fa Ku ,  Chen-Bin Lin ,  Su Xing ,  Tien-Yu Hsieh

IPC: H01L29/49 ,  H01L27/105 ,  H01L27/12 ,  H01L29/786

CPC classification number: H01L27/1052 ,  H01L27/108 ,  H01L27/115 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L28/40 ,  H01L29/66742 ,  H01L29/7869

Abstract: A semiconductor transistor device includes an oxide semiconductor layer having an active surface, a source electrode, a drain electrode, a gate electrode and a control capacitor. The gate electrode, the source electrode and the drain electrode are directly in contact with the active surface. The gate electrode is disposed between the drain electrode and the source electrode. The gate electrode, the source electrode and the drain electrode are separated from each other. The control capacitor is electrically connected to the gate electrode through a connection.

公开(公告)号：US09806191B1

公开(公告)日：2017-10-31

申请号：US15289982

申请日：2016-10-11

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Wanxun He ,  Su Xing

IPC: H01L29/10 ,  H01L29/12 ,  H01L29/78 ,  H01L29/66 ,  H01L29/08 ,  H01L29/423 ,  H01L21/441 ,  H01L21/467 ,  H01L29/24

CPC classification number: H01L29/7827 ,  H01L21/441 ,  H01L21/467 ,  H01L29/0847 ,  H01L29/1037 ,  H01L29/24 ,  H01L29/42364 ,  H01L29/42392 ,  H01L29/66969 ,  H01L29/7869

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a source layer; removing part of the source layer to form a first opening; forming a first channel layer in the first opening; forming a gate layer around the first channel layer and on the source layer; forming a drain layer on the gate layer and the first channel layer; removing part of the drain layer to form a second opening; and forming a second channel layer in the second opening.

公开(公告)号：US09722093B1

公开(公告)日：2017-08-01

申请号：US15253896

申请日：2016-09-01

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Su Xing ,  Hsueh-Wen Wang ,  Chien-Yu Ko ,  Yu-Cheng Tung ,  Jen-Yu Wang ,  Cheng-Tung Huang ,  Yu-Ming Lin

IPC: H01L21/28 ,  H01L29/786 ,  H01L29/51 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L27/11585

CPC classification number: H01L29/7869 ,  H01L21/28291 ,  H01L27/11585 ,  H01L29/0649 ,  H01L29/4236 ,  H01L29/4908 ,  H01L29/516 ,  H01L29/66545 ,  H01L29/6684 ,  H01L29/66969

Abstract: An oxide semiconductor transistor includes an oxide semiconductor channel layer, a metal gate, a gate insulation layer, an internal electrode, and a ferroelectric material layer. The metal gate is disposed on the oxide semiconductor channel layer. The gate insulation layer is disposed between the metal gate and the oxide semiconductor channel layer. The internal electrode is disposed between the gate insulation layer and the metal gate. The ferroelectric material layer is disposed between the internal electrode and the metal gate. The ferroelectric material layer in the oxide semiconductor transistor of the present invention is used to enhance the electrical characteristics of the oxide semiconductor transistor.

公开(公告)号：US09627549B1

公开(公告)日：2017-04-18

申请号：US14874546

申请日：2015-10-05

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Zhi-Biao Zhou ,  Shao-Hui Wu ,  Chi-Fa Ku ,  Chen-Bin Lin ,  Su Xing ,  Tien-Yu Hsieh

IPC: H01L29/49 ,  H01L29/786 ,  H01L29/66 ,  H01L49/02 ,  H01L27/115 ,  H01L27/108

CPC classification number: H01L27/1052 ,  H01L27/108 ,  H01L27/115 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L28/40 ,  H01L29/66742 ,  H01L29/7869

Abstract: A semiconductor transistor device includes an oxide semiconductor layer having an active surface, a source electrode, a drain electrode, a gate electrode and a control capacitor. The gate electrode, the source electrode and the drain electrode are directly in contact with the active surface. The gate electrode is disposed between the drain electrode and the source electrode. The gate electrode, the source electrode and the drain electrode are separated from each other. The control capacitor is electrically connected to the gate electrode through a connection.

公开(公告)号：US20240063282A1

公开(公告)日：2024-02-22

申请号：US17950066

申请日：2022-09-21

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Purakh Raj Verma ,  Su Xing ,  JINYU LIAO

IPC: H01L29/423 ,  H01L29/786 ,  H01L27/12

CPC classification number: H01L29/42384 ,  H01L29/78618 ,  H01L27/1207 ,  H03F2200/294 ,  H03F3/16

Abstract: A semiconductor device includes a substrate having an active area, a first gate line extending along a first direction on the active area, a first gate line extension adjacent to the first gate line and outside the active area, a second gate line extending along the first direction on the active area and adjacent to the first gate line, and a second gate line extension adjacent to the second gate line and outside the active area. Preferably, the active area includes a first indentation and a second indentation, in which the first gate line extension overlaps the first indentation and the second gate line extension overlaps the first indentation.