公开(公告)号：US06694344B1

公开(公告)日：2004-02-17

申请号：US09436851

申请日：1999-11-09

申请人： Guenter Gerwig ,  Juergen Haess ,  Michael Kroener ,  Erwin Pfeffer

发明人： Guenter Gerwig ,  Juergen Haess ,  Michael Kroener ,  Erwin Pfeffer

IPC分类号： G06F1100

CPC分类号： G06F11/085 ,  G06F7/72 ,  H03M7/02

摘要： A process is provided for monitoring the conversion of numerical values from a first to a second format, where before and after the conversion, the modulo residue of the corresponding numerical value is calculated and compared with the corresponding residue after the conversion. In this way it is possible to effect error-free monitoring of such a conversion, especially of computer data, without great hardware expenditure.

摘要翻译： 提供了用于监视从第一格式到第二格式的数值的转换的过程，其中在转换之前和之后，计算相应数值的模余数并将其与转换后的相应残差进行比较。 以这种方式，可以在没有很好的硬件支出的情况下，对这种转换，特别是计算机数据进行无差错监视。

公开(公告)号：US6032233A

公开(公告)日：2000-02-29

申请号：US886304

申请日：1997-07-01

申请人： Peter Loffler ,  Erwin Pfeffer ,  Thomas Pfluger ,  Hans-Werner Tast

发明人： Peter Loffler ,  Erwin Pfeffer ,  Thomas Pfluger ,  Hans-Werner Tast

IPC分类号： G11C8/16 ,  G06F12/02

CPC分类号： G11C8/16

摘要： A set of storage devices together with a method for storing data to the storage devices and retrieving data from the storage devices is presented. The set of storage devices provide the function of a multi-writeport cell through the use of a set of single-writeport cells. The storage devices allow for multiple write accesses. Information contained in the set of storage device is represented by all of the devices together. The stored information may be retrieved via a read operation which accesses a subset of the set of storage devices. A write operation is a staged operation: First, the contents of all of the storage devices which are not to be modified are read. Next, the values that are to be written to a subset B of the set of storage devices are calculated in a way that the contents and the values of subset B together represent the desired result.

摘要翻译： 提供一组存储设备以及用于将数据存储到存储设备并从存储设备检索数据的方法。 该组存储设备通过使用一组单写入单元提供多写入单元的功能。 存储设备允许多次写访问。 包含在该组存储设备中的信息由所有设备一起表示。 存储的信息可以通过访问该组存储设备的子集的读取操作来检索。 写入操作是分阶段操作：首先，读取所有不被修改的存储设备的内容。 接下来，以将子集B的内容和值一起表示期望结果的方式计算要写入该组存储装置的子集B的值。

公开(公告)号：US08677098B2

公开(公告)日：2014-03-18

申请号：US11972688

申请日：2008-01-11

申请人： Dan F. Greiner ,  Charles W. Gainey, Jr. ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Timothy J. Slegel ,  Charles F. Webb

发明人： Dan F. Greiner ,  Charles W. Gainey, Jr. ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Timothy J. Slegel ,  Charles F. Webb

IPC分类号： G06F12/00 ,  G06F13/00 ,  G06F13/28

CPC分类号： G06F12/1027 ,  G06F9/30047 ,  G06F12/0215 ,  G06F12/1009 ,  G06F12/1036 ,  G06F12/145 ,  G06F2212/1052 ,  G06F2212/654 ,  G06F2212/656 ,  G06F2212/68

摘要： What is provided is an enhanced dynamic address translation facility. In one embodiment, a virtual address to be translated is first obtained and an initial origin address of a translation table of the hierarchy of translation tables is obtained. Based on the obtained initial origin, a segment table entry is obtained. The segment table entry is configured to contain a format control and access validity fields. If the format control and access validity fields are enabled, the segment table entry further contains an access control field, a fetch protection field, and a segment-frame absolute address. Store operations are permitted only if the access control field matches a program access key provided by any one of a Program Status Word or an operand of a program instruction being executed. Fetch operations are permitted if the program access key associated with the virtual address is equal to the segment access control field.

摘要翻译： 提供的是增强的动态地址转换设施。 在一个实施例中，首先获得要被翻译的虚拟地址，并且获得翻译表层级的翻译表的初始起始地址。 基于获得的初始来源，获得段表条目。 段表项被配置为包含格式控制和访问有效性字段。 如果启用格式控制和访问有效性字段，则段表条目还包含访问控制字段，提取保护字段和段帧绝对地址。 仅当访问控制字段与程序状态字或正在执行的程序指令的操作数提供的程序访问键匹配时，才允许存储操作。 如果与虚拟地址相关联的程序访问密钥等于段访问控制字段，则允许获取操作。

公开(公告)号：US08117417B2

公开(公告)日：2012-02-14

申请号：US11972694

申请日：2008-01-11

申请人： Dan F. Greiner ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Timothy J. Slegel ,  Charles F. Webb

发明人： Dan F. Greiner ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Timothy J. Slegel ,  Charles F. Webb

IPC分类号： G06F12/00 ,  G06F13/00 ,  G06F13/28

CPC分类号： G06F12/1009 ,  G06F9/30054 ,  G06F9/30101 ,  G06F9/455 ,  G06F12/1045 ,  G06F12/109 ,  G06F12/1475

摘要： What is provided is an enhanced dynamic address translation facility. In one embodiment, a virtual address to be translated and an initial origin address of a translation table of the hierarchy of translation tables are obtained. A segment table entry obtained from a segment table contains a format control field. If the format control field is enabled, a segment-frame absolute address of a large block of data in main storage is obtained from the segment table entry. Each 4K byte block of data within the large block has an associated storage key. Store operations associated with the virtual address are performed to the desired block of data. If the change recording override field is disabled, the change bit of the storage key associated with the desired 4K byte block is set to 1. An indication is then provided that the desired 4K byte block has been modified.

摘要翻译： 提供的是增强的动态地址转换设施。 在一个实施例中，获得要转换的虚拟地址和翻译表的层次结构的转换表的初始起始地址。 从段表获得的段表条目包含格式控制字段。 如果启用格式控制字段，则从段表条目获取主存储器中的大块数据的分段帧绝对地址。 大块内的每4K字节的数据块具有关联的存储密钥。 与虚拟地址相关联的存储操作被执行到期望的数据块。 如果改变记录覆盖字段被禁用，则与期望的4K字节块相关联的存储密钥的改变位被设置为1.然后提供所需的4K字节块已被修改的指示。

公开(公告)号：US20090216963A1

公开(公告)日：2009-08-27

申请号：US12037177

申请日：2008-02-26

申请人： Dan F. Greiner ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Donald W. Schmidt ,  Jaya Srikrishnan ,  Charles F. Webb ,  Leslie W. Wyman

发明人： Dan F. Greiner ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Donald W. Schmidt ,  Jaya Srikrishnan ,  Charles F. Webb ,  Leslie W. Wyman

IPC分类号： G06F12/00 ,  G06F12/02

CPC分类号： G06F12/00 ,  G06F12/0284 ,  G06F12/109 ,  G06F12/1441 ,  G06F2212/656

摘要： A system, method and computer program product for providing a shared memory translation facility. The method includes receiving a request for access to a memory address from a requestor at a configuration, the receiving at a shared memory translation mechanism. It is determined if the memory address refers to a shared memory object (SMO), the SMO accessible by a plurality of configurations. In response to determining that the memory address refers to the SMO, it is determined if the configuration has access to the SMO. In response to determining that the configuration has access to the SMO, the requestor is provided a system absolute address for the SMO and access to the SMO. In this manner direct interchange of data between the plurality of configurations is allowed.

摘要翻译： 一种用于提供共享存储器翻译设备的系统，方法和计算机程序产品。 该方法包括在配置下从请求者接收访问存储器地址的请求，在共享存储器转换机制处接收。 确定存储器地址是指共享存储器对象（SMO），SMO可由多个配置访问。 响应于确定存储器地址是指SMO，确定配置是否可以访问SMO。 响应于确定配置可以访问SMO，请求者为SMO提供系统绝对地址并访问SMO。 以这种方式允许在多个配置之间直接互换数据。

公开(公告)号：US20090187732A1

公开(公告)日：2009-07-23

申请号：US11972715

申请日：2008-01-11

申请人： DAN F. GREINER ,  Charles W. Gainey, JR. ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Timothy J. Slegel ,  Charles F. Webb

发明人： DAN F. GREINER ,  Charles W. Gainey, JR. ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Timothy J. Slegel ,  Charles F. Webb

IPC分类号： G06F12/10

CPC分类号： G06F12/1009 ,  G06F12/145 ,  G06F2212/651 ,  G06F2212/652

摘要： What is provided is an enhanced dynamic address translation facility. In one embodiment, a virtual address to be translated and an initial origin address of any one of a region first table, a region second table, a region third table, or a segment table are obtained. Based on the obtained initial origin address, a segment table entry is obtained which contains a format control and DAT protection fields. If the format control field is enabled, obtaining from the translation table entry a segment-frame absolute address of a large block of data in main storage. The segment-frame absolute address is combined with a page index portion and a byte index portion of the virtual address to form a translated address of the desired block of data. If the DAT protection field is not enabled, fetches and stores are permitted to the desired block of data addressed by the translated virtual address.

摘要翻译： 提供的是增强的动态地址转换设施。 在一个实施例中，获得要转换的虚拟地址和区域第一表，区域秒表，区域第三表或段表中的任何一个的初始起始地址。 基于获得的初始起始地址，获得包含格式控制和DAT保护字段的段表条目。 如果格式控制字段被使能，则从转换表条目获得主存储器中的大块数据的段帧绝对地址。 分段帧绝对地址与虚拟地址的页索引部分和字节索引部分组合，以形成所需数据块的转换地址。 如果DAT保护字段未被使能，则获取和存储被允许被转换的虚拟地址寻址的所需数据块。

公开(公告)号：US20090187728A1

公开(公告)日：2009-07-23

申请号：US11972694

申请日：2008-01-11

申请人： DAN F. GREINER ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Timothy J. Slegel ,  Charles F. Webb

发明人： DAN F. GREINER ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Timothy J. Slegel ,  Charles F. Webb

IPC分类号： G06F9/34

CPC分类号： G06F12/1009 ,  G06F9/30054 ,  G06F9/30101 ,  G06F9/455 ,  G06F12/1045 ,  G06F12/109 ,  G06F12/1475

摘要： What is provided is an enhanced dynamic address translation facility. In one embodiment, a virtual address to be translated and an initial origin address of a translation table of the hierarchy of translation tables are obtained. A segment table entry obtained from a segment table contains a format control field. If the format control field is enabled, a segment-frame absolute address of a large block of data in main storage is obtained from the segment table entry. Each 4K byte block of data within the large block has an associated storage key. Store operations associated with the virtual address are performed to the desired block of data. If the change recording override field is disabled, the change bit of the storage key associated with the desired 4K byte block is set to 1. An indication is then provided that the desired 4K byte block has been modified.

摘要翻译： 提供的是增强的动态地址转换设施。 在一个实施例中，获得要转换的虚拟地址和翻译表的层次结构的转换表的初始起始地址。 从段表获得的段表条目包含格式控制字段。 如果启用格式控制字段，则从段表条目获取主存储器中的大块数据的分段帧绝对地址。 大块内的每4K字节的数据块具有关联的存储密钥。 与虚拟地址相关联的存储操作被执行到期望的数据块。 如果改变记录覆盖字段被禁用，则与期望的4K字节块相关联的存储密钥的改变位被设置为1.然后提供所需的4K字节块已被修改的指示。

公开(公告)号：US20090182973A1

公开(公告)日：2009-07-16

申请号：US11972705

申请日：2008-01-11

申请人： DAN F. GREINER ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Timothy J. Slegel ,  Gustav E. Sittmann

发明人： DAN F. GREINER ,  Lisa C. Heller ,  Damian L. Osisek ,  Erwin Pfeffer ,  Timothy J. Slegel ,  Gustav E. Sittmann

IPC分类号： G06F9/34

CPC分类号： G06F12/1009 ,  G06F9/30043 ,  G06F9/30101 ,  G06F9/34 ,  G06F9/342 ,  G06F2212/651 ,  G06F2212/657

摘要： What is provided is a load real address function defined for a machine architecture of a computer system. In one embodiment, a machine instruction containing an opcode is obtained indicating that a load real address is to be performed. The instruction further identifies a first general register. Based on the contents of the machine instruction, a virtual address to be translated is obtained. Dynamic address translation is performed on the virtual address to obtain a segment-frame absolute address of a large block of data in memory. If an extended DAT facility and a format control field in the segment table entry are enabled, the address of the block of data is saved in the first general register. A page index portion and a byte index portion of the virtual address may also be saved in the first general register.

摘要翻译： 提供了为计算机系统的机器结构定义的负载实地址功能。 在一个实施例中，获得包含操作码的机器指令，指示要执行负载实际地址。 该指令进一步标识第一个通用寄存器。 根据机器指令的内容，获得要翻译的虚拟地址。 对虚拟地址执行动态地址转换，以获得存储器中大块数据的段帧绝对地址。 如果分段表项中的扩展DAT功能和格式控制字段被使能，数据块的地址将保存在第一个通用寄存器中。 虚拟地址的页索引部分和字节索引部分也可以保存在第一通用寄存器中。

公开(公告)号：US20070186075A1

公开(公告)日：2007-08-09

申请号：US11733224

申请日：2007-04-10

申请人： Timothy Slegel ,  Lisa Heller ,  Erwin Pfeffer ,  Kenneth Plambeck

发明人： Timothy Slegel ,  Lisa Heller ,  Erwin Pfeffer ,  Kenneth Plambeck

IPC分类号： G06F12/00

CPC分类号： G06F12/1027 ,  G06F9/30047 ,  G06F9/3824 ,  G06F12/1009 ,  G06F12/1036 ,  G06F12/109 ,  G06F2212/683

摘要： An instruction is provided to perform clearing of selected address translation buffer entries (TLB entries) associated with a particular address space, such as segments of storage or regions of storage. The buffer entries related to segment table entries or region table entries or ASCE addresses. The instruction can be implemented by software emulation, hardware, firmware or some combination thereof.

摘要翻译： 提供指令来执行与特定地址空间相关联的所选地址转换缓冲器条目（TLB条目）的清除，诸如存储段或存储区域。 缓冲区条目与段表项或区域表项或ASCE地址相关。 该指令可以通过软件仿真，硬件，固件或其组合来实现。

公开(公告)号：US20070055911A1

公开(公告)日：2007-03-08

申请号：US11460365

申请日：2006-07-27

申请人： Harald Boehm ,  Erwin Pfeffer ,  Joerg Walter

发明人： Harald Boehm ,  Erwin Pfeffer ,  Joerg Walter

IPC分类号： G06F11/00

CPC分类号： G06F11/261

摘要： The present invention relates to an automated method and system for transforming a hardware test-case within a system level into at least one unit test-case for a functional unit within a unit level, wherein the functional unit is a component of said hardware. The method comprises the steps of emulating a model of the hardware in the system level, applying the hardware test-case for the system level, recognizing and selecting an information relevant for the functional unit, transforming the information into commands for the functional unit and outputting the unit test-case for the functional unit.

摘要翻译： 本发明涉及一种自动化方法和系统，用于将系统级内的硬件测试用例变换为单元级别内的功能单元的至少一个单元测试用例，其中所述功能单元是所述硬件的组件。 该方法包括以下步骤：仿真系统级的硬件模型，应用系统级的硬件测试用例，识别和选择与功能单元相关的信息，将信息转换为功能单元的命令，并输出 功能单元的单元测试用例。