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119 条记录 (耗时 0.043 秒)

    Microwave oven
    41.
    发明授权
    Microwave oven 有权
    微波炉

    公开(公告)号：US08803051B2

    公开(公告)日：2014-08-12

    申请号：US12935804

    申请日：2009-04-01

    申请人： Sang-Ryul Lee ,  Kyu-Young Kim ,  Jae-Myung Chin ,  Dong-Han Kim ,  Si-Young Choi ,  Sung-Ho Choi

    发明人： Sang-Ryul Lee ,  Kyu-Young Kim ,  Jae-Myung Chin ,  Dong-Han Kim ,  Si-Young Choi ,  Sung-Ho Choi

    IPC分类号： H05B6/64 ,  H05B6/70

    CPC分类号： H05B6/708

    摘要： A microwave oven includes a cavity having a cooking chamber; a magnetron oscillating microwave radiation used for cooking food in the cooking chamber; and a plurality of radiation openings through which the microwave radiation is radiated into the cooking chamber, each of the radiation openings having a length in a direction where the microwave radiation is guided by a waveguide, the length being greater or less than λ/4.

    摘要翻译： 微波炉包括具有烹饪室的空腔; 用于在烹饪室中烹饪食物的磁控管振荡微波辐射; 以及多个辐射开口，微波辐射通过该辐射开口辐射到烹饪室中，每个辐射开口具有在微波辐射被波导引导的方向上的长度，该长度大于或小于λ/ 4。

    METHODS OF MANUFACTURING INTEGRATED CIRCUIT DEVICES INCLUDING A TRANSCRIPTION-PREVENTING PATTERN
    43.
    发明申请
    METHODS OF MANUFACTURING INTEGRATED CIRCUIT DEVICES INCLUDING A TRANSCRIPTION-PREVENTING PATTERN 审中-公开
    制造包含转录预防图案的集成电路设备的方法

    公开(公告)号：US20100330753A1

    公开(公告)日：2010-12-30

    申请号：US12879401

    申请日：2010-09-10

    申请人： Pil-Kyu Kang ,  Yong-Hoon Son ,  Si-Young Choi ,  Jong-Wook Lee ,  Byeong-Chan Lee ,  InSoo Jung

    发明人： Pil-Kyu Kang ,  Yong-Hoon Son ,  Si-Young Choi ,  Jong-Wook Lee ,  Byeong-Chan Lee ,  InSoo Jung

    IPC分类号： H01L21/336 ,  C30B1/02

    CPC分类号： H01L21/823425 ,  H01L21/823475

    摘要： Integrated circuit devices are provided including a first single-crystalline layer and an insulating layer pattern on the first single-crystalline layer. The insulating layer pattern has an opening therein that partially exposes the first single-crystalline layer. A seed layer is in the opening. A second single-crystalline layer is on the insulating layer pattern and the seed layer. The second single-crystalline layer has a crystalline structure substantially the same as that of the seed layer. A transcription-preventing pattern is on the second single-crystalline layer and a third single-crystalline layer on the transcription-preventing pattern and the second single-crystalline layer. The transcription-preventing pattern is configured to limit transcription of defective portions in the second single-crystalline layer into the third single-crystalline layer.

    摘要翻译： 在第一单晶层上提供包括第一单晶层和绝缘层图案的集成电路器件。 绝缘层图案在其中具有部分地暴露第一单晶层的开口。 种子层在开口处。 第二单晶层位于绝缘层图案和籽晶层上。 第二单晶层具有与种子层基本相同的晶体结构。 转录阻止图案位于转录阻止图案和第二单晶层上的第二单晶层和第三单晶层上。 转录阻止图案被配置为将第二单晶层中的缺陷部分的转录限制为第三单晶层。

    Method of forming oxide layer, and method of manufacturing semiconductor device
    44.
    发明申请
    Method of forming oxide layer, and method of manufacturing semiconductor device 审中-公开
    形成氧化物层的方法和制造半导体器件的方法

    公开(公告)号：US20100055856A1

    公开(公告)日：2010-03-04

    申请号：US12461896

    申请日：2009-08-27

    申请人： Soo-Jin Hong ,  Jong-Ryeol Yoo ,  Dong-Woon Shin ,  Si-Young Choi ,  Sun-Ghil Lee

    发明人： Soo-Jin Hong ,  Jong-Ryeol Yoo ,  Dong-Woon Shin ,  Si-Young Choi ,  Sun-Ghil Lee

    IPC分类号： H01L21/8242 ,  H01L21/31

    CPC分类号： H01L21/02236 ,  H01L21/022 ,  H01L21/31155 ,  H01L21/31641 ,  H01L27/10814 ,  H01L27/10894 ,  H01L27/10897

    摘要： A method of forming an oxide layer on a trench, a method of forming a semiconductor device, and a semiconductor device, the method of forming an oxide layer on a trench including forming a first trench in a first portion of a substrate and a second trench in a second portion of the substrate, the first portion being different from the second portion, performing a plasma doping process on at least one of the first portion and the second portion to implant an impurity therein, and performing an oxidation process to form an oxide layer on the substrate, a thickness of the oxide layer being determined by the impurity implanted in the substrate.

    摘要翻译： 在沟槽上形成氧化物层的方法，形成半导体器件的方法和半导体器件，在沟槽上形成氧化物层的方法，包括在衬底的第一部分中形成第一沟槽和第二沟槽 在所述衬底的第二部分中，所述第一部分与所述第二部分不同，在所述第一部分和所述第二部分中的至少一个上执行等离子体掺杂工艺以在其中注入杂质，并进行氧化处理以形成氧化物 层，该氧化物层的厚度由注入衬底中的杂质决定。

    Methods of forming semiconductor devices including Fin structures
    46.
    发明授权
    Methods of forming semiconductor devices including Fin structures 有权
    形成包括鳍结构的半导体器件的方法

    公开(公告)号：US07494877B2

    公开(公告)日：2009-02-24

    申请号：US11691529

    申请日：2007-03-27

    申请人： Deok-Hyung Lee ,  Si-Young Choi ,  Byeong-Chan Lee ,  Yong-Hoon Son ,  In-Soo Jung

    发明人： Deok-Hyung Lee ,  Si-Young Choi ,  Byeong-Chan Lee ,  Yong-Hoon Son ,  In-Soo Jung

    IPC分类号： H01L21/8234

    CPC分类号： H01L29/785 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823437 ,  H01L29/66553 ,  H01L29/66795

    摘要： A method of forming a semiconductor device may include forming a fin structure extending from a substrate. The fin structure may include first and second source/drain regions and a channel region therebetween, and the first and second source/drain regions may extend a greater distance from the substrate than the channel region. A gate insulating layer may be formed on the channel region, and a gate electrode may be formed on the gate insulating layer so that the gate insulating layer is between the gate electrode and the channel region. Related devices are also discussed.

    摘要翻译： 形成半导体器件的方法可以包括形成从衬底延伸的翅片结构。 翅片结构可以包括第一和第二源极/漏极区域和它们之间的沟道区域，并且第一和第二源极/漏极区域可以比沟道区域延伸比衬底更大的距离。 可以在沟道区上形成栅极绝缘层，并且可以在栅极绝缘层上形成栅电极，使得栅极绝缘层位于栅电极和沟道区之间。 还讨论了相关设备。

    Methods of fabricating vertical channel field effect transistors having insulating layers thereon
    47.
    发明授权
    Methods of fabricating vertical channel field effect transistors having insulating layers thereon 有权
    制造其上具有绝缘层的垂直沟道场效应晶体管的方法

    公开(公告)号：US07459359B2

    公开(公告)日：2008-12-02

    申请号：US11556804

    申请日：2006-11-06

    申请人： Tai-Su Park ,  Eui-Joon Yoon ,  U-In Chung ,  Si-Young Choi ,  Jong-Ho Lee

    发明人： Tai-Su Park ,  Eui-Joon Yoon ,  U-In Chung ,  Si-Young Choi ,  Jong-Ho Lee

    IPC分类号： H01L21/336 ,  H01L21/8234

    CPC分类号： H01L29/7851 ,  H01L29/66795 ,  H01L29/7854

    摘要： A method of forming a field effect transistor includes forming a vertical channel protruding from a substrate including a source/drain region junction between the vertical channel and the substrate, and forming an insulating layer extending on a side wall of the vertical channel toward the substrate to beyond the source/drain region junction. The method may also include forming a nitride layer extending on the side wall away from the substrate to beyond the insulating layer, forming a second insulating layer extending on the side wall that is separated from the channel by the nitride layer, and forming a gate electrode extending on the side wall toward the substrate to beyond the source/drain region junction.

    摘要翻译： 形成场效应晶体管的方法包括形成从包括垂直沟道和衬底之间的源极/漏极区域的衬底突出的垂直沟道，并且形成在垂直沟道的侧壁上朝向衬底延伸的绝缘层， 超出源/漏区结。 该方法还可以包括在侧壁上形成远离衬底延伸到绝缘层的氮化物层，形成在侧壁上延伸的第二绝缘层，所述第二绝缘层通过氮化物层从沟道分离，并形成栅电极 在侧壁上朝向衬底延伸超过源/漏区结。

    METHODS OF FORMING SEMICONDUCTOR DEVICES INCLUDING FIN STRUCTURES
    48.
    发明申请
    METHODS OF FORMING SEMICONDUCTOR DEVICES INCLUDING FIN STRUCTURES 有权
    形成FIN结构的半导体器件的方法

    公开(公告)号：US20070190732A1

    公开(公告)日：2007-08-16

    申请号：US11691529

    申请日：2007-03-27

    申请人： Deok-Hyung Lee ,  Si-Young Choi ,  Byeong-Chan Lee ,  Yong-Hoon Son ,  In-Soo Jung

    发明人： Deok-Hyung Lee ,  Si-Young Choi ,  Byeong-Chan Lee ,  Yong-Hoon Son ,  In-Soo Jung

    IPC分类号： H01L21/336

    CPC分类号： H01L29/785 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823437 ,  H01L29/66553 ,  H01L29/66795

    摘要： A method of forming a semiconductor device may include forming a fin structure extending from a substrate. The fin structure may include first and second source/drain regions and a channel region therebetween, and the first and second source/drain regions may extend a greater distance from the substrate than the channel region. A gate insulating layer may be formed on the channel region, and a gate electrode may be formed on the gate insulating layer so that the gate insulating layer is between the gate electrode and the channel region. Related devices are also discussed.

    摘要翻译： 形成半导体器件的方法可以包括形成从衬底延伸的翅片结构。 翅片结构可以包括第一和第二源极/漏极区域和它们之间的沟道区域，并且第一和第二源极/漏极区域可以比沟道区域延伸比衬底更大的距离。 可以在沟道区上形成栅极绝缘层，并且可以在栅极绝缘层上形成栅电极，使得栅极绝缘层位于栅电极和沟道区之间。 还讨论了相关设备。

    Methods of forming semiconductor devices including fin structures and related devices
    49.
    发明授权
    Methods of forming semiconductor devices including fin structures and related devices 有权
    形成包括鳍结构和相关器件的半导体器件的方法

    公开(公告)号：US07205609B2

    公开(公告)日：2007-04-17

    申请号：US10853616

    申请日：2004-05-25

    申请人： Deok-Hyung Lee ,  Si-Young Choi ,  Byeong-Chan Lee ,  Yong-Hoon Son ,  In-Soo Jung

    发明人： Deok-Hyung Lee ,  Si-Young Choi ,  Byeong-Chan Lee ,  Yong-Hoon Son ,  In-Soo Jung

    IPC分类号： H01L29/78

    CPC分类号： H01L29/785 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823437 ,  H01L29/66553 ,  H01L29/66795

    摘要： A method of forming a semiconductor device may include forming a fin structure extending from a substrate. The fin structure may include first and second source/drain regions and a channel region therebetween, and the first and second source/drain regions may extend a greater distance from the substrate than the channel region. A gate insulating layer may be formed on the channel region, and a gate electrode may be formed on the gate insulating layer so that the gate insulating layer is between the gate electrode and the channel region. Related devices are also discussed.

    摘要翻译： 形成半导体器件的方法可以包括形成从衬底延伸的翅片结构。 翅片结构可以包括第一和第二源极/漏极区域和它们之间的沟道区域，并且第一和第二源极/漏极区域可以比沟道区域延伸比衬底更大的距离。 可以在沟道区上形成栅极绝缘层，并且可以在栅极绝缘层上形成栅电极，使得栅极绝缘层位于栅电极和沟道区之间。 还讨论了相关设备。