公开(公告)号：US07532028B2

公开(公告)日：2009-05-12

申请号：US11863286

申请日：2007-09-28

申请人： Yu-Pin Chou

发明人： Yu-Pin Chou

IPC分类号： H03K17/16

CPC分类号： H03H7/40

摘要： The invention relates to an impedance matching circuit including: an input terminal for receiving an input signal; a variable impedance unit, coupled to the input terminal, having an equivalent impedance for providing the input terminal with an input impedance; a signal quality evaluating unit, coupled to the input terminal, for evaluating a signal quality of the input signal; and a control unit coupled to the variable impedance unit and the signal quality evaluating unit, for outputting a target control signal according to an evaluating result of the signal quality evaluating unit to adjust the equivalent impedance of the variable impedance unit.

摘要翻译： 本发明涉及一种阻抗匹配电路，包括：输入端，用于接收输入信号; 耦合到输入端的可变阻抗单元具有用于向输入端提供输入阻抗的等效阻抗; 信号质量评估单元，耦合到输入端，用于评估输入信号的信号质量; 以及耦合到所述可变阻抗单元和所述信号质量评估单元的控制单元，用于根据所述信号质量评估单元的评估结果输出目标控制信号，以调整所述可变阻抗单元的等效阻抗。

公开(公告)号：US20080079511A1

公开(公告)日：2008-04-03

申请号：US11863286

申请日：2007-09-28

申请人： Yu-Pin Chou

发明人： Yu-Pin Chou

IPC分类号： H03H7/40

CPC分类号： H03H7/40

摘要： The invention relates to an impedance matching circuit including: an input terminal for receiving an input signal; a variable impedance unit, coupled to the input terminal, having an equivalent impedance for providing the input terminal with an input impedance; a signal quality evaluating unit, coupled to the input terminal, for evaluating a signal quality of the input signal; and a control unit coupled to the variable impedance unit and the signal quality evaluating unit, for outputting a target control signal according to an evaluating result of the signal quality evaluating unit to adjust the equivalent impedance of the variable impedance unit.

摘要翻译： 本发明涉及一种阻抗匹配电路，包括：输入端，用于接收输入信号; 耦合到输入端的可变阻抗单元具有用于向输入端提供输入阻抗的等效阻抗; 信号质量评估单元，耦合到输入端，用于评估输入信号的信号质量; 以及耦合到所述可变阻抗单元和所述信号质量评估单元的控制单元，用于根据所述信号质量评估单元的评估结果输出目标控制信号，以调整所述可变阻抗单元的等效阻抗。

公开(公告)号：US20080061854A1

公开(公告)日：2008-03-13

申请号：US11847343

申请日：2007-08-30

申请人： Hsu-Jung Tung ,  Chi-Kung Kuan ,  Yu-Pin Chou

发明人： Hsu-Jung Tung ,  Chi-Kung Kuan ,  Yu-Pin Chou

IPC分类号： G06F1/04

CPC分类号： H04N7/56 ,  H04N5/04 ,  H04N5/126 ,  H04N5/602 ,  H04N21/2368 ,  H04N21/4305 ,  H04N21/4341 ,  H04N21/439

摘要： An apparatus for generating an audio output clock is disclosed. The apparatus at least includes a plurality of dividers and a frequency synthesizer. The apparatus utilizes the dividers to achieve dispersive frequency-division operations such that the anti-noise ability of the apparatus can be improved. In addition, the apparatus also utilizes dynamic phase adjustment to increase accuracy of the frequency of the audio output clock.

摘要翻译： 公开了一种用于产生音频输出时钟的装置。 该装置至少包括多个分频器和频率合成器。 该装置利用分频器实现色散分频操作，从而可以提高装置的抗噪声能力。 此外，该装置还利用动态相位调整来提高音频输出时钟频率的精度。

公开(公告)号：US07218261B2

公开(公告)日：2007-05-15

申请号：US11306638

申请日：2006-01-05

申请人： Jin-Sheng Gong ,  Yu-Pin Kuo ,  Yu-Pin Chou ,  Hung-Jen Chu

发明人： Jin-Sheng Gong ,  Yu-Pin Kuo ,  Yu-Pin Chou ,  Hung-Jen Chu

IPC分类号： H03M1/00

CPC分类号： H03M1/1245

摘要： A method of adjusting a sampling condition to generate a sampling clock in an analog to digital converter includes performing an analog to digital conversion on an analog input signal to thereby produce a digital sampled signal having a plurality of samples; calculating a difference value between two adjacent samples in the digital sampled signal; comparing the difference value with a threshold; adding the difference value into a sum of differences value if the difference value is greater than the threshold; and generating the sampling clock for the analog to digital converter according to the sum of differences value.

摘要翻译： 一种调整采样条件以在模数转换器中产生采样时钟的方法包括对模拟输入信号执行模数转换，从而产生具有多个采样的数字采样信号; 计算数字采样信号中两个相邻采样之间的差值; 将差值与阈值进行比较; 如果所述差值大于所述阈值，则将所述差值加到差值的和中; 并根据差值的和生成模数转换器的采样时钟。

公开(公告)号：US20060164551A1

公开(公告)日：2006-07-27

申请号：US11279251

申请日：2006-04-11

申请人： Chi-Feng Wang ,  Jui-Yuan Tsai ,  Yu-Pin Chou ,  Jin-Sheng Gong

发明人： Chi-Feng Wang ,  Jui-Yuan Tsai ,  Yu-Pin Chou ,  Jin-Sheng Gong

IPC分类号： H03M1/12 ,  H04N5/14 ,  H04N5/05 ,  H04N9/455 ,  H04N9/64 ,  H04N5/45 ,  H04N9/44

CPC分类号： G09G5/04 ,  G09G3/2092

摘要： An analog front-end (AFE) circuit of a digital display is disclosed including: a first circuit to intermittently invert a working clock to generate a control signal and to generate a sampling signal, wherein the sampling signal is corresponding to the working clock; a first analog-to-digital converter (ADC) coupled to the first circuit for converting an analog video signal into a first digital video signal according to the sampling signal; a second analog-to-digital converter coupled to the first circuit for converting the analog video signal into a second digital video signal according to the sampling signal; and a first multiplexer for selectively outputting the first digital video signal or the second digital video signal according to the control signal.

摘要翻译： 公开了一种数字显示器的模拟前端（AFE）电路，包括：第一电路，间歇地反转工作时钟以产生控制信号并产生采样信号，其中采样信号对应于工作时钟; 耦合到第一电路的第一模数转换器（ADC），用于根据采样信号将模拟视频信号转换成第一数字视频信号; 耦合到第一电路的第二模数转换器，用于根据采样信号将模拟视频信号转换成第二数字视频信号; 以及第一多路复用器，用于根据控制信号选择性地输出第一数字视频信号或第二数字视频信号。

公开(公告)号：US20050286626A1

公开(公告)日：2005-12-29

申请号：US11165029

申请日：2005-06-24

申请人： Yu-Pin Chou ,  Chao-Hsin Lu

发明人： Yu-Pin Chou ,  Chao-Hsin Lu

IPC分类号： H03K5/159 ,  H04L27/01

CPC分类号： H04L25/03019 ,  H04L2025/03764

摘要： A method for adjusting parameters of an adaptive equalizer makes use of a transmitted signal received by a receiving end to adjust parameters of an adaptive equalizer. First, signal strengths of a first frequency band and a second frequency band in the transmitted signal are detected. The signal strengths of the first frequency band and the second frequency band are then compared to get a compensation ratio, i.e., the total compensation quantity of the first frequency band to the second frequency band. Finally, the parameter setting of the equalizer is adjusted according to feedback of the compensation ratio. Optimum gain control of the adaptive equalizer can thus be accomplished to compensate signal attenuation to the transmitted signal caused by the channel.

摘要翻译： 用于调整自适应均衡器的参数的方法利用由接收端接收到的发送信号来调整自适应均衡器的参数。 首先，检测发送信号中的第一频带和第二频带的信号强度。 然后比较第一频带和第二频带的信号强度，以获得补偿比，即第一频带到第二频带的总补偿量。 最后，根据补偿比的反馈调整均衡器的参数设置。 因此，可以实现自适应均衡器的最佳增益控制，以补偿由信道引起的对发射信号的信号衰减。

公开(公告)号：US20050275612A1

公开(公告)日：2005-12-15

申请号：US11160229

申请日：2005-06-14

申请人： Yu-Pin Chou ,  Shiu-Rong Tong ,  Wen- Hsia Kung

发明人： Yu-Pin Chou ,  Shiu-Rong Tong ,  Wen- Hsia Kung

IPC分类号： G09G3/36

CPC分类号： G09G3/3614 ,  G09G3/3648 ,  G09G3/3688 ,  G09G2320/0247

摘要： A method for controlling an LCD to display an image. The method includes receiving a display data flow, generating a polarity signal, generating a gray-scale signal according to the polarity signal and the display data flow, and driving a pixel unit to display image according to the gray-scale signal. The polarity signal is substantially DC-balanced. A display utilizing such method may reduce the influence of flicker phenomenon.

摘要翻译： 一种用于控制LCD以显示图像的方法。 该方法包括接收显示数据流，产生极性信号，根据极性信号和显示数据流产生灰度信号，并驱动像素单元根据灰度信号显示图像。 极性信号基本上是直流平衡的。 利用这种方法的显示器可以减少闪烁现象的影响。

公开(公告)号：US06838912B1

公开(公告)日：2005-01-04

申请号：US10609535

申请日：2003-07-01

申请人： Yu-Pin Chou

发明人： Yu-Pin Chou

IPC分类号： H03D13/00

CPC分类号： H03D13/003

摘要： A digital fractional phase detector is shown that uses a phase error detector for generating a phase error signal based on the phase difference between a reference clock signal and a feedback clock signal. A quantizer directly measures the pulse width of a phase error signal and outputs the value in a digital form. By directly measuring the phase error signal, quantization accuracy is increased. In order to calibrate the digital fractional phase detector, a calibration pulse generator generates a calibration pulse of a known duration and passes it to the quantizer.

摘要翻译： 示出了一种数字分数相位检测器，其使用相位误差检测器基于参考时钟信号和反馈时钟信号之间的相位差产生相位误差信号。 量化器直接测量相位误差信号的脉冲宽度，并以数字形式输出该值。 通过直接测量相位误差信号，量化精度提高。 为了校准数字分数相位检测器，校准脉冲发生器产生已知持续时间的校准脉冲并将其传递给量化器。

公开(公告)号：US08362804B2

公开(公告)日：2013-01-29

申请号：US12726931

申请日：2010-03-18

申请人： Wen-Hsia Kung ,  Tzuo-Bo Lin ,  Chia-Lung Hung ,  Yu-Pin Chou

发明人： Wen-Hsia Kung ,  Tzuo-Bo Lin ,  Chia-Lung Hung ,  Yu-Pin Chou

IPC分类号： H03K19/0175

CPC分类号： H03K5/151 ,  H03K19/0008

摘要： A differential signal generating device includes a control circuit and a differential signal driver receiving a single-ended signal. The control circuit receives a source signal and generates a control signal corresponding to a first mode when the source signal conforms with a first pre-defined state, and corresponding to a second mode when the source signal conforms with a second pre-defined state. Variations of the source signal are related to signal content of the single-ended signal. The differential signal driver is coupled to the control unit for receiving the control signal therefrom. The differential signal driver outputs a differential signal output according to the single-ended signal when the control signal corresponds to the first mode. The differential signal driver outputs a non-differential signal output when the control signal corresponds to the second mode.

摘要翻译： 差分信号发生装置包括控制电路和接收单端信号的差分信号驱动器。 当源信号符合第一预定义状态时，控制电路接收源信号并产生对应于第一模式的控制信号，并且当源信号符合第二预定义状态时，控制电路对应于第二模式。 源信号的变化与单端信号的信号内容有关。 差分信号驱动器耦合到控制单元以从其接收控制信号。 当控制信号对应于第一模式时，差分信号驱动器根据单端信号输出差分信号。 当控制信号对应于第二模式时，差分信号驱动器输出非差分信号输出。

公开(公告)号：US08355081B2

公开(公告)日：2013-01-15

申请号：US12055649

申请日：2008-03-26

申请人： Wen-Hsia Kung ,  Yu-Pin Chou ,  Yi-Teng Chen

发明人： Wen-Hsia Kung ,  Yu-Pin Chou ,  Yi-Teng Chen

IPC分类号： H03L7/00 ,  H04N9/475 ,  G06F3/038

CPC分类号： H04N5/04 ,  G09G5/008 ,  G09G5/12 ,  H04N5/126 ,  H04N5/50 ,  H04N21/4305 ,  H04N21/44016

摘要： The invention discloses a display control device and method thereof. The display control device and method thereof utilize the phase deviation and the frequency deviation between the output signal and the input signal caused during channel switching to provide converting time acceptable by a display device and to achieve the objective of balancing the data stream transmission.

摘要翻译： 本发明公开了一种显示控制装置及其方法。 显示控制装置及其方法利用在通道切换期间引起的输出信号和输入信号之间的相位偏差和频率偏差，提供显示装置可接受的转换时间，并实现平衡数据流传输的目的。