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    Liquid Crystal Display Capable of Reducing Flicker and Method Thereof
    1.
    发明申请
    Liquid Crystal Display Capable of Reducing Flicker and Method Thereof 审中-公开
    能够减少闪烁的液晶显示器及其方法

    公开(公告)号：US20050275612A1

    公开(公告)日：2005-12-15

    申请号：US11160229

    申请日：2005-06-14

    申请人： Yu-Pin Chou ,  Shiu-Rong Tong ,  Wen- Hsia Kung

    发明人： Yu-Pin Chou ,  Shiu-Rong Tong ,  Wen- Hsia Kung

    IPC分类号： G09G3/36

    CPC分类号： G09G3/3614 ,  G09G3/3648 ,  G09G3/3688 ,  G09G2320/0247

    摘要： A method for controlling an LCD to display an image. The method includes receiving a display data flow, generating a polarity signal, generating a gray-scale signal according to the polarity signal and the display data flow, and driving a pixel unit to display image according to the gray-scale signal. The polarity signal is substantially DC-balanced. A display utilizing such method may reduce the influence of flicker phenomenon.

    摘要翻译： 一种用于控制LCD以显示图像的方法。 该方法包括接收显示数据流，产生极性信号，根据极性信号和显示数据流产生灰度信号，并驱动像素单元根据灰度信号显示图像。 极性信号基本上是直流平衡的。 利用这种方法的显示器可以减少闪烁现象的影响。

    Chip with adjustable pinout function and method thereof
    2.
    发明授权
    Chip with adjustable pinout function and method thereof 有权
    具有可调引脚排列功能的芯片及其方法

    公开(公告)号：US07372298B2

    公开(公告)日：2008-05-13

    申请号：US11277361

    申请日：2006-03-24

    申请人： Hung-Jen Chu ,  Chao-Hsin Lu ,  Shiu-Rong Tong ,  Yu-Pin Chou

    发明人： Hung-Jen Chu ,  Chao-Hsin Lu ,  Shiu-Rong Tong ,  Yu-Pin Chou

    IPC分类号： H03K19/173 ,  H03K19/00

    CPC分类号： G06F1/22 ,  H03K19/1732

    摘要： A chip with an adjustable pinout function is disclosed. The chip includes a first pinout, a second pinout, a logic circuit, and a selecting circuit. The logic circuit includes a first port and a second port. The selecting circuit, which is coupled to the logic circuit, the first pinout, and the second pinout, controls the first pinout to be coupled to the first port or the second port, and controls the second pinout to be coupled to the first port or the second port.

    摘要翻译： 公开了一种具有可调节引脚排列功能的芯片。 芯片包括第一引脚，第二引脚，逻辑电路和选择电路。 逻辑电路包括第一端口和第二端口。 耦合到逻辑电路，第一引脚排列和第二引脚分布的选择电路控制第一引脚被耦合到第一端口或第二端口，并且控制第二引脚分布以耦合到第一端口或 第二个港口。

    CHIP WITH ADJUSTABLE PINOUT FUNCTION AND METHOD THEREOF
    3.
    发明申请
    CHIP WITH ADJUSTABLE PINOUT FUNCTION AND METHOD THEREOF 有权
    具有可调节引脚功能的芯片及其方法

    公开(公告)号：US20060220687A1

    公开(公告)日：2006-10-05

    申请号：US11277361

    申请日：2006-03-24

    申请人： Hung-Jen Chu ,  Chao-Hsin Lu ,  Shiu-Rong Tong ,  Yu-Pin Chou

    发明人： Hung-Jen Chu ,  Chao-Hsin Lu ,  Shiu-Rong Tong ,  Yu-Pin Chou

    IPC分类号： H03K19/00

    CPC分类号： G06F1/22 ,  H03K19/1732

    摘要： A chip with an adjustable pinout function is disclosed. The chip includes a first pinout, a second pinout, a logic circuit, and a selecting circuit. The logic circuit includes a first port and a second port. The selecting circuit, which is coupled to the logic circuit, the first pinout, and the second pinout, controls the first pinout to be coupled to the first port or the second port, and controls the second pinout to be coupled to the first port or the second port.

    摘要翻译： 公开了一种具有可调节引脚排列功能的芯片。 芯片包括第一引脚，第二引脚，逻辑电路和选择电路。 逻辑电路包括第一端口和第二端口。 耦合到逻辑电路，第一引脚排列和第二引脚分布的选择电路控制第一引脚被耦合到第一端口或第二端口，并且控制第二引脚分布以耦合到第一端口或 第二个港口。

    Noise processing device and method thereof
    4.
    发明授权
    Noise processing device and method thereof 有权
    噪声处理装置及其方法

    公开(公告)号：US08059831B2

    公开(公告)日：2011-11-15

    申请号：US11436574

    申请日：2006-05-19

    申请人： Shiu-Rong Tong ,  Tsung-Li Yeh ,  Yu-Pin Chou ,  Tzuo-Bo Lin

    发明人： Shiu-Rong Tong ,  Tsung-Li Yeh ,  Yu-Pin Chou ,  Tzuo-Bo Lin

    IPC分类号： H04B15/00

    CPC分类号： H04N5/775 ,  G11B20/10527 ,  G11B20/24 ,  H04N5/4401 ,  H04N5/602 ,  H04N5/781 ,  H04N5/85 ,  H04N9/7908 ,  H04N9/8063 ,  H04N21/4325 ,  H04N21/439

    摘要： A noise processing device and its method are provided for a video/audio system having a high definition multimedia interface (HDMI). The noise processing device includes a detecting unit, a signal generating unit, and a decision unit. The noise processing method includes using the detecting unit to monitor a variation related to an audio signal and generate a detecting signal accordingly; using the signal generating unit to produce an adjustment signal according to the detecting signal; and using the decision unit to produce an output audio signal according to the audio signal and the adjustment signal. Another embodiment of the noise processing device includes a compensation tracking unit having a control unit. The compensation tracking unit produces an output audio signal according to a difference between the output audio signal itself and the audio signal and a gain of the control unit.

    摘要翻译： 为具有高分辨率多媒体接口（HDMI）的视频/音频系统提供噪声处理装置及其方法。 噪声处理装置包括检测单元，信号生成单元和判定单元。 噪声处理方法包括使用检测单元来监视与音频信号相关的变化并相应地生成检测信号; 使用所述信号产生单元根据所述检测信号产生调整信号; 以及使用所述判定单元根据所述音频信号和所述调整信号产生输出音频信号。 噪声处理装置的另一实施例包括具有控制单元的补偿跟踪单元。 补偿跟踪单元根据输出音频信号本身和音频信号之间的差异以及控制单元的增益产生输出音频信号。

    Noise processing device and method thereof
    5.
    发明申请
    Noise processing device and method thereof 有权
    噪声处理装置及其方法

    公开(公告)号：US20060263064A1

    公开(公告)日：2006-11-23

    申请号：US11436574

    申请日：2006-05-19

    申请人： Shiu-Rong Tong ,  Tsung-Li Yeh ,  Yu-Pin Chou ,  Tzuo-Bo Lin

    发明人： Shiu-Rong Tong ,  Tsung-Li Yeh ,  Yu-Pin Chou ,  Tzuo-Bo Lin

    IPC分类号： H04N7/00

    CPC分类号： H04N5/775 ,  G11B20/10527 ,  G11B20/24 ,  H04N5/4401 ,  H04N5/602 ,  H04N5/781 ,  H04N5/85 ,  H04N9/7908 ,  H04N9/8063 ,  H04N21/4325 ,  H04N21/439

    摘要： A noise processing device and its method are provided for a video/audio system having a high definition multimedia interface (HDMI). The noise processing device includes a detecting unit, a signal generating unit, and a decision unit. The noise processing method includes using the detecting unit to monitor a variation related to an audio signal and generate a detecting signal accordingly; using the signal generating unit to produce an adjustment signal according to the detecting signal; and using the decision unit to produce an output audio signal according to the audio signal and the adjustment signal. Another embodiment of the noise processing device includes a compensation tracking unit having a control unit. The compensation tracking unit produces an output audio signal according to a difference between the output audio signal itself and the audio signal and a gain of the control unit.

    摘要翻译： 为具有高分辨率多媒体接口（HDMI）的视频/音频系统提供噪声处理装置及其方法。 噪声处理装置包括检测单元，信号生成单元和判定单元。 噪声处理方法包括使用检测单元来监视与音频信号相关的变化并相应地生成检测信号; 使用所述信号产生单元根据所述检测信号产生调整信号; 以及使用所述判定单元根据所述音频信号和所述调整信号产生输出音频信号。 噪声处理装置的另一实施例包括具有控制单元的补偿跟踪单元。 补偿跟踪单元根据输出音频信号本身和音频信号之间的差异以及控制单元的增益产生输出音频信号。

    Differential signal generating device with low power consumption
    6.
    发明授权
    Differential signal generating device with low power consumption 有权
    差分信号发生装置，功耗低

    公开(公告)号：US08362804B2

    公开(公告)日：2013-01-29

    申请号：US12726931

    申请日：2010-03-18

    申请人： Wen-Hsia Kung ,  Tzuo-Bo Lin ,  Chia-Lung Hung ,  Yu-Pin Chou

    发明人： Wen-Hsia Kung ,  Tzuo-Bo Lin ,  Chia-Lung Hung ,  Yu-Pin Chou

    IPC分类号： H03K19/0175

    CPC分类号： H03K5/151 ,  H03K19/0008

    摘要： A differential signal generating device includes a control circuit and a differential signal driver receiving a single-ended signal. The control circuit receives a source signal and generates a control signal corresponding to a first mode when the source signal conforms with a first pre-defined state, and corresponding to a second mode when the source signal conforms with a second pre-defined state. Variations of the source signal are related to signal content of the single-ended signal. The differential signal driver is coupled to the control unit for receiving the control signal therefrom. The differential signal driver outputs a differential signal output according to the single-ended signal when the control signal corresponds to the first mode. The differential signal driver outputs a non-differential signal output when the control signal corresponds to the second mode.

    摘要翻译： 差分信号发生装置包括控制电路和接收单端信号的差分信号驱动器。 当源信号符合第一预定义状态时，控制电路接收源信号并产生对应于第一模式的控制信号，并且当源信号符合第二预定义状态时，控制电路对应于第二模式。 源信号的变化与单端信号的信号内容有关。 差分信号驱动器耦合到控制单元以从其接收控制信号。 当控制信号对应于第一模式时，差分信号驱动器根据单端信号输出差分信号。 当控制信号对应于第二模式时，差分信号驱动器输出非差分信号输出。

    Mode detecting circuit and method thereof
    8.
    发明授权
    Mode detecting circuit and method thereof 有权
    模式检测电路及其方法

    公开(公告)号：US09082332B2

    公开(公告)日：2015-07-14

    申请号：US12128372

    申请日：2008-05-28

    申请人： Yu-Pin Chou ,  Szu-Ping Chen ,  Yu Jen Lin

    发明人： Yu-Pin Chou ,  Szu-Ping Chen ,  Yu Jen Lin

    IPC分类号： G09G5/02 ,  G09G5/00

    CPC分类号： G06T1/60 ,  G09G3/28 ,  G09G3/36 ,  G09G5/005 ,  G09G2310/08 ,  G09G2340/0414 ,  G09G2340/0421

    摘要： The invention discloses a mode detection circuit and a method thereof, for detecting an image signal, the image signal includes a horizontal resolution and the vertical resolution. The mode detection circuit includes a measuring unit, a calculation unit, and a decision unit. The measuring unit receives a clock signal and is used to count the clock signal to output a first counting value and the second counting value. The calculation unit is used to perform the calculation with the first counting value and the second counting value and thereby outputting a calculating value, wherein the calculating value outputted by the calculation unit is corresponding to the ratio of the first counting value to the second counting value. The decision unit is used to determine the horizontal resolution or the vertical resolution according to the calculating value.

    摘要翻译： 本发明公开了一种模式检测电路及其方法，用于检测图像信号，图像信号包括水平分辨率和垂直分辨率。 模式检测电路包括测量单元，计算单元和判定单元。 测量单元接收时钟信号，并用于对时钟信号进行计数以输出第一计数值和第二计数值。 计算单元用于执行具有第一计数值和第二计数值的计算，从而输出计算值，其中由计算单元输出的计算值对应于第一计数值与第二计数值的比率 。 决策单元用于根据计算值确定水平分辨率或垂直分辨率。

    Display processing device and timing controller thereof
    9.
    发明授权
    Display processing device and timing controller thereof 有权

    公开(公告)号：US08514206B2

    公开(公告)日：2013-08-20

    申请号：US12314601

    申请日：2008-12-12

    申请人： Yu-Pin Chou ,  Tzuo-Bo Lin ,  Ming-Syun Wu

    发明人： Yu-Pin Chou ,  Tzuo-Bo Lin ,  Ming-Syun Wu

    IPC分类号： G09G5/00

    CPC分类号： G09G5/006 ,  G09G5/005 ,  G09G2370/12

    摘要： A timing controller for a display processing device includes: a plurality of predetermined pins for receiving an image signal by a pin-share method, wherein the image signal is a first format image signal or a second format image signal; a detector coupled to the predetermined pins and for detecting at least one of the predetermined pins to determine whether the image signal is the first format image signal or the second format image signal and outputting a detection result; and a processor coupled to the detector and for processing the image signal according to the detection result to generate and output a timing control signal.

    Synchronization Determining Circuit, Receiver Including the Synchronization Determining Circuit, and Method of the Receiver
    10.
    发明申请
    Synchronization Determining Circuit, Receiver Including the Synchronization Determining Circuit, and Method of the Receiver 有权
    同步确定电路，包括同步确定电路的接收器和接收器的方法

    公开(公告)号：US20100014621A1

    公开(公告)日：2010-01-21

    申请号：US12501959

    申请日：2009-07-13

    申请人： Tzuo-Bo Lin ,  Bing-Juo Chuang ,  Yu-Pin Chou

    发明人： Tzuo-Bo Lin ,  Bing-Juo Chuang ,  Yu-Pin Chou

    IPC分类号： H04L7/00

    CPC分类号： H04L7/10 ,  G09G5/006 ,  G09G5/008 ,  G09G2370/12 ,  H04L7/046 ,  H04L25/4908

    摘要： A receiver includes; a recovery circuit for receiving an input signal, and generating a data signal and a recovery clock; a processing circuit for processing the data signal to generate a processed signal; and a synchronization determining circuit for determining a synchronization state of the recovery clock according to the processed signal and a first reference value. The data signal includes a synchronous pattern, and the first reference value corresponds to at least a portion of a value in the synchronous pattern processed by the processing circuit. A method of the receiver is also disclosed.

    摘要翻译： 接收机包括 恢复电路，用于接收输入信号，并产生数据信号和恢复时钟; 处理电路，用于处理数据信号以产生处理的信号; 以及同步确定电路，用于根据处理的信号和第一参考值确定恢复时钟的同步状态。 数据信号包括同步模式，第一参考值对应于由处理电路处理的同步模式中的值的至少一部分。 还公开了接收机的方法。