公开(公告)号：US20150155053A1

公开(公告)日：2015-06-04

申请号：US14549291

申请日：2014-11-20

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Bruno Gailhard ,  Yohan Joly

IPC: G11C27/02

CPC classification number: G11C27/024 ,  G11C29/023 ,  G11C29/028 ,  G11C29/50016 ,  H03K3/0231

Abstract: A method is provided for controlling a sample and hold circuit that includes a switching module coupled to a storage capacitor. A circuit external to the sample and hold circuit of generates at least one main current representative of at least one leakage current of the switching module in its off state. The at least one main current is delivered to at least one auxiliary capacitor. An initial pulse signal is generated from the charging and discharging of the at least one auxiliary capacitor. The sampling phase of the sample and hold circuit is triggered at the rate of the pulses of a pulse signal derived from the initial pulse signal.

Abstract translation: 提供了一种用于控制采样和保持电路的方法，该采样和保持电路包括耦合到存储电容器的开关模块。 采样和保持电路外部的电路产生代表切换模块处于其关闭状态的至少一个泄漏电流的至少一个主电流。 至少一个主电流被传送到至少一个辅助电容器。 从至少一个辅助电容器的充电和放电产生初始脉冲信号。 采样和保持电路的采样相位以从初始脉冲信号得到的脉冲信号脉冲的速率被触发。

公开(公告)号：US09013240B2

公开(公告)日：2015-04-21

申请号：US14194676

申请日：2014-03-01

Applicant: Beken Corporation

Inventor： Jiazhou Liu ,  Dawei Guo

IPC: G01R23/15 ,  H03B5/32 ,  H03K3/0231 ,  H03K5/125 ,  H04B1/16 ,  H03L7/24

CPC classification number: H03L7/24 ,  G01R23/155 ,  H03B5/32 ,  H03J7/00 ,  H03K3/0231 ,  H03K5/125 ,  H03L1/00 ,  H03L7/08 ,  H04B1/1638

Abstract: A method in a circuit comprises providing a first clock by a resistor-capacitor (RC) oscillator; demodulating a plurality of input signals to form a plurality of demodulated input signals; discriminating frequency ranges of the plurality of demodulated input signals according to the first clock; determining whether a first predetermined number of consecutive demodulated input signals among the plurality of demodulated input signals fall into a first predetermined frequency range; triggering a crystal oscillator to provide a second clock to calibrate the first clock if the first predetermined number of consecutive input signals fall into the first predetermined frequency range.

Abstract translation: 电路中的一种方法包括由电阻 - 电容（RC）振荡器提供第一时钟; 解调多个输入信号以形成多个解调输入信号; 根据第一时钟识别多个解调输入信号的频率范围; 确定所述多个解调输入信号中的第一预定数量的连续解调输入信号是否落入第一预定频率范围; 如果第一预定数量的连续输入信号落入第一预定频率范围，触发晶体振荡器提供第二时钟来校准第一时钟。

公开(公告)号：US20150061780A1

公开(公告)日：2015-03-05

申请号：US14395522

申请日：2012-04-20

Applicant: Hubert Bode ,  Mathieu Lesbats

Inventor： Hubert Bode ,  Mathieu Lesbats

IPC: H03L7/06

CPC classification number: H03L7/06 ,  H03K3/0231 ,  H03K4/50

Abstract: An oscillator circuit for providing an output clock signal is described. The oscillator circuit comprising a voltage reference, a first current source, first capacitor, first capacitor switch, second current source, second capacitor, second capacitor switch, first comparator, second comparator and flip-flop. The first comparator comprises a first chopper-stabilized comparator switchable between a compare phase and a zeroing phase in dependence on the output clock signal and arranged to operate in the compare phase in a first half-phase of the output clock signal to provide a first comparator output from comparing the first capacitor voltage to the reference voltage and in the zeroing phase in the second half-phase. The second comparator comprises a second chopper-stabilized comparator switchable between a respective compare phase and a respective zeroing phase in dependence on the output clock signal and arranged to operate in its compare phase in the second half-phase to obtain a second comparator output from comparing the second capacitor voltage to the reference voltage and in its zeroing phase in the first half-phase.

Abstract translation: 描述用于提供输出时钟信号的振荡器电路。 所述振荡器电路包括电压基准，第一电流源，第一电容器，第一电容器开关，第二电流源，第二电容器，第二电容器开关，第一比较器，第二比较器和触发器。 第一比较器包括第一斩波稳定比较器，其可以根据输出时钟信号在比较相位和归零相位之间切换，并被布置为在输出时钟信号的第一半相位中的比较相位中工作，以提供第一比较器 将第一电容器电压与参考电压进行比较，并在第二半相的归零阶段输出。 第二比较器包括第二斩波稳定比较器，其可以根据输出时钟信号在相应的比较相位和相应的归零相位之间切换，并被布置成在第二半相的其比较相位中工作以从比较获得第二比较器输出 第二电容器电压为参考电压，并且在第一半相中处于其归零阶段。

公开(公告)号：US20150035610A1

公开(公告)日：2015-02-05

申请号：US14194676

申请日：2014-03-01

Applicant: Beken Corporation

Inventor： Jiazhou Liu ,  Dawei Guo

IPC: H03L7/24

CPC classification number: H03L7/24 ,  G01R23/155 ,  H03B5/32 ,  H03J7/00 ,  H03K3/0231 ,  H03K5/125 ,  H03L1/00 ,  H03L7/08 ,  H04B1/1638

Abstract: A method in a circuit comprises providing a first clock by a resistor-capacitor (RC) oscillator; demodulating a plurality of input signals to form a plurality of demodulated input signals; discriminating frequency ranges of the plurality of demodulated input signals according to the first clock; determining whether a first predetermined number of consecutive demodulated input signals among the plurality of demodulated input signals fall into a first predetermined frequency range; triggering a crystal oscillator to provide a second clock to calibrate the first clock if the first predetermined number of consecutive input signals fall into the first predetermined frequency range.

Abstract translation: 电路中的一种方法包括由电阻 - 电容（RC）振荡器提供第一时钟; 解调多个输入信号以形成多个解调输入信号; 根据第一时钟识别多个解调输入信号的频率范围; 确定所述多个解调输入信号中的第一预定数量的连续解调输入信号是否落入第一预定频率范围; 如果第一预定数量的连续输入信号落入第一预定频率范围，触发晶体振荡器提供第二时钟来校准第一时钟。

公开(公告)号：US20140354364A1

公开(公告)日：2014-12-04

申请号：US13907068

申请日：2013-05-31

Applicant: Gilles J. Muller ,  Jeffrey C. Cunningham ,  Karthik Ramanan

Inventor： Gilles J. Muller ,  Jeffrey C. Cunningham ,  Karthik Ramanan

IPC: H03L7/06

CPC classification number: H03L7/06 ,  H03B5/06 ,  H03B2200/0094 ,  H03K3/014 ,  H03K3/0231 ,  H03L1/02 ,  H03L3/00 ,  H03L5/00

Abstract: An oscillator that includes a first source current leg and first sink current leg to source current and sink current, respectively, during a startup mode of oscillator operation. The oscillator includes a second source current leg and a second sink current leg to source current and sink current, respectively, during a second mode of oscillator operation.

Abstract translation: 振荡器，其包括在振荡器操作的启动模式期间分别源电流和吸收电流的第一源电流支路和第一汇流电流支路。 振荡器包括第二源极电流支路和第二吸收电流支路，以分别在第二振荡器操作模式期间分别提供电流和吸收电流。

公开(公告)号：US08872593B2

公开(公告)日：2014-10-28

申请号：US13734805

申请日：2013-01-04

Applicant: Broadcom Corporation

Inventor： Mohyee Mikhemar ,  Hooman Darabi

IPC: G01R23/00 ,  H03B21/00 ,  G01L9/12 ,  G01R27/26 ,  G01R31/01 ,  H03K3/354

CPC classification number: H03B21/00 ,  G01L9/12 ,  G01R27/2605 ,  G01R31/016 ,  H03B5/20 ,  H03B5/32 ,  H03K3/0231 ,  H03K3/354

Abstract: A technique for calibration of on-chip resistance (R) and capacitance (C) values using an on-board bypass capacitor may include configuring an on-chip switch to selectively couple an on-chip calibration circuit to an on-chip port. The on-chip calibration circuit may include an RC oscillator having an RC time constant (RCTC). The on-board bypass capacitor may be coupled to the on-chip calibration circuit, by using the on-chip port. The on-chip R and C values may be calibrated using the on-chip calibration circuit and the on-board bypass capacitor.

Abstract translation: 使用板载旁路电容器来校准片上电阻（R）和电容（C）值的技术可以包括配置片内开关以选择性地将片上校准电路耦合到片上端口。 片上校准电路可以包括具有RC时间常数（RCTC）的RC振荡器。 板上旁路电容器可以通过使用片上端口耦合到片上校准电路。 片内R和C值可以使用片上校准电路和板载旁路电容进行校准。

公开(公告)号：US20140210564A1

公开(公告)日：2014-07-31

申请号：US13753544

申请日：2013-01-30

Applicant: Anand Kumar Sinha ,  Sanjay K. Wadhwa

Inventor： Anand Kumar Sinha ,  Sanjay K. Wadhwa

IPC: H03K3/36

CPC classification number: H03K3/0231

Abstract: A relaxation oscillator for generating an output clock signal includes an RC circuit, a self-biased comparator stage, and a logic circuit. The RC circuit generates first and second comparator input signals that are provided to the self-biased comparator stage. The self-biased comparator stage includes first and second input stages and a voltage reference circuit. Each of the first and second input stages in conjunction with the voltage reference circuit forms a comparator, i.e., first and second comparators corresponding to the first and second input stages, respectively. The self-biased comparator stage generates first and second comparator output signals, based on the first and second comparator input signals. The first and second comparator output signals are provided to the logic circuit that generates the output clock signal.

Abstract translation: 用于产生输出时钟信号的放大振荡器包括RC电路，自偏置比较器级和逻辑电路。 RC电路产生提供给自偏置比较器级的第一和第二比较器输入信号。 自偏置比较器级包括第一和第二输入级和电压参考电路。 第一和第二输入级中的每一个结合电压参考电路分别形成比较器，即分别对应于第一和第二输入级的第一和第二比较器。 自偏置比较器级基于第一和第二比较器输入信号产生第一和第二比较器输出信号。 第一和第二比较器输出信号被提供给产生输出时钟信号的逻辑电路。

公开(公告)号：US20140191782A1

公开(公告)日：2014-07-10

申请号：US13734805

申请日：2013-01-04

Applicant: BROADCOM CORPORATION

Inventor： Mohyee MIKHEMAR ,  Hooman DARABI

IPC: H03B21/00

CPC classification number: H03B21/00 ,  G01L9/12 ,  G01R27/2605 ,  G01R31/016 ,  H03B5/20 ,  H03B5/32 ,  H03K3/0231 ,  H03K3/354

Abstract: A technique for calibration of on-chip resistance (R) and capacitance (C) values using an on-board bypass capacitor may include configuring an on-chip switch to selectively couple an on-chip calibration circuit to an on-chip port. The on-chip calibration circuit may include an RC oscillator having an RC time constant (RCTC). The on-board bypass capacitor may be coupled to the on-chip calibration circuit, by using the on-chip port. The on-chip R and C values may be calibrated using the on-chip calibration circuit and the on-board bypass capacitor.

Abstract translation: 使用板载旁路电容器来校准片上电阻（R）和电容（C）值的技术可以包括配置片内开关以选择性地将片上校准电路耦合到片上端口。 片上校准电路可以包括具有RC时间常数（RCTC）的RC振荡器。 板上旁路电容器可以通过使用片上端口耦合到片上校准电路。 片内R和C值可以使用片上校准电路和板载旁路电容进行校准。

公开(公告)号：US20140176250A1

公开(公告)日：2014-06-26

申请号：US13721885

申请日：2012-12-20

Applicant: Axel Thomsen ,  Pavel Konecny ,  Xiaodong Wang

Inventor： Axel Thomsen ,  Pavel Konecny ,  Xiaodong Wang

IPC: H03K3/011

CPC classification number: H03K3/0231

Abstract: In an embodiment, a method includes: during a first portion of a cycle of a clock signal generated by an oscillator, pre-charging a first capacitor of a first switched capacitor stage until a first comparator determines that a first node voltage of the first switched capacitor stage is greater than a first reference voltage at a first reference voltage node; applying a second reference voltage to the first reference voltage node; and responsive to a first edge of the clock signal, charging the first capacitor until the first comparator determines that the first node voltage is greater than the second reference voltage at the first reference voltage node.

Abstract translation: 在一个实施例中，一种方法包括：在由振荡器产生的时钟信号的周期的第一部分期间，对第一开关电容器级的第一电容器进行预充电，直到第一比较器确定第一开关的第一节点电压 电容器级大于第一参考电压节点处的第一参考电压; 将第二参考电压施加到所述第一参考电压节点; 并且响应于所述时钟信号的第一边沿，对所述第一电容器充电直到所述第一比较器确定所述第一节点电压大于所述第一参考电压节点处的所述第二参考电压。

公开(公告)号：US08742858B2

公开(公告)日：2014-06-03

申请号：US13016761

申请日：2011-01-28

Applicant: Roberto Nonis ,  Nicola DaDalt

Inventor： Roberto Nonis ,  Nicola DaDalt

IPC: H03K4/501 ,  H03K3/011 ,  H03K3/0231

CPC classification number: H03K3/011 ,  H03K3/0231 ,  H03K4/501

Abstract: Techniques and architectures corresponding to relaxation oscillators having output frequencies that are supply voltage independent are described. In a particular embodiment, an apparatus includes a relaxation oscillator having one or more capacitors and a compensation current circuit coupled to the relaxation oscillator. The compensation current circuit is configured to regulate current provided to the one or more capacitors of the relaxation oscillator in response to changes in a supply voltage provided to the compensation current circuit and to the relaxation oscillator.

Abstract translation: 描述了对应于具有电源电压独立的输出频率的松弛振荡器的技术和架构。 在特定实施例中，一种装置包括具有一个或多个电容器的拉伸振荡器和耦合到张弛振荡器的补偿电流电路。 补偿电流电路被配置为响应于提供给补偿电流电路和张弛振荡器的电源电压的变化来调节提供给张弛振荡器的一个或多个电容器的电流。