Abstract:
A method of aligning a substrate can comprise primarily aligning the substrate having a pattern, obtaining pattern information corresponding to a configuration of the pattern, comparing the pattern information with predetermined reference pattern information to corroborate the acceptability of the pattern information, selectively exchanging the predetermined reference pattern information with the pattern information based on the acceptability of the pattern information, and secondarily aligning the substrate to correlate the position of the pattern with the pattern information.
Abstract:
A method and apparatus of classifying repetitive defects on a substrate is provided. Defects of dies on the substrate are sequentially compared with a predetermined reference die. Sets of coordinates are marked on the reference die which are corresponding to the position of the defects on the dies on the substrate. Then, repetitive defects are classified which are repeatedly marked in a specified region on the reference die.
Abstract:
A liquid crystal display panel includes a first substrate and a second substrate, a column spacer between the first substrate and the second substrate to maintain a cell-gap, contact surfaces between the column spacer and one of the first substrate and the second substrate, at least one of the contact surfaces having a plurality of holes; and a liquid crystal layer between the first substrate and the second substrate.
Abstract:
An alignment mark and an exposure alignment system and method using the alignment mark for aligning wafers are described. The alignment mark is formed of a plurality of mesa or trench type unit marks that are aligned in an inline pattern within an underlying layer under a layer to which a chemical mechanical polishing process is applied to form an alignment signal during an alignment process, thereby preventing a dishing phenomenon caused by the chemical mechanical process.
Abstract:
An integrated circuit chip structure, which prevents electrical shorts between adjacent electrodes and contributes to miniaturization, and a method for forming an integrated circuit chip structure are provided. A first electrode of a predetermined pattern is formed on the integrated circuit chip and a second electrode is formed on a base in correspondence with the first electrode. A first adhesive made of elastomer is deposited on the second electrode and a conductive metal substance is coated thereon. Finally, the second electrode is joined with the first electrode by pressure, after a second adhesive is deposited on the upper surface of the metal substance.
Abstract:
A system for detecting an operation failure of a plasma generating device includes a plasma generating device including one or more nozzle units configured to emit a plasma beam, a camera module that generates image data of the plasma beam emitted by the one or more nozzle units, and a control device that detects and determines whether or not the plasma generating device has an operation failure based on the image data received from the camera module, and controls an operation of the plasma generating device according to a result of determining whether or not the plasma generating device has the operation failure.
Abstract:
A roll-to-roll surface cleaning treatment system may include an upper housing containing a first plasma generating device and a first transfer roller that faces a nozzle from which a plasma beam generated by the first plasma generating device is discharged and that winds and transfers a flexible substrate, the upper housing comprising a gas inlet, an entrance through which the flexible substrate is introduced, and an outlet through which the flexible substrate is discharged, and a lower housing connected to the entrance of the upper housing and containing a second plasma generating device and a second transfer roller that faces a nozzle from which a plasma beam generated by the second plasma generating device is discharged and that winds and transfers the flexible substrate, the lower housing comprising a gas outlet, and an inlet through which the flexible substrate is introduced.
Abstract:
The embodiments employ a transaction based design methodology to supply clocking when clock pulses are requested. The transactional module receives a clock when it requests a clock pulse and one stage of a logic pipeline is clocked at a time. This methodology reduces dynamic power dissipation by the transactional module from the dynamic power dissipated by traditional synchronous logic designs.
Abstract:
In a method of fabricating a semiconductor device, a substrate including a circuit area and an overlay mark area is provided. Conductive gate patterns are formed on the substrate in the circuit area such that the overlay mark area is free of the gate patterns, and conductive contact patterns are formed on the substrate between the gate patterns in the circuit area. A mirror pattern is formed on the substrate in the overlay mark area, where the mirror pattern and the contact patterns comprising a same reflective material. Related semiconductor devices, overlay marks, and fabrication methods are also discussed.
Abstract:
An oil control valve includes a housing having a control port and a drain port, a first seat with a first penetration hole forming a first chamber, a second seat with a second penetration hole forming a second chamber communicated with the control port, the second seat with the housing forming a third chamber communicating with the drain port, a first check valve within the first chamber selectively closing the first penetration hole, a second check valve within the third chamber selectively closing the second penetration hole, and a third penetration hole, a control portion selectively opening the first check valve and simultaneously closing the second check valve or selectively closing the first check valve and simultaneously opening the second check valve and an orifice connecting the first chamber with the second chamber.