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    Method For Manufacturing A Semiconductor Device Using A Modified Photosensitive Layer
    51.
    发明申请
    Method For Manufacturing A Semiconductor Device Using A Modified Photosensitive Layer 有权
    使用改性光敏层制造半导体器件的方法

    公开(公告)号：US20100285410A1

    公开(公告)日：2010-11-11

    申请号：US12463501

    申请日：2009-05-11

    Applicant: Chien-Wei Wang ,  Ching-Yu Chang

    Inventor： Chien-Wei Wang ,  Ching-Yu Chang

    IPC: G03F7/20

    CPC classification number: G03F7/40 ,  H01L21/0273 ,  H01L21/266 ,  H01L21/31133 ,  H01L21/31138

    Abstract: The present disclosure provides a method for manufacturing a semiconductor device. The method includes coating a photoresist on a substrate. The photoresist is exposed to radiation. The radiation exposed photoresist is baked. The radiation exposed and baked photoresist is developed to create an image pattern. The image pattern is treated with a treating material. An ion implantation process is performed to the substrate and the treated image pattern. The image pattern is stripped from the substrate. A carbon atom ratio of the treating material is less than a carbon atom ratio of the photoresist.

    Abstract translation: 本公开提供了一种用于制造半导体器件的方法。 该方法包括在基底上涂覆光致抗蚀剂。 光致抗蚀剂暴露于辐射。 辐射曝光的光致抗蚀剂被烘烤。 辐射曝光和烘烤的光致抗蚀剂被开发以产生图像图案。 用处理材料处理图像图案。 对基板和经处理的图像图案执行离子注入工艺。 图案图案从基板剥离。 处理材料的碳原子比小于光致抗蚀剂的碳原子比。

    Parallel architecture for matrix transposition
    52.
    发明授权
    Parallel architecture for matrix transposition 有权
    矩阵转置的并行架构

    公开(公告)号：US07797362B2

    公开(公告)日：2010-09-14

    申请号：US11678130

    申请日：2007-02-23

    Applicant: Nara Won ,  Ching-Yu Hung

    Inventor： Nara Won ,  Ching-Yu Hung

    IPC: G06F7/78

    CPC classification number: G06F17/18 ,  G06F9/30032 ,  G06F9/3004 ,  G06F9/30098

    Abstract: An extension to current multiple memory bank video processing architecture is presented. A more powerful memory controller is incorporated, allowing computation of multiple memory addresses at both the input and the output data paths making possible new combinations of reads and writes at the input and output ports. Matrix transposition computations required by the algorithms used in image and video processing are implemented in MAC modules and memory banks. The technique described here can be applied to other parallel processors including future VLIW DSP processors.

    Abstract translation: 介绍了当前多存储器视频处理架构的扩展。 结合了更强大的存储器控​​制器，允许在输入和输出数据路径上计算多个存储器地址，使输入和输出端口处的读取和写入的新组合成为可能。 在图像和视频处理中使用的算法所需的矩阵转置计算在MAC模块和存储器中实现。 这里描述的技术可以应用于其他并行处理器，包括将来的VLIW DSP处理器。

    Method and material for forming a double exposure lithography pattern
    55.
    发明授权
    Method and material for forming a double exposure lithography pattern 有权
    用于形成双曝光光刻图案的方法和材料

    公开(公告)号：US07759253B2

    公开(公告)日：2010-07-20

    申请号：US11563805

    申请日：2006-11-28

    Applicant: Ching-Yu Chang

    Inventor： Ching-Yu Chang

    IPC: H01L21/302 ,  H01L21/461

    CPC classification number: H01L21/76816 ,  G03F7/0035 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/3086 ,  H01L21/3088

    Abstract: A method of lithography patterning includes forming a first material layer on a substrate; forming a first patterned resist layer including at least one opening therein on the first material layer; forming a second material layer on the first patterned resist layer and the first material layer; forming a second patterned resist layer including at least one opening therein on the second material layer; and etching the first and second material layers uncovered by the first and second patterned resist layers.

    Abstract translation: 光刻图案的方法包括在基底上形成第一材料层; 在所述第一材料层上形成包括至少一个开口的第一图案化抗蚀剂层; 在所述第一图案化抗蚀剂层和所述第一材料层上形成第二材料层; 在所述第二材料层上形成包括其中的至少一个开口的第二图案化抗蚀剂层; 以及蚀刻由第一和第二图案化抗蚀剂层未覆盖的第一和第二材料层。

    Immersion photolithography with megasonic rinse
    57.
    发明授权
    Immersion photolithography with megasonic rinse 有权
    浸没式光刻用超声波冲洗

    公开(公告)号：US07732123B2

    公开(公告)日：2010-06-08

    申请号：US10995653

    申请日：2004-11-23

    Applicant: Ching-Yu Chang

    Inventor： Ching-Yu Chang

    IPC: G03F7/26

    CPC classification number: G03F7/2041 ,  G03F7/168 ,  H01L21/67051 ,  H01L21/67057

    Abstract: A method comprises forming a photoresist on a substrate, rinsing the photoresist using a rinse liquid agitated with at least one megasonic source, exposing the photoresist to radiation while immersed in a liquid, and developing the photoresist.

    Abstract translation: 一种方法包括在基底上形成光致抗蚀剂，使用用至少一个兆声源驱动的漂洗液冲洗光致抗蚀剂，在浸入液体中时将光致抗蚀剂暴露于辐射，并显影光致抗蚀剂。

    SEMICONDUCTOR DEVICE AND IC CHIP
    58.
    发明申请
    SEMICONDUCTOR DEVICE AND IC CHIP 有权
    半导体器件和IC芯片

    公开(公告)号：US20100109081A1

    公开(公告)日：2010-05-06

    申请号：US12263108

    申请日：2008-10-31

    Applicant: Chin-Lung Chen ,  Chun-Ching Yu ,  Jung-Ching Chen ,  Ming-Tsung Tung

    Inventor： Chin-Lung Chen ,  Chun-Ching Yu ,  Jung-Ching Chen ,  Ming-Tsung Tung

    IPC: H01L27/088

    CPC classification number: H01L21/823892 ,  H01L21/823857 ,  H01L21/823878 ,  H01L27/092 ,  H01L27/0922

    Abstract: A semiconductor device and an IC chip are described. The deep N-well region is configured in a substrate. The P-well region surrounds a periphery of the deep N-well region. The gate structure is disposed on the substrate of the deep N-well region. The P-body region is configured in the deep N-well region at one side of the gate structure. The first N-type doped region is configured in the P-body region. The second N-type doped region is configured pin the deep N-well region at the other side of the gate structure. The first isolation structure is disposed between the gate structure and the second N-type doped region. The N-type isolation ring is configured in the deep N-well region and corresponding to an edge of the deep N-well region, wherein a doping concentration of the N-type isolation ring is higher than that of the deep N-well region.

    Abstract translation: 描述半导体器件和IC芯片。 深N阱区配置在基板中。 P阱区域围绕深N阱区域的周边。 栅极结构设置在深N阱区域的衬底上。 P体区域配置在栅极结构一侧的深N阱区域。 第一N型掺杂区域配置在P体区域中。 第二N型掺杂区域被配置为在栅极结构的另一侧上的深N阱区域。 第一隔离结构设置在栅极结构和第二N型掺杂区之间。 N型隔离环配置在深N阱区并对应于深N阱区的边缘，其中N型隔离环的掺杂浓度高于深N阱区的掺杂浓度 。

    LOW NOISE EXTERNAL ENABLE SWITCHER CONTROL SIGNAL USING ON-CHIP SWITCHER
    60.
    发明申请
    LOW NOISE EXTERNAL ENABLE SWITCHER CONTROL SIGNAL USING ON-CHIP SWITCHER 审中-公开
    低噪声外部使能开关控制信号使用片上开关

    公开(公告)号：US20100079128A1

    公开(公告)日：2010-04-01

    申请号：US12410216

    申请日：2009-03-24

    Applicant: Ahmad Al-Dahle ,  John Ching Yu Tam ,  Hugo Fiennes ,  Wei H. Yao

    Inventor： Ahmad Al-Dahle ,  John Ching Yu Tam ,  Hugo Fiennes ,  Wei H. Yao

    IPC: G05F3/08

    CPC classification number: H02M3/156 ,  H02M1/36

    Abstract: A method and system is disclosed for powering device sub-circuitry of an electronic device. The sub-circuitry may be used to provide control signals to a direct current switcher on a main system board, thus eliminating passive circuitry typically associated with the sub-circuitry. Furthermore, by actively generating the control signals for the direct current switcher, explicit timing control circuitry is not required to synchronize the transmitted power to the sub-circuitry.

    Abstract translation: 公开了一种为电子设备的设备子电路供电的方法和系统。 子电路可以用于向主系统板上的直流切换器提供控制信号，从而消除通常与子电路相关联的无源电路。 此外，通过主动产生用于直流电切换器的控制信号，不需要显式定时控制电路来将发射功率同步到子电路。

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